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1 // Copyright 2015-2025 The Khronos Group Inc.
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2 //
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3 // SPDX-License-Identifier: Apache-2.0 OR MIT
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4 //
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5
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6 // This header is generated from the Khronos Vulkan XML API Registry.
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7
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8 #ifndef VULKAN_FORMAT_TRAITS_HPP
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9 #define VULKAN_FORMAT_TRAITS_HPP
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10
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11 #include <vulkan/vulkan.hpp>
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12
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13 namespace VULKAN_HPP_NAMESPACE
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14 {
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15 //=====================
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16 //=== Format Traits ===
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17 //=====================
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18
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19 //=== Function Declarations ===
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20
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21 // The three-dimensional extent of a texel block.
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22 VULKAN_HPP_CONSTEXPR_14 std::array<uint8_t, 3> blockExtent( Format format );
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23
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24 // The texel block size in bytes.
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25 VULKAN_HPP_CONSTEXPR_14 uint8_t blockSize( Format format );
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26
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27 // The class of the format (can't be just named "class"!)
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28 VULKAN_HPP_CONSTEXPR_14 char const * compatibilityClass( Format format );
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29
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30 // The number of bits in this component, if not compressed, otherwise 0.
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31 VULKAN_HPP_CONSTEXPR_14 uint8_t componentBits( Format format, uint8_t component );
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32
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33 // The number of components of this format.
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34 VULKAN_HPP_CONSTEXPR_14 uint8_t componentCount( Format format );
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35
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36 // The name of the component
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37 VULKAN_HPP_CONSTEXPR_14 char const * componentName( Format format, uint8_t component );
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38
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39 // The numeric format of the component
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40 VULKAN_HPP_CONSTEXPR_14 char const * componentNumericFormat( Format format, uint8_t component );
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41
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42 // The plane this component lies in.
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43 VULKAN_HPP_CONSTEXPR_14 uint8_t componentPlaneIndex( Format format, uint8_t component );
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44
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45 // True, if the components of this format are compressed, otherwise false.
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46 VULKAN_HPP_CONSTEXPR_14 bool componentsAreCompressed( Format format );
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47
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48 // A textual description of the compression scheme, or an empty string if it is not compressed
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49 VULKAN_HPP_CONSTEXPR_14 char const * compressionScheme( Format format );
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50
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51 // Get all formats
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52 std::vector<Format> const & getAllFormats();
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53
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54 // Get all color with a color component
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55 std::vector<Format> const & getColorFormats();
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56
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57 // Get all formats with a depth component
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58 std::vector<Format> const & getDepthFormats();
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59
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60 // Get all formats with a depth and a stencil component
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61 std::vector<Format> const & getDepthStencilFormats();
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62
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63 // Get all formats with a stencil component
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64 std::vector<Format> const & getStencilFormats();
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65
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66 // True, if this format has an alpha component
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67 VULKAN_HPP_CONSTEXPR_14 bool hasAlphaComponent( Format format );
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68
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69 // True, if this format has a blue component
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70 VULKAN_HPP_CONSTEXPR_14 bool hasBlueComponent( Format format );
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71
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72 // True, if this format has a depth component
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73 VULKAN_HPP_CONSTEXPR_14 bool hasDepthComponent( Format format );
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74
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75 // True, if this format has a green component
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76 VULKAN_HPP_CONSTEXPR_14 bool hasGreenComponent( Format format );
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77
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78 // True, if this format has a red component
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79 VULKAN_HPP_CONSTEXPR_14 bool hasRedComponent( Format format );
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80
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81 // True, if this format has a stencil component
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82 VULKAN_HPP_CONSTEXPR_14 bool hasStencilComponent( Format format );
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83
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84 // True, if the format is a color
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85 VULKAN_HPP_CONSTEXPR_14 bool isColor( Format format );
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86
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87 // True, if this format is a compressed one.
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88 VULKAN_HPP_CONSTEXPR_14 bool isCompressed( Format format );
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89
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90 // The number of bits into which the format is packed. A single image element in this format can be stored in the same space as a scalar type of this bit
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91 // width.
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92 VULKAN_HPP_CONSTEXPR_14 uint8_t packed( Format format );
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93
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94 // The single-plane format that this plane is compatible with.
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95 VULKAN_HPP_CONSTEXPR_14 Format planeCompatibleFormat( Format format, uint8_t plane );
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96
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97 // The number of image planes of this format.
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98 VULKAN_HPP_CONSTEXPR_14 uint8_t planeCount( Format format );
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99
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100 // The relative height of this plane. A value of k means that this plane is 1/k the height of the overall format.
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101 VULKAN_HPP_CONSTEXPR_14 uint8_t planeHeightDivisor( Format format, uint8_t plane );
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102
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103 // The relative width of this plane. A value of k means that this plane is 1/k the width of the overall format.
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104 VULKAN_HPP_CONSTEXPR_14 uint8_t planeWidthDivisor( Format format, uint8_t plane );
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105
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106 // The number of texels in a texel block.
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107 VULKAN_HPP_CONSTEXPR_14 uint8_t texelsPerBlock( Format format );
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108
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109 //=== Function Definitions ===
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110
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111 // The three-dimensional extent of a texel block.
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112 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 std::array<uint8_t, 3> blockExtent( Format format )
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113 {
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114 switch ( format )
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115 {
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116 case Format::eBc1RgbUnormBlock : return { { 4, 4, 1 } };
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117 case Format::eBc1RgbSrgbBlock : return { { 4, 4, 1 } };
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118 case Format::eBc1RgbaUnormBlock : return { { 4, 4, 1 } };
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119 case Format::eBc1RgbaSrgbBlock : return { { 4, 4, 1 } };
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120 case Format::eBc2UnormBlock : return { { 4, 4, 1 } };
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121 case Format::eBc2SrgbBlock : return { { 4, 4, 1 } };
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122 case Format::eBc3UnormBlock : return { { 4, 4, 1 } };
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123 case Format::eBc3SrgbBlock : return { { 4, 4, 1 } };
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124 case Format::eBc4UnormBlock : return { { 4, 4, 1 } };
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125 case Format::eBc4SnormBlock : return { { 4, 4, 1 } };
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126 case Format::eBc5UnormBlock : return { { 4, 4, 1 } };
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127 case Format::eBc5SnormBlock : return { { 4, 4, 1 } };
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128 case Format::eBc6HUfloatBlock : return { { 4, 4, 1 } };
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129 case Format::eBc6HSfloatBlock : return { { 4, 4, 1 } };
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130 case Format::eBc7UnormBlock : return { { 4, 4, 1 } };
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131 case Format::eBc7SrgbBlock : return { { 4, 4, 1 } };
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132 case Format::eEtc2R8G8B8UnormBlock : return { { 4, 4, 1 } };
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133 case Format::eEtc2R8G8B8SrgbBlock : return { { 4, 4, 1 } };
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134 case Format::eEtc2R8G8B8A1UnormBlock : return { { 4, 4, 1 } };
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135 case Format::eEtc2R8G8B8A1SrgbBlock : return { { 4, 4, 1 } };
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136 case Format::eEtc2R8G8B8A8UnormBlock : return { { 4, 4, 1 } };
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137 case Format::eEtc2R8G8B8A8SrgbBlock : return { { 4, 4, 1 } };
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138 case Format::eEacR11UnormBlock : return { { 4, 4, 1 } };
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139 case Format::eEacR11SnormBlock : return { { 4, 4, 1 } };
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140 case Format::eEacR11G11UnormBlock : return { { 4, 4, 1 } };
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141 case Format::eEacR11G11SnormBlock : return { { 4, 4, 1 } };
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142 case Format::eAstc4x4UnormBlock : return { { 4, 4, 1 } };
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143 case Format::eAstc4x4SrgbBlock : return { { 4, 4, 1 } };
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144 case Format::eAstc5x4UnormBlock : return { { 5, 4, 1 } };
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145 case Format::eAstc5x4SrgbBlock : return { { 5, 4, 1 } };
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146 case Format::eAstc5x5UnormBlock : return { { 5, 5, 1 } };
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147 case Format::eAstc5x5SrgbBlock : return { { 5, 5, 1 } };
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148 case Format::eAstc6x5UnormBlock : return { { 6, 5, 1 } };
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149 case Format::eAstc6x5SrgbBlock : return { { 6, 5, 1 } };
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150 case Format::eAstc6x6UnormBlock : return { { 6, 6, 1 } };
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151 case Format::eAstc6x6SrgbBlock : return { { 6, 6, 1 } };
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152 case Format::eAstc8x5UnormBlock : return { { 8, 5, 1 } };
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153 case Format::eAstc8x5SrgbBlock : return { { 8, 5, 1 } };
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154 case Format::eAstc8x6UnormBlock : return { { 8, 6, 1 } };
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155 case Format::eAstc8x6SrgbBlock : return { { 8, 6, 1 } };
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156 case Format::eAstc8x8UnormBlock : return { { 8, 8, 1 } };
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157 case Format::eAstc8x8SrgbBlock : return { { 8, 8, 1 } };
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158 case Format::eAstc10x5UnormBlock : return { { 10, 5, 1 } };
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159 case Format::eAstc10x5SrgbBlock : return { { 10, 5, 1 } };
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160 case Format::eAstc10x6UnormBlock : return { { 10, 6, 1 } };
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161 case Format::eAstc10x6SrgbBlock : return { { 10, 6, 1 } };
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162 case Format::eAstc10x8UnormBlock : return { { 10, 8, 1 } };
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163 case Format::eAstc10x8SrgbBlock : return { { 10, 8, 1 } };
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164 case Format::eAstc10x10UnormBlock : return { { 10, 10, 1 } };
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165 case Format::eAstc10x10SrgbBlock : return { { 10, 10, 1 } };
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166 case Format::eAstc12x10UnormBlock : return { { 12, 10, 1 } };
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167 case Format::eAstc12x10SrgbBlock : return { { 12, 10, 1 } };
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168 case Format::eAstc12x12UnormBlock : return { { 12, 12, 1 } };
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169 case Format::eAstc12x12SrgbBlock : return { { 12, 12, 1 } };
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170 case Format::eG8B8G8R8422Unorm : return { { 2, 1, 1 } };
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171 case Format::eB8G8R8G8422Unorm : return { { 2, 1, 1 } };
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172 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16: return { { 2, 1, 1 } };
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173 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16: return { { 2, 1, 1 } };
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174 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16: return { { 2, 1, 1 } };
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175 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16: return { { 2, 1, 1 } };
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176 case Format::eG16B16G16R16422Unorm : return { { 2, 1, 1 } };
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177 case Format::eB16G16R16G16422Unorm : return { { 2, 1, 1 } };
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178 case Format::eAstc4x4SfloatBlock : return { { 4, 4, 1 } };
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179 case Format::eAstc5x4SfloatBlock : return { { 5, 4, 1 } };
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180 case Format::eAstc5x5SfloatBlock : return { { 5, 5, 1 } };
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181 case Format::eAstc6x5SfloatBlock : return { { 6, 5, 1 } };
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182 case Format::eAstc6x6SfloatBlock : return { { 6, 6, 1 } };
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183 case Format::eAstc8x5SfloatBlock : return { { 8, 5, 1 } };
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184 case Format::eAstc8x6SfloatBlock : return { { 8, 6, 1 } };
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185 case Format::eAstc8x8SfloatBlock : return { { 8, 8, 1 } };
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186 case Format::eAstc10x5SfloatBlock : return { { 10, 5, 1 } };
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187 case Format::eAstc10x6SfloatBlock : return { { 10, 6, 1 } };
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188 case Format::eAstc10x8SfloatBlock : return { { 10, 8, 1 } };
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189 case Format::eAstc10x10SfloatBlock : return { { 10, 10, 1 } };
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190 case Format::eAstc12x10SfloatBlock : return { { 12, 10, 1 } };
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191 case Format::eAstc12x12SfloatBlock : return { { 12, 12, 1 } };
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192 case Format::ePvrtc12BppUnormBlockIMG : return { { 8, 4, 1 } };
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193 case Format::ePvrtc14BppUnormBlockIMG : return { { 4, 4, 1 } };
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194 case Format::ePvrtc22BppUnormBlockIMG : return { { 8, 4, 1 } };
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195 case Format::ePvrtc24BppUnormBlockIMG : return { { 4, 4, 1 } };
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196 case Format::ePvrtc12BppSrgbBlockIMG : return { { 8, 4, 1 } };
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197 case Format::ePvrtc14BppSrgbBlockIMG : return { { 4, 4, 1 } };
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198 case Format::ePvrtc22BppSrgbBlockIMG : return { { 8, 4, 1 } };
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199 case Format::ePvrtc24BppSrgbBlockIMG : return { { 4, 4, 1 } };
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200
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201 default: return { { 1, 1, 1 } };
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202 }
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203 }
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204
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205 // The texel block size in bytes.
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206 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t blockSize( Format format )
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207 {
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208 switch ( format )
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209 {
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210 case Format::eR4G4UnormPack8 : return 1;
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211 case Format::eR4G4B4A4UnormPack16 : return 2;
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212 case Format::eB4G4R4A4UnormPack16 : return 2;
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213 case Format::eR5G6B5UnormPack16 : return 2;
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214 case Format::eB5G6R5UnormPack16 : return 2;
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215 case Format::eR5G5B5A1UnormPack16 : return 2;
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216 case Format::eB5G5R5A1UnormPack16 : return 2;
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217 case Format::eA1R5G5B5UnormPack16 : return 2;
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218 case Format::eR8Unorm : return 1;
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219 case Format::eR8Snorm : return 1;
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220 case Format::eR8Uscaled : return 1;
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221 case Format::eR8Sscaled : return 1;
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222 case Format::eR8Uint : return 1;
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223 case Format::eR8Sint : return 1;
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224 case Format::eR8Srgb : return 1;
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225 case Format::eR8G8Unorm : return 2;
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226 case Format::eR8G8Snorm : return 2;
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227 case Format::eR8G8Uscaled : return 2;
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228 case Format::eR8G8Sscaled : return 2;
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229 case Format::eR8G8Uint : return 2;
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230 case Format::eR8G8Sint : return 2;
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231 case Format::eR8G8Srgb : return 2;
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232 case Format::eR8G8B8Unorm : return 3;
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233 case Format::eR8G8B8Snorm : return 3;
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234 case Format::eR8G8B8Uscaled : return 3;
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235 case Format::eR8G8B8Sscaled : return 3;
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236 case Format::eR8G8B8Uint : return 3;
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237 case Format::eR8G8B8Sint : return 3;
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238 case Format::eR8G8B8Srgb : return 3;
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239 case Format::eB8G8R8Unorm : return 3;
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240 case Format::eB8G8R8Snorm : return 3;
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241 case Format::eB8G8R8Uscaled : return 3;
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242 case Format::eB8G8R8Sscaled : return 3;
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243 case Format::eB8G8R8Uint : return 3;
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244 case Format::eB8G8R8Sint : return 3;
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245 case Format::eB8G8R8Srgb : return 3;
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246 case Format::eR8G8B8A8Unorm : return 4;
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247 case Format::eR8G8B8A8Snorm : return 4;
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248 case Format::eR8G8B8A8Uscaled : return 4;
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249 case Format::eR8G8B8A8Sscaled : return 4;
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250 case Format::eR8G8B8A8Uint : return 4;
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251 case Format::eR8G8B8A8Sint : return 4;
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252 case Format::eR8G8B8A8Srgb : return 4;
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253 case Format::eB8G8R8A8Unorm : return 4;
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254 case Format::eB8G8R8A8Snorm : return 4;
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255 case Format::eB8G8R8A8Uscaled : return 4;
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256 case Format::eB8G8R8A8Sscaled : return 4;
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257 case Format::eB8G8R8A8Uint : return 4;
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258 case Format::eB8G8R8A8Sint : return 4;
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259 case Format::eB8G8R8A8Srgb : return 4;
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260 case Format::eA8B8G8R8UnormPack32 : return 4;
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261 case Format::eA8B8G8R8SnormPack32 : return 4;
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262 case Format::eA8B8G8R8UscaledPack32 : return 4;
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263 case Format::eA8B8G8R8SscaledPack32 : return 4;
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264 case Format::eA8B8G8R8UintPack32 : return 4;
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265 case Format::eA8B8G8R8SintPack32 : return 4;
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266 case Format::eA8B8G8R8SrgbPack32 : return 4;
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267 case Format::eA2R10G10B10UnormPack32 : return 4;
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268 case Format::eA2R10G10B10SnormPack32 : return 4;
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269 case Format::eA2R10G10B10UscaledPack32 : return 4;
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270 case Format::eA2R10G10B10SscaledPack32 : return 4;
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271 case Format::eA2R10G10B10UintPack32 : return 4;
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272 case Format::eA2R10G10B10SintPack32 : return 4;
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273 case Format::eA2B10G10R10UnormPack32 : return 4;
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274 case Format::eA2B10G10R10SnormPack32 : return 4;
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275 case Format::eA2B10G10R10UscaledPack32 : return 4;
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276 case Format::eA2B10G10R10SscaledPack32 : return 4;
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277 case Format::eA2B10G10R10UintPack32 : return 4;
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278 case Format::eA2B10G10R10SintPack32 : return 4;
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279 case Format::eR16Unorm : return 2;
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280 case Format::eR16Snorm : return 2;
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281 case Format::eR16Uscaled : return 2;
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282 case Format::eR16Sscaled : return 2;
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283 case Format::eR16Uint : return 2;
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284 case Format::eR16Sint : return 2;
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285 case Format::eR16Sfloat : return 2;
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286 case Format::eR16G16Unorm : return 4;
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287 case Format::eR16G16Snorm : return 4;
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288 case Format::eR16G16Uscaled : return 4;
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289 case Format::eR16G16Sscaled : return 4;
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290 case Format::eR16G16Uint : return 4;
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291 case Format::eR16G16Sint : return 4;
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292 case Format::eR16G16Sfloat : return 4;
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293 case Format::eR16G16B16Unorm : return 6;
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294 case Format::eR16G16B16Snorm : return 6;
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|
|
295 case Format::eR16G16B16Uscaled : return 6;
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|
|
296 case Format::eR16G16B16Sscaled : return 6;
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|
|
297 case Format::eR16G16B16Uint : return 6;
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|
|
298 case Format::eR16G16B16Sint : return 6;
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|
|
299 case Format::eR16G16B16Sfloat : return 6;
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|
|
300 case Format::eR16G16B16A16Unorm : return 8;
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|
|
301 case Format::eR16G16B16A16Snorm : return 8;
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|
|
302 case Format::eR16G16B16A16Uscaled : return 8;
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|
|
303 case Format::eR16G16B16A16Sscaled : return 8;
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|
|
304 case Format::eR16G16B16A16Uint : return 8;
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|
|
305 case Format::eR16G16B16A16Sint : return 8;
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|
|
306 case Format::eR16G16B16A16Sfloat : return 8;
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|
|
307 case Format::eR32Uint : return 4;
|
|
|
308 case Format::eR32Sint : return 4;
|
|
|
309 case Format::eR32Sfloat : return 4;
|
|
|
310 case Format::eR32G32Uint : return 8;
|
|
|
311 case Format::eR32G32Sint : return 8;
|
|
|
312 case Format::eR32G32Sfloat : return 8;
|
|
|
313 case Format::eR32G32B32Uint : return 12;
|
|
|
314 case Format::eR32G32B32Sint : return 12;
|
|
|
315 case Format::eR32G32B32Sfloat : return 12;
|
|
|
316 case Format::eR32G32B32A32Uint : return 16;
|
|
|
317 case Format::eR32G32B32A32Sint : return 16;
|
|
|
318 case Format::eR32G32B32A32Sfloat : return 16;
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|
|
319 case Format::eR64Uint : return 8;
|
|
|
320 case Format::eR64Sint : return 8;
|
|
|
321 case Format::eR64Sfloat : return 8;
|
|
|
322 case Format::eR64G64Uint : return 16;
|
|
|
323 case Format::eR64G64Sint : return 16;
|
|
|
324 case Format::eR64G64Sfloat : return 16;
|
|
|
325 case Format::eR64G64B64Uint : return 24;
|
|
|
326 case Format::eR64G64B64Sint : return 24;
|
|
|
327 case Format::eR64G64B64Sfloat : return 24;
|
|
|
328 case Format::eR64G64B64A64Uint : return 32;
|
|
|
329 case Format::eR64G64B64A64Sint : return 32;
|
|
|
330 case Format::eR64G64B64A64Sfloat : return 32;
|
|
|
331 case Format::eB10G11R11UfloatPack32 : return 4;
|
|
|
332 case Format::eE5B9G9R9UfloatPack32 : return 4;
|
|
|
333 case Format::eD16Unorm : return 2;
|
|
|
334 case Format::eX8D24UnormPack32 : return 4;
|
|
|
335 case Format::eD32Sfloat : return 4;
|
|
|
336 case Format::eS8Uint : return 1;
|
|
|
337 case Format::eD16UnormS8Uint : return 3;
|
|
|
338 case Format::eD24UnormS8Uint : return 4;
|
|
|
339 case Format::eD32SfloatS8Uint : return 5;
|
|
|
340 case Format::eBc1RgbUnormBlock : return 8;
|
|
|
341 case Format::eBc1RgbSrgbBlock : return 8;
|
|
|
342 case Format::eBc1RgbaUnormBlock : return 8;
|
|
|
343 case Format::eBc1RgbaSrgbBlock : return 8;
|
|
|
344 case Format::eBc2UnormBlock : return 16;
|
|
|
345 case Format::eBc2SrgbBlock : return 16;
|
|
|
346 case Format::eBc3UnormBlock : return 16;
|
|
|
347 case Format::eBc3SrgbBlock : return 16;
|
|
|
348 case Format::eBc4UnormBlock : return 8;
|
|
|
349 case Format::eBc4SnormBlock : return 8;
|
|
|
350 case Format::eBc5UnormBlock : return 16;
|
|
|
351 case Format::eBc5SnormBlock : return 16;
|
|
|
352 case Format::eBc6HUfloatBlock : return 16;
|
|
|
353 case Format::eBc6HSfloatBlock : return 16;
|
|
|
354 case Format::eBc7UnormBlock : return 16;
|
|
|
355 case Format::eBc7SrgbBlock : return 16;
|
|
|
356 case Format::eEtc2R8G8B8UnormBlock : return 8;
|
|
|
357 case Format::eEtc2R8G8B8SrgbBlock : return 8;
|
|
|
358 case Format::eEtc2R8G8B8A1UnormBlock : return 8;
|
|
|
359 case Format::eEtc2R8G8B8A1SrgbBlock : return 8;
|
|
|
360 case Format::eEtc2R8G8B8A8UnormBlock : return 16;
|
|
|
361 case Format::eEtc2R8G8B8A8SrgbBlock : return 16;
|
|
|
362 case Format::eEacR11UnormBlock : return 8;
|
|
|
363 case Format::eEacR11SnormBlock : return 8;
|
|
|
364 case Format::eEacR11G11UnormBlock : return 16;
|
|
|
365 case Format::eEacR11G11SnormBlock : return 16;
|
|
|
366 case Format::eAstc4x4UnormBlock : return 16;
|
|
|
367 case Format::eAstc4x4SrgbBlock : return 16;
|
|
|
368 case Format::eAstc5x4UnormBlock : return 16;
|
|
|
369 case Format::eAstc5x4SrgbBlock : return 16;
|
|
|
370 case Format::eAstc5x5UnormBlock : return 16;
|
|
|
371 case Format::eAstc5x5SrgbBlock : return 16;
|
|
|
372 case Format::eAstc6x5UnormBlock : return 16;
|
|
|
373 case Format::eAstc6x5SrgbBlock : return 16;
|
|
|
374 case Format::eAstc6x6UnormBlock : return 16;
|
|
|
375 case Format::eAstc6x6SrgbBlock : return 16;
|
|
|
376 case Format::eAstc8x5UnormBlock : return 16;
|
|
|
377 case Format::eAstc8x5SrgbBlock : return 16;
|
|
|
378 case Format::eAstc8x6UnormBlock : return 16;
|
|
|
379 case Format::eAstc8x6SrgbBlock : return 16;
|
|
|
380 case Format::eAstc8x8UnormBlock : return 16;
|
|
|
381 case Format::eAstc8x8SrgbBlock : return 16;
|
|
|
382 case Format::eAstc10x5UnormBlock : return 16;
|
|
|
383 case Format::eAstc10x5SrgbBlock : return 16;
|
|
|
384 case Format::eAstc10x6UnormBlock : return 16;
|
|
|
385 case Format::eAstc10x6SrgbBlock : return 16;
|
|
|
386 case Format::eAstc10x8UnormBlock : return 16;
|
|
|
387 case Format::eAstc10x8SrgbBlock : return 16;
|
|
|
388 case Format::eAstc10x10UnormBlock : return 16;
|
|
|
389 case Format::eAstc10x10SrgbBlock : return 16;
|
|
|
390 case Format::eAstc12x10UnormBlock : return 16;
|
|
|
391 case Format::eAstc12x10SrgbBlock : return 16;
|
|
|
392 case Format::eAstc12x12UnormBlock : return 16;
|
|
|
393 case Format::eAstc12x12SrgbBlock : return 16;
|
|
|
394 case Format::eG8B8G8R8422Unorm : return 4;
|
|
|
395 case Format::eB8G8R8G8422Unorm : return 4;
|
|
|
396 case Format::eG8B8R83Plane420Unorm : return 3;
|
|
|
397 case Format::eG8B8R82Plane420Unorm : return 3;
|
|
|
398 case Format::eG8B8R83Plane422Unorm : return 3;
|
|
|
399 case Format::eG8B8R82Plane422Unorm : return 3;
|
|
|
400 case Format::eG8B8R83Plane444Unorm : return 3;
|
|
|
401 case Format::eR10X6UnormPack16 : return 2;
|
|
|
402 case Format::eR10X6G10X6Unorm2Pack16 : return 4;
|
|
|
403 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16 : return 8;
|
|
|
404 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16 : return 8;
|
|
|
405 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16 : return 8;
|
|
|
406 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return 6;
|
|
|
407 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return 6;
|
|
|
408 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return 6;
|
|
|
409 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return 6;
|
|
|
410 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return 6;
|
|
|
411 case Format::eR12X4UnormPack16 : return 2;
|
|
|
412 case Format::eR12X4G12X4Unorm2Pack16 : return 4;
|
|
|
413 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16 : return 8;
|
|
|
414 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16 : return 8;
|
|
|
415 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16 : return 8;
|
|
|
416 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return 6;
|
|
|
417 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return 6;
|
|
|
418 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return 6;
|
|
|
419 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return 6;
|
|
|
420 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return 6;
|
|
|
421 case Format::eG16B16G16R16422Unorm : return 8;
|
|
|
422 case Format::eB16G16R16G16422Unorm : return 8;
|
|
|
423 case Format::eG16B16R163Plane420Unorm : return 6;
|
|
|
424 case Format::eG16B16R162Plane420Unorm : return 6;
|
|
|
425 case Format::eG16B16R163Plane422Unorm : return 6;
|
|
|
426 case Format::eG16B16R162Plane422Unorm : return 6;
|
|
|
427 case Format::eG16B16R163Plane444Unorm : return 6;
|
|
|
428 case Format::eG8B8R82Plane444Unorm : return 3;
|
|
|
429 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return 6;
|
|
|
430 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return 6;
|
|
|
431 case Format::eG16B16R162Plane444Unorm : return 6;
|
|
|
432 case Format::eA4R4G4B4UnormPack16 : return 2;
|
|
|
433 case Format::eA4B4G4R4UnormPack16 : return 2;
|
|
|
434 case Format::eAstc4x4SfloatBlock : return 16;
|
|
|
435 case Format::eAstc5x4SfloatBlock : return 16;
|
|
|
436 case Format::eAstc5x5SfloatBlock : return 16;
|
|
|
437 case Format::eAstc6x5SfloatBlock : return 16;
|
|
|
438 case Format::eAstc6x6SfloatBlock : return 16;
|
|
|
439 case Format::eAstc8x5SfloatBlock : return 16;
|
|
|
440 case Format::eAstc8x6SfloatBlock : return 16;
|
|
|
441 case Format::eAstc8x8SfloatBlock : return 16;
|
|
|
442 case Format::eAstc10x5SfloatBlock : return 16;
|
|
|
443 case Format::eAstc10x6SfloatBlock : return 16;
|
|
|
444 case Format::eAstc10x8SfloatBlock : return 16;
|
|
|
445 case Format::eAstc10x10SfloatBlock : return 16;
|
|
|
446 case Format::eAstc12x10SfloatBlock : return 16;
|
|
|
447 case Format::eAstc12x12SfloatBlock : return 16;
|
|
|
448 case Format::eA1B5G5R5UnormPack16 : return 2;
|
|
|
449 case Format::eA8Unorm : return 1;
|
|
|
450 case Format::ePvrtc12BppUnormBlockIMG : return 8;
|
|
|
451 case Format::ePvrtc14BppUnormBlockIMG : return 8;
|
|
|
452 case Format::ePvrtc22BppUnormBlockIMG : return 8;
|
|
|
453 case Format::ePvrtc24BppUnormBlockIMG : return 8;
|
|
|
454 case Format::ePvrtc12BppSrgbBlockIMG : return 8;
|
|
|
455 case Format::ePvrtc14BppSrgbBlockIMG : return 8;
|
|
|
456 case Format::ePvrtc22BppSrgbBlockIMG : return 8;
|
|
|
457 case Format::ePvrtc24BppSrgbBlockIMG : return 8;
|
|
|
458 case Format::eR8BoolARM : return 1;
|
|
|
459 case Format::eR16G16Sfixed5NV : return 4;
|
|
|
460 case Format::eR10X6UintPack16ARM : return 2;
|
|
|
461 case Format::eR10X6G10X6Uint2Pack16ARM : return 4;
|
|
|
462 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM : return 8;
|
|
|
463 case Format::eR12X4UintPack16ARM : return 2;
|
|
|
464 case Format::eR12X4G12X4Uint2Pack16ARM : return 4;
|
|
|
465 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM : return 8;
|
|
|
466 case Format::eR14X2UintPack16ARM : return 2;
|
|
|
467 case Format::eR14X2G14X2Uint2Pack16ARM : return 4;
|
|
|
468 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM : return 8;
|
|
|
469 case Format::eR14X2UnormPack16ARM : return 2;
|
|
|
470 case Format::eR14X2G14X2Unorm2Pack16ARM : return 4;
|
|
|
471 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM : return 8;
|
|
|
472 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return 6;
|
|
|
473 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return 6;
|
|
|
474
|
|
|
475 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
476 }
|
|
|
477 }
|
|
|
478
|
|
|
479 // The class of the format (can't be just named "class"!)
|
|
|
480 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 char const * compatibilityClass( Format format )
|
|
|
481 {
|
|
|
482 switch ( format )
|
|
|
483 {
|
|
|
484 case Format::eR4G4UnormPack8 : return "8-bit";
|
|
|
485 case Format::eR4G4B4A4UnormPack16 : return "16-bit";
|
|
|
486 case Format::eB4G4R4A4UnormPack16 : return "16-bit";
|
|
|
487 case Format::eR5G6B5UnormPack16 : return "16-bit";
|
|
|
488 case Format::eB5G6R5UnormPack16 : return "16-bit";
|
|
|
489 case Format::eR5G5B5A1UnormPack16 : return "16-bit";
|
|
|
490 case Format::eB5G5R5A1UnormPack16 : return "16-bit";
|
|
|
491 case Format::eA1R5G5B5UnormPack16 : return "16-bit";
|
|
|
492 case Format::eR8Unorm : return "8-bit";
|
|
|
493 case Format::eR8Snorm : return "8-bit";
|
|
|
494 case Format::eR8Uscaled : return "8-bit";
|
|
|
495 case Format::eR8Sscaled : return "8-bit";
|
|
|
496 case Format::eR8Uint : return "8-bit";
|
|
|
497 case Format::eR8Sint : return "8-bit";
|
|
|
498 case Format::eR8Srgb : return "8-bit";
|
|
|
499 case Format::eR8G8Unorm : return "16-bit";
|
|
|
500 case Format::eR8G8Snorm : return "16-bit";
|
|
|
501 case Format::eR8G8Uscaled : return "16-bit";
|
|
|
502 case Format::eR8G8Sscaled : return "16-bit";
|
|
|
503 case Format::eR8G8Uint : return "16-bit";
|
|
|
504 case Format::eR8G8Sint : return "16-bit";
|
|
|
505 case Format::eR8G8Srgb : return "16-bit";
|
|
|
506 case Format::eR8G8B8Unorm : return "24-bit";
|
|
|
507 case Format::eR8G8B8Snorm : return "24-bit";
|
|
|
508 case Format::eR8G8B8Uscaled : return "24-bit";
|
|
|
509 case Format::eR8G8B8Sscaled : return "24-bit";
|
|
|
510 case Format::eR8G8B8Uint : return "24-bit";
|
|
|
511 case Format::eR8G8B8Sint : return "24-bit";
|
|
|
512 case Format::eR8G8B8Srgb : return "24-bit";
|
|
|
513 case Format::eB8G8R8Unorm : return "24-bit";
|
|
|
514 case Format::eB8G8R8Snorm : return "24-bit";
|
|
|
515 case Format::eB8G8R8Uscaled : return "24-bit";
|
|
|
516 case Format::eB8G8R8Sscaled : return "24-bit";
|
|
|
517 case Format::eB8G8R8Uint : return "24-bit";
|
|
|
518 case Format::eB8G8R8Sint : return "24-bit";
|
|
|
519 case Format::eB8G8R8Srgb : return "24-bit";
|
|
|
520 case Format::eR8G8B8A8Unorm : return "32-bit";
|
|
|
521 case Format::eR8G8B8A8Snorm : return "32-bit";
|
|
|
522 case Format::eR8G8B8A8Uscaled : return "32-bit";
|
|
|
523 case Format::eR8G8B8A8Sscaled : return "32-bit";
|
|
|
524 case Format::eR8G8B8A8Uint : return "32-bit";
|
|
|
525 case Format::eR8G8B8A8Sint : return "32-bit";
|
|
|
526 case Format::eR8G8B8A8Srgb : return "32-bit";
|
|
|
527 case Format::eB8G8R8A8Unorm : return "32-bit";
|
|
|
528 case Format::eB8G8R8A8Snorm : return "32-bit";
|
|
|
529 case Format::eB8G8R8A8Uscaled : return "32-bit";
|
|
|
530 case Format::eB8G8R8A8Sscaled : return "32-bit";
|
|
|
531 case Format::eB8G8R8A8Uint : return "32-bit";
|
|
|
532 case Format::eB8G8R8A8Sint : return "32-bit";
|
|
|
533 case Format::eB8G8R8A8Srgb : return "32-bit";
|
|
|
534 case Format::eA8B8G8R8UnormPack32 : return "32-bit";
|
|
|
535 case Format::eA8B8G8R8SnormPack32 : return "32-bit";
|
|
|
536 case Format::eA8B8G8R8UscaledPack32 : return "32-bit";
|
|
|
537 case Format::eA8B8G8R8SscaledPack32 : return "32-bit";
|
|
|
538 case Format::eA8B8G8R8UintPack32 : return "32-bit";
|
|
|
539 case Format::eA8B8G8R8SintPack32 : return "32-bit";
|
|
|
540 case Format::eA8B8G8R8SrgbPack32 : return "32-bit";
|
|
|
541 case Format::eA2R10G10B10UnormPack32 : return "32-bit";
|
|
|
542 case Format::eA2R10G10B10SnormPack32 : return "32-bit";
|
|
|
543 case Format::eA2R10G10B10UscaledPack32 : return "32-bit";
|
|
|
544 case Format::eA2R10G10B10SscaledPack32 : return "32-bit";
|
|
|
545 case Format::eA2R10G10B10UintPack32 : return "32-bit";
|
|
|
546 case Format::eA2R10G10B10SintPack32 : return "32-bit";
|
|
|
547 case Format::eA2B10G10R10UnormPack32 : return "32-bit";
|
|
|
548 case Format::eA2B10G10R10SnormPack32 : return "32-bit";
|
|
|
549 case Format::eA2B10G10R10UscaledPack32 : return "32-bit";
|
|
|
550 case Format::eA2B10G10R10SscaledPack32 : return "32-bit";
|
|
|
551 case Format::eA2B10G10R10UintPack32 : return "32-bit";
|
|
|
552 case Format::eA2B10G10R10SintPack32 : return "32-bit";
|
|
|
553 case Format::eR16Unorm : return "16-bit";
|
|
|
554 case Format::eR16Snorm : return "16-bit";
|
|
|
555 case Format::eR16Uscaled : return "16-bit";
|
|
|
556 case Format::eR16Sscaled : return "16-bit";
|
|
|
557 case Format::eR16Uint : return "16-bit";
|
|
|
558 case Format::eR16Sint : return "16-bit";
|
|
|
559 case Format::eR16Sfloat : return "16-bit";
|
|
|
560 case Format::eR16G16Unorm : return "32-bit";
|
|
|
561 case Format::eR16G16Snorm : return "32-bit";
|
|
|
562 case Format::eR16G16Uscaled : return "32-bit";
|
|
|
563 case Format::eR16G16Sscaled : return "32-bit";
|
|
|
564 case Format::eR16G16Uint : return "32-bit";
|
|
|
565 case Format::eR16G16Sint : return "32-bit";
|
|
|
566 case Format::eR16G16Sfloat : return "32-bit";
|
|
|
567 case Format::eR16G16B16Unorm : return "48-bit";
|
|
|
568 case Format::eR16G16B16Snorm : return "48-bit";
|
|
|
569 case Format::eR16G16B16Uscaled : return "48-bit";
|
|
|
570 case Format::eR16G16B16Sscaled : return "48-bit";
|
|
|
571 case Format::eR16G16B16Uint : return "48-bit";
|
|
|
572 case Format::eR16G16B16Sint : return "48-bit";
|
|
|
573 case Format::eR16G16B16Sfloat : return "48-bit";
|
|
|
574 case Format::eR16G16B16A16Unorm : return "64-bit";
|
|
|
575 case Format::eR16G16B16A16Snorm : return "64-bit";
|
|
|
576 case Format::eR16G16B16A16Uscaled : return "64-bit";
|
|
|
577 case Format::eR16G16B16A16Sscaled : return "64-bit";
|
|
|
578 case Format::eR16G16B16A16Uint : return "64-bit";
|
|
|
579 case Format::eR16G16B16A16Sint : return "64-bit";
|
|
|
580 case Format::eR16G16B16A16Sfloat : return "64-bit";
|
|
|
581 case Format::eR32Uint : return "32-bit";
|
|
|
582 case Format::eR32Sint : return "32-bit";
|
|
|
583 case Format::eR32Sfloat : return "32-bit";
|
|
|
584 case Format::eR32G32Uint : return "64-bit";
|
|
|
585 case Format::eR32G32Sint : return "64-bit";
|
|
|
586 case Format::eR32G32Sfloat : return "64-bit";
|
|
|
587 case Format::eR32G32B32Uint : return "96-bit";
|
|
|
588 case Format::eR32G32B32Sint : return "96-bit";
|
|
|
589 case Format::eR32G32B32Sfloat : return "96-bit";
|
|
|
590 case Format::eR32G32B32A32Uint : return "128-bit";
|
|
|
591 case Format::eR32G32B32A32Sint : return "128-bit";
|
|
|
592 case Format::eR32G32B32A32Sfloat : return "128-bit";
|
|
|
593 case Format::eR64Uint : return "64-bit";
|
|
|
594 case Format::eR64Sint : return "64-bit";
|
|
|
595 case Format::eR64Sfloat : return "64-bit";
|
|
|
596 case Format::eR64G64Uint : return "128-bit";
|
|
|
597 case Format::eR64G64Sint : return "128-bit";
|
|
|
598 case Format::eR64G64Sfloat : return "128-bit";
|
|
|
599 case Format::eR64G64B64Uint : return "192-bit";
|
|
|
600 case Format::eR64G64B64Sint : return "192-bit";
|
|
|
601 case Format::eR64G64B64Sfloat : return "192-bit";
|
|
|
602 case Format::eR64G64B64A64Uint : return "256-bit";
|
|
|
603 case Format::eR64G64B64A64Sint : return "256-bit";
|
|
|
604 case Format::eR64G64B64A64Sfloat : return "256-bit";
|
|
|
605 case Format::eB10G11R11UfloatPack32 : return "32-bit";
|
|
|
606 case Format::eE5B9G9R9UfloatPack32 : return "32-bit";
|
|
|
607 case Format::eD16Unorm : return "D16";
|
|
|
608 case Format::eX8D24UnormPack32 : return "D24";
|
|
|
609 case Format::eD32Sfloat : return "D32";
|
|
|
610 case Format::eS8Uint : return "S8";
|
|
|
611 case Format::eD16UnormS8Uint : return "D16S8";
|
|
|
612 case Format::eD24UnormS8Uint : return "D24S8";
|
|
|
613 case Format::eD32SfloatS8Uint : return "D32S8";
|
|
|
614 case Format::eBc1RgbUnormBlock : return "BC1_RGB";
|
|
|
615 case Format::eBc1RgbSrgbBlock : return "BC1_RGB";
|
|
|
616 case Format::eBc1RgbaUnormBlock : return "BC1_RGBA";
|
|
|
617 case Format::eBc1RgbaSrgbBlock : return "BC1_RGBA";
|
|
|
618 case Format::eBc2UnormBlock : return "BC2";
|
|
|
619 case Format::eBc2SrgbBlock : return "BC2";
|
|
|
620 case Format::eBc3UnormBlock : return "BC3";
|
|
|
621 case Format::eBc3SrgbBlock : return "BC3";
|
|
|
622 case Format::eBc4UnormBlock : return "BC4";
|
|
|
623 case Format::eBc4SnormBlock : return "BC4";
|
|
|
624 case Format::eBc5UnormBlock : return "BC5";
|
|
|
625 case Format::eBc5SnormBlock : return "BC5";
|
|
|
626 case Format::eBc6HUfloatBlock : return "BC6H";
|
|
|
627 case Format::eBc6HSfloatBlock : return "BC6H";
|
|
|
628 case Format::eBc7UnormBlock : return "BC7";
|
|
|
629 case Format::eBc7SrgbBlock : return "BC7";
|
|
|
630 case Format::eEtc2R8G8B8UnormBlock : return "ETC2_RGB";
|
|
|
631 case Format::eEtc2R8G8B8SrgbBlock : return "ETC2_RGB";
|
|
|
632 case Format::eEtc2R8G8B8A1UnormBlock : return "ETC2_RGBA";
|
|
|
633 case Format::eEtc2R8G8B8A1SrgbBlock : return "ETC2_RGBA";
|
|
|
634 case Format::eEtc2R8G8B8A8UnormBlock : return "ETC2_EAC_RGBA";
|
|
|
635 case Format::eEtc2R8G8B8A8SrgbBlock : return "ETC2_EAC_RGBA";
|
|
|
636 case Format::eEacR11UnormBlock : return "EAC_R";
|
|
|
637 case Format::eEacR11SnormBlock : return "EAC_R";
|
|
|
638 case Format::eEacR11G11UnormBlock : return "EAC_RG";
|
|
|
639 case Format::eEacR11G11SnormBlock : return "EAC_RG";
|
|
|
640 case Format::eAstc4x4UnormBlock : return "ASTC_4x4";
|
|
|
641 case Format::eAstc4x4SrgbBlock : return "ASTC_4x4";
|
|
|
642 case Format::eAstc5x4UnormBlock : return "ASTC_5x4";
|
|
|
643 case Format::eAstc5x4SrgbBlock : return "ASTC_5x4";
|
|
|
644 case Format::eAstc5x5UnormBlock : return "ASTC_5x5";
|
|
|
645 case Format::eAstc5x5SrgbBlock : return "ASTC_5x5";
|
|
|
646 case Format::eAstc6x5UnormBlock : return "ASTC_6x5";
|
|
|
647 case Format::eAstc6x5SrgbBlock : return "ASTC_6x5";
|
|
|
648 case Format::eAstc6x6UnormBlock : return "ASTC_6x6";
|
|
|
649 case Format::eAstc6x6SrgbBlock : return "ASTC_6x6";
|
|
|
650 case Format::eAstc8x5UnormBlock : return "ASTC_8x5";
|
|
|
651 case Format::eAstc8x5SrgbBlock : return "ASTC_8x5";
|
|
|
652 case Format::eAstc8x6UnormBlock : return "ASTC_8x6";
|
|
|
653 case Format::eAstc8x6SrgbBlock : return "ASTC_8x6";
|
|
|
654 case Format::eAstc8x8UnormBlock : return "ASTC_8x8";
|
|
|
655 case Format::eAstc8x8SrgbBlock : return "ASTC_8x8";
|
|
|
656 case Format::eAstc10x5UnormBlock : return "ASTC_10x5";
|
|
|
657 case Format::eAstc10x5SrgbBlock : return "ASTC_10x5";
|
|
|
658 case Format::eAstc10x6UnormBlock : return "ASTC_10x6";
|
|
|
659 case Format::eAstc10x6SrgbBlock : return "ASTC_10x6";
|
|
|
660 case Format::eAstc10x8UnormBlock : return "ASTC_10x8";
|
|
|
661 case Format::eAstc10x8SrgbBlock : return "ASTC_10x8";
|
|
|
662 case Format::eAstc10x10UnormBlock : return "ASTC_10x10";
|
|
|
663 case Format::eAstc10x10SrgbBlock : return "ASTC_10x10";
|
|
|
664 case Format::eAstc12x10UnormBlock : return "ASTC_12x10";
|
|
|
665 case Format::eAstc12x10SrgbBlock : return "ASTC_12x10";
|
|
|
666 case Format::eAstc12x12UnormBlock : return "ASTC_12x12";
|
|
|
667 case Format::eAstc12x12SrgbBlock : return "ASTC_12x12";
|
|
|
668 case Format::eG8B8G8R8422Unorm : return "32-bit G8B8G8R8";
|
|
|
669 case Format::eB8G8R8G8422Unorm : return "32-bit B8G8R8G8";
|
|
|
670 case Format::eG8B8R83Plane420Unorm : return "8-bit 3-plane 420";
|
|
|
671 case Format::eG8B8R82Plane420Unorm : return "8-bit 2-plane 420";
|
|
|
672 case Format::eG8B8R83Plane422Unorm : return "8-bit 3-plane 422";
|
|
|
673 case Format::eG8B8R82Plane422Unorm : return "8-bit 2-plane 422";
|
|
|
674 case Format::eG8B8R83Plane444Unorm : return "8-bit 3-plane 444";
|
|
|
675 case Format::eR10X6UnormPack16 : return "16-bit";
|
|
|
676 case Format::eR10X6G10X6Unorm2Pack16 : return "32-bit";
|
|
|
677 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16 : return "64-bit R10G10B10A10";
|
|
|
678 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16 : return "64-bit G10B10G10R10";
|
|
|
679 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16 : return "64-bit B10G10R10G10";
|
|
|
680 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return "10-bit 3-plane 420";
|
|
|
681 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return "10-bit 2-plane 420";
|
|
|
682 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return "10-bit 3-plane 422";
|
|
|
683 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return "10-bit 2-plane 422";
|
|
|
684 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return "10-bit 3-plane 444";
|
|
|
685 case Format::eR12X4UnormPack16 : return "16-bit";
|
|
|
686 case Format::eR12X4G12X4Unorm2Pack16 : return "32-bit";
|
|
|
687 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16 : return "64-bit R12G12B12A12";
|
|
|
688 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16 : return "64-bit G12B12G12R12";
|
|
|
689 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16 : return "64-bit B12G12R12G12";
|
|
|
690 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return "12-bit 3-plane 420";
|
|
|
691 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return "12-bit 2-plane 420";
|
|
|
692 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return "12-bit 3-plane 422";
|
|
|
693 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return "12-bit 2-plane 422";
|
|
|
694 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return "12-bit 3-plane 444";
|
|
|
695 case Format::eG16B16G16R16422Unorm : return "64-bit G16B16G16R16";
|
|
|
696 case Format::eB16G16R16G16422Unorm : return "64-bit B16G16R16G16";
|
|
|
697 case Format::eG16B16R163Plane420Unorm : return "16-bit 3-plane 420";
|
|
|
698 case Format::eG16B16R162Plane420Unorm : return "16-bit 2-plane 420";
|
|
|
699 case Format::eG16B16R163Plane422Unorm : return "16-bit 3-plane 422";
|
|
|
700 case Format::eG16B16R162Plane422Unorm : return "16-bit 2-plane 422";
|
|
|
701 case Format::eG16B16R163Plane444Unorm : return "16-bit 3-plane 444";
|
|
|
702 case Format::eG8B8R82Plane444Unorm : return "8-bit 2-plane 444";
|
|
|
703 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return "10-bit 2-plane 444";
|
|
|
704 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return "12-bit 2-plane 444";
|
|
|
705 case Format::eG16B16R162Plane444Unorm : return "16-bit 2-plane 444";
|
|
|
706 case Format::eA4R4G4B4UnormPack16 : return "16-bit";
|
|
|
707 case Format::eA4B4G4R4UnormPack16 : return "16-bit";
|
|
|
708 case Format::eAstc4x4SfloatBlock : return "ASTC_4x4";
|
|
|
709 case Format::eAstc5x4SfloatBlock : return "ASTC_5x4";
|
|
|
710 case Format::eAstc5x5SfloatBlock : return "ASTC_5x5";
|
|
|
711 case Format::eAstc6x5SfloatBlock : return "ASTC_6x5";
|
|
|
712 case Format::eAstc6x6SfloatBlock : return "ASTC_6x6";
|
|
|
713 case Format::eAstc8x5SfloatBlock : return "ASTC_8x5";
|
|
|
714 case Format::eAstc8x6SfloatBlock : return "ASTC_8x6";
|
|
|
715 case Format::eAstc8x8SfloatBlock : return "ASTC_8x8";
|
|
|
716 case Format::eAstc10x5SfloatBlock : return "ASTC_10x5";
|
|
|
717 case Format::eAstc10x6SfloatBlock : return "ASTC_10x6";
|
|
|
718 case Format::eAstc10x8SfloatBlock : return "ASTC_10x8";
|
|
|
719 case Format::eAstc10x10SfloatBlock : return "ASTC_10x10";
|
|
|
720 case Format::eAstc12x10SfloatBlock : return "ASTC_12x10";
|
|
|
721 case Format::eAstc12x12SfloatBlock : return "ASTC_12x12";
|
|
|
722 case Format::eA1B5G5R5UnormPack16 : return "16-bit";
|
|
|
723 case Format::eA8Unorm : return "8-bit alpha";
|
|
|
724 case Format::ePvrtc12BppUnormBlockIMG : return "PVRTC1_2BPP";
|
|
|
725 case Format::ePvrtc14BppUnormBlockIMG : return "PVRTC1_4BPP";
|
|
|
726 case Format::ePvrtc22BppUnormBlockIMG : return "PVRTC2_2BPP";
|
|
|
727 case Format::ePvrtc24BppUnormBlockIMG : return "PVRTC2_4BPP";
|
|
|
728 case Format::ePvrtc12BppSrgbBlockIMG : return "PVRTC1_2BPP";
|
|
|
729 case Format::ePvrtc14BppSrgbBlockIMG : return "PVRTC1_4BPP";
|
|
|
730 case Format::ePvrtc22BppSrgbBlockIMG : return "PVRTC2_2BPP";
|
|
|
731 case Format::ePvrtc24BppSrgbBlockIMG : return "PVRTC2_4BPP";
|
|
|
732 case Format::eR8BoolARM : return "8-bit";
|
|
|
733 case Format::eR16G16Sfixed5NV : return "32-bit";
|
|
|
734 case Format::eR10X6UintPack16ARM : return "16-bit";
|
|
|
735 case Format::eR10X6G10X6Uint2Pack16ARM : return "32-bit";
|
|
|
736 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM : return "64-bit R10G10B10A10";
|
|
|
737 case Format::eR12X4UintPack16ARM : return "16-bit";
|
|
|
738 case Format::eR12X4G12X4Uint2Pack16ARM : return "32-bit";
|
|
|
739 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM : return "64-bit R12G12B12A12";
|
|
|
740 case Format::eR14X2UintPack16ARM : return "16-bit";
|
|
|
741 case Format::eR14X2G14X2Uint2Pack16ARM : return "32-bit";
|
|
|
742 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM : return "64-bit R14G14B14A14";
|
|
|
743 case Format::eR14X2UnormPack16ARM : return "16-bit";
|
|
|
744 case Format::eR14X2G14X2Unorm2Pack16ARM : return "32-bit";
|
|
|
745 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM : return "64-bit R14G14B14A14";
|
|
|
746 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return "14-bit 2-plane 420";
|
|
|
747 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return "14-bit 2-plane 422";
|
|
|
748
|
|
|
749 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
750 }
|
|
|
751 }
|
|
|
752
|
|
|
753 // The number of bits in this component, if not compressed, otherwise 0.
|
|
|
754 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t componentBits( Format format, uint8_t component )
|
|
|
755 {
|
|
|
756 switch ( format )
|
|
|
757 {
|
|
|
758 case Format::eR4G4UnormPack8:
|
|
|
759 switch ( component )
|
|
|
760 {
|
|
|
761 case 0 : return 4;
|
|
|
762 case 1 : return 4;
|
|
|
763 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
764 }
|
|
|
765 case Format::eR4G4B4A4UnormPack16:
|
|
|
766 switch ( component )
|
|
|
767 {
|
|
|
768 case 0 : return 4;
|
|
|
769 case 1 : return 4;
|
|
|
770 case 2 : return 4;
|
|
|
771 case 3 : return 4;
|
|
|
772 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
773 }
|
|
|
774 case Format::eB4G4R4A4UnormPack16:
|
|
|
775 switch ( component )
|
|
|
776 {
|
|
|
777 case 0 : return 4;
|
|
|
778 case 1 : return 4;
|
|
|
779 case 2 : return 4;
|
|
|
780 case 3 : return 4;
|
|
|
781 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
782 }
|
|
|
783 case Format::eR5G6B5UnormPack16:
|
|
|
784 switch ( component )
|
|
|
785 {
|
|
|
786 case 0 : return 5;
|
|
|
787 case 1 : return 6;
|
|
|
788 case 2 : return 5;
|
|
|
789 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
790 }
|
|
|
791 case Format::eB5G6R5UnormPack16:
|
|
|
792 switch ( component )
|
|
|
793 {
|
|
|
794 case 0 : return 5;
|
|
|
795 case 1 : return 6;
|
|
|
796 case 2 : return 5;
|
|
|
797 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
798 }
|
|
|
799 case Format::eR5G5B5A1UnormPack16:
|
|
|
800 switch ( component )
|
|
|
801 {
|
|
|
802 case 0 : return 5;
|
|
|
803 case 1 : return 5;
|
|
|
804 case 2 : return 5;
|
|
|
805 case 3 : return 1;
|
|
|
806 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
807 }
|
|
|
808 case Format::eB5G5R5A1UnormPack16:
|
|
|
809 switch ( component )
|
|
|
810 {
|
|
|
811 case 0 : return 5;
|
|
|
812 case 1 : return 5;
|
|
|
813 case 2 : return 5;
|
|
|
814 case 3 : return 1;
|
|
|
815 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
816 }
|
|
|
817 case Format::eA1R5G5B5UnormPack16:
|
|
|
818 switch ( component )
|
|
|
819 {
|
|
|
820 case 0 : return 1;
|
|
|
821 case 1 : return 5;
|
|
|
822 case 2 : return 5;
|
|
|
823 case 3 : return 5;
|
|
|
824 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
825 }
|
|
|
826 case Format::eR8Unorm:
|
|
|
827 switch ( component )
|
|
|
828 {
|
|
|
829 case 0 : return 8;
|
|
|
830 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
831 }
|
|
|
832 case Format::eR8Snorm:
|
|
|
833 switch ( component )
|
|
|
834 {
|
|
|
835 case 0 : return 8;
|
|
|
836 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
837 }
|
|
|
838 case Format::eR8Uscaled:
|
|
|
839 switch ( component )
|
|
|
840 {
|
|
|
841 case 0 : return 8;
|
|
|
842 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
843 }
|
|
|
844 case Format::eR8Sscaled:
|
|
|
845 switch ( component )
|
|
|
846 {
|
|
|
847 case 0 : return 8;
|
|
|
848 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
849 }
|
|
|
850 case Format::eR8Uint:
|
|
|
851 switch ( component )
|
|
|
852 {
|
|
|
853 case 0 : return 8;
|
|
|
854 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
855 }
|
|
|
856 case Format::eR8Sint:
|
|
|
857 switch ( component )
|
|
|
858 {
|
|
|
859 case 0 : return 8;
|
|
|
860 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
861 }
|
|
|
862 case Format::eR8Srgb:
|
|
|
863 switch ( component )
|
|
|
864 {
|
|
|
865 case 0 : return 8;
|
|
|
866 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
867 }
|
|
|
868 case Format::eR8G8Unorm:
|
|
|
869 switch ( component )
|
|
|
870 {
|
|
|
871 case 0 : return 8;
|
|
|
872 case 1 : return 8;
|
|
|
873 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
874 }
|
|
|
875 case Format::eR8G8Snorm:
|
|
|
876 switch ( component )
|
|
|
877 {
|
|
|
878 case 0 : return 8;
|
|
|
879 case 1 : return 8;
|
|
|
880 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
881 }
|
|
|
882 case Format::eR8G8Uscaled:
|
|
|
883 switch ( component )
|
|
|
884 {
|
|
|
885 case 0 : return 8;
|
|
|
886 case 1 : return 8;
|
|
|
887 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
888 }
|
|
|
889 case Format::eR8G8Sscaled:
|
|
|
890 switch ( component )
|
|
|
891 {
|
|
|
892 case 0 : return 8;
|
|
|
893 case 1 : return 8;
|
|
|
894 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
895 }
|
|
|
896 case Format::eR8G8Uint:
|
|
|
897 switch ( component )
|
|
|
898 {
|
|
|
899 case 0 : return 8;
|
|
|
900 case 1 : return 8;
|
|
|
901 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
902 }
|
|
|
903 case Format::eR8G8Sint:
|
|
|
904 switch ( component )
|
|
|
905 {
|
|
|
906 case 0 : return 8;
|
|
|
907 case 1 : return 8;
|
|
|
908 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
909 }
|
|
|
910 case Format::eR8G8Srgb:
|
|
|
911 switch ( component )
|
|
|
912 {
|
|
|
913 case 0 : return 8;
|
|
|
914 case 1 : return 8;
|
|
|
915 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
916 }
|
|
|
917 case Format::eR8G8B8Unorm:
|
|
|
918 switch ( component )
|
|
|
919 {
|
|
|
920 case 0 : return 8;
|
|
|
921 case 1 : return 8;
|
|
|
922 case 2 : return 8;
|
|
|
923 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
924 }
|
|
|
925 case Format::eR8G8B8Snorm:
|
|
|
926 switch ( component )
|
|
|
927 {
|
|
|
928 case 0 : return 8;
|
|
|
929 case 1 : return 8;
|
|
|
930 case 2 : return 8;
|
|
|
931 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
932 }
|
|
|
933 case Format::eR8G8B8Uscaled:
|
|
|
934 switch ( component )
|
|
|
935 {
|
|
|
936 case 0 : return 8;
|
|
|
937 case 1 : return 8;
|
|
|
938 case 2 : return 8;
|
|
|
939 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
940 }
|
|
|
941 case Format::eR8G8B8Sscaled:
|
|
|
942 switch ( component )
|
|
|
943 {
|
|
|
944 case 0 : return 8;
|
|
|
945 case 1 : return 8;
|
|
|
946 case 2 : return 8;
|
|
|
947 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
948 }
|
|
|
949 case Format::eR8G8B8Uint:
|
|
|
950 switch ( component )
|
|
|
951 {
|
|
|
952 case 0 : return 8;
|
|
|
953 case 1 : return 8;
|
|
|
954 case 2 : return 8;
|
|
|
955 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
956 }
|
|
|
957 case Format::eR8G8B8Sint:
|
|
|
958 switch ( component )
|
|
|
959 {
|
|
|
960 case 0 : return 8;
|
|
|
961 case 1 : return 8;
|
|
|
962 case 2 : return 8;
|
|
|
963 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
964 }
|
|
|
965 case Format::eR8G8B8Srgb:
|
|
|
966 switch ( component )
|
|
|
967 {
|
|
|
968 case 0 : return 8;
|
|
|
969 case 1 : return 8;
|
|
|
970 case 2 : return 8;
|
|
|
971 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
972 }
|
|
|
973 case Format::eB8G8R8Unorm:
|
|
|
974 switch ( component )
|
|
|
975 {
|
|
|
976 case 0 : return 8;
|
|
|
977 case 1 : return 8;
|
|
|
978 case 2 : return 8;
|
|
|
979 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
980 }
|
|
|
981 case Format::eB8G8R8Snorm:
|
|
|
982 switch ( component )
|
|
|
983 {
|
|
|
984 case 0 : return 8;
|
|
|
985 case 1 : return 8;
|
|
|
986 case 2 : return 8;
|
|
|
987 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
988 }
|
|
|
989 case Format::eB8G8R8Uscaled:
|
|
|
990 switch ( component )
|
|
|
991 {
|
|
|
992 case 0 : return 8;
|
|
|
993 case 1 : return 8;
|
|
|
994 case 2 : return 8;
|
|
|
995 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
996 }
|
|
|
997 case Format::eB8G8R8Sscaled:
|
|
|
998 switch ( component )
|
|
|
999 {
|
|
|
1000 case 0 : return 8;
|
|
|
1001 case 1 : return 8;
|
|
|
1002 case 2 : return 8;
|
|
|
1003 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1004 }
|
|
|
1005 case Format::eB8G8R8Uint:
|
|
|
1006 switch ( component )
|
|
|
1007 {
|
|
|
1008 case 0 : return 8;
|
|
|
1009 case 1 : return 8;
|
|
|
1010 case 2 : return 8;
|
|
|
1011 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1012 }
|
|
|
1013 case Format::eB8G8R8Sint:
|
|
|
1014 switch ( component )
|
|
|
1015 {
|
|
|
1016 case 0 : return 8;
|
|
|
1017 case 1 : return 8;
|
|
|
1018 case 2 : return 8;
|
|
|
1019 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1020 }
|
|
|
1021 case Format::eB8G8R8Srgb:
|
|
|
1022 switch ( component )
|
|
|
1023 {
|
|
|
1024 case 0 : return 8;
|
|
|
1025 case 1 : return 8;
|
|
|
1026 case 2 : return 8;
|
|
|
1027 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1028 }
|
|
|
1029 case Format::eR8G8B8A8Unorm:
|
|
|
1030 switch ( component )
|
|
|
1031 {
|
|
|
1032 case 0 : return 8;
|
|
|
1033 case 1 : return 8;
|
|
|
1034 case 2 : return 8;
|
|
|
1035 case 3 : return 8;
|
|
|
1036 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1037 }
|
|
|
1038 case Format::eR8G8B8A8Snorm:
|
|
|
1039 switch ( component )
|
|
|
1040 {
|
|
|
1041 case 0 : return 8;
|
|
|
1042 case 1 : return 8;
|
|
|
1043 case 2 : return 8;
|
|
|
1044 case 3 : return 8;
|
|
|
1045 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1046 }
|
|
|
1047 case Format::eR8G8B8A8Uscaled:
|
|
|
1048 switch ( component )
|
|
|
1049 {
|
|
|
1050 case 0 : return 8;
|
|
|
1051 case 1 : return 8;
|
|
|
1052 case 2 : return 8;
|
|
|
1053 case 3 : return 8;
|
|
|
1054 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1055 }
|
|
|
1056 case Format::eR8G8B8A8Sscaled:
|
|
|
1057 switch ( component )
|
|
|
1058 {
|
|
|
1059 case 0 : return 8;
|
|
|
1060 case 1 : return 8;
|
|
|
1061 case 2 : return 8;
|
|
|
1062 case 3 : return 8;
|
|
|
1063 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1064 }
|
|
|
1065 case Format::eR8G8B8A8Uint:
|
|
|
1066 switch ( component )
|
|
|
1067 {
|
|
|
1068 case 0 : return 8;
|
|
|
1069 case 1 : return 8;
|
|
|
1070 case 2 : return 8;
|
|
|
1071 case 3 : return 8;
|
|
|
1072 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1073 }
|
|
|
1074 case Format::eR8G8B8A8Sint:
|
|
|
1075 switch ( component )
|
|
|
1076 {
|
|
|
1077 case 0 : return 8;
|
|
|
1078 case 1 : return 8;
|
|
|
1079 case 2 : return 8;
|
|
|
1080 case 3 : return 8;
|
|
|
1081 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1082 }
|
|
|
1083 case Format::eR8G8B8A8Srgb:
|
|
|
1084 switch ( component )
|
|
|
1085 {
|
|
|
1086 case 0 : return 8;
|
|
|
1087 case 1 : return 8;
|
|
|
1088 case 2 : return 8;
|
|
|
1089 case 3 : return 8;
|
|
|
1090 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1091 }
|
|
|
1092 case Format::eB8G8R8A8Unorm:
|
|
|
1093 switch ( component )
|
|
|
1094 {
|
|
|
1095 case 0 : return 8;
|
|
|
1096 case 1 : return 8;
|
|
|
1097 case 2 : return 8;
|
|
|
1098 case 3 : return 8;
|
|
|
1099 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1100 }
|
|
|
1101 case Format::eB8G8R8A8Snorm:
|
|
|
1102 switch ( component )
|
|
|
1103 {
|
|
|
1104 case 0 : return 8;
|
|
|
1105 case 1 : return 8;
|
|
|
1106 case 2 : return 8;
|
|
|
1107 case 3 : return 8;
|
|
|
1108 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1109 }
|
|
|
1110 case Format::eB8G8R8A8Uscaled:
|
|
|
1111 switch ( component )
|
|
|
1112 {
|
|
|
1113 case 0 : return 8;
|
|
|
1114 case 1 : return 8;
|
|
|
1115 case 2 : return 8;
|
|
|
1116 case 3 : return 8;
|
|
|
1117 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1118 }
|
|
|
1119 case Format::eB8G8R8A8Sscaled:
|
|
|
1120 switch ( component )
|
|
|
1121 {
|
|
|
1122 case 0 : return 8;
|
|
|
1123 case 1 : return 8;
|
|
|
1124 case 2 : return 8;
|
|
|
1125 case 3 : return 8;
|
|
|
1126 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1127 }
|
|
|
1128 case Format::eB8G8R8A8Uint:
|
|
|
1129 switch ( component )
|
|
|
1130 {
|
|
|
1131 case 0 : return 8;
|
|
|
1132 case 1 : return 8;
|
|
|
1133 case 2 : return 8;
|
|
|
1134 case 3 : return 8;
|
|
|
1135 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1136 }
|
|
|
1137 case Format::eB8G8R8A8Sint:
|
|
|
1138 switch ( component )
|
|
|
1139 {
|
|
|
1140 case 0 : return 8;
|
|
|
1141 case 1 : return 8;
|
|
|
1142 case 2 : return 8;
|
|
|
1143 case 3 : return 8;
|
|
|
1144 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1145 }
|
|
|
1146 case Format::eB8G8R8A8Srgb:
|
|
|
1147 switch ( component )
|
|
|
1148 {
|
|
|
1149 case 0 : return 8;
|
|
|
1150 case 1 : return 8;
|
|
|
1151 case 2 : return 8;
|
|
|
1152 case 3 : return 8;
|
|
|
1153 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1154 }
|
|
|
1155 case Format::eA8B8G8R8UnormPack32:
|
|
|
1156 switch ( component )
|
|
|
1157 {
|
|
|
1158 case 0 : return 8;
|
|
|
1159 case 1 : return 8;
|
|
|
1160 case 2 : return 8;
|
|
|
1161 case 3 : return 8;
|
|
|
1162 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1163 }
|
|
|
1164 case Format::eA8B8G8R8SnormPack32:
|
|
|
1165 switch ( component )
|
|
|
1166 {
|
|
|
1167 case 0 : return 8;
|
|
|
1168 case 1 : return 8;
|
|
|
1169 case 2 : return 8;
|
|
|
1170 case 3 : return 8;
|
|
|
1171 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1172 }
|
|
|
1173 case Format::eA8B8G8R8UscaledPack32:
|
|
|
1174 switch ( component )
|
|
|
1175 {
|
|
|
1176 case 0 : return 8;
|
|
|
1177 case 1 : return 8;
|
|
|
1178 case 2 : return 8;
|
|
|
1179 case 3 : return 8;
|
|
|
1180 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1181 }
|
|
|
1182 case Format::eA8B8G8R8SscaledPack32:
|
|
|
1183 switch ( component )
|
|
|
1184 {
|
|
|
1185 case 0 : return 8;
|
|
|
1186 case 1 : return 8;
|
|
|
1187 case 2 : return 8;
|
|
|
1188 case 3 : return 8;
|
|
|
1189 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1190 }
|
|
|
1191 case Format::eA8B8G8R8UintPack32:
|
|
|
1192 switch ( component )
|
|
|
1193 {
|
|
|
1194 case 0 : return 8;
|
|
|
1195 case 1 : return 8;
|
|
|
1196 case 2 : return 8;
|
|
|
1197 case 3 : return 8;
|
|
|
1198 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1199 }
|
|
|
1200 case Format::eA8B8G8R8SintPack32:
|
|
|
1201 switch ( component )
|
|
|
1202 {
|
|
|
1203 case 0 : return 8;
|
|
|
1204 case 1 : return 8;
|
|
|
1205 case 2 : return 8;
|
|
|
1206 case 3 : return 8;
|
|
|
1207 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1208 }
|
|
|
1209 case Format::eA8B8G8R8SrgbPack32:
|
|
|
1210 switch ( component )
|
|
|
1211 {
|
|
|
1212 case 0 : return 8;
|
|
|
1213 case 1 : return 8;
|
|
|
1214 case 2 : return 8;
|
|
|
1215 case 3 : return 8;
|
|
|
1216 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1217 }
|
|
|
1218 case Format::eA2R10G10B10UnormPack32:
|
|
|
1219 switch ( component )
|
|
|
1220 {
|
|
|
1221 case 0 : return 2;
|
|
|
1222 case 1 : return 10;
|
|
|
1223 case 2 : return 10;
|
|
|
1224 case 3 : return 10;
|
|
|
1225 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1226 }
|
|
|
1227 case Format::eA2R10G10B10SnormPack32:
|
|
|
1228 switch ( component )
|
|
|
1229 {
|
|
|
1230 case 0 : return 2;
|
|
|
1231 case 1 : return 10;
|
|
|
1232 case 2 : return 10;
|
|
|
1233 case 3 : return 10;
|
|
|
1234 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1235 }
|
|
|
1236 case Format::eA2R10G10B10UscaledPack32:
|
|
|
1237 switch ( component )
|
|
|
1238 {
|
|
|
1239 case 0 : return 2;
|
|
|
1240 case 1 : return 10;
|
|
|
1241 case 2 : return 10;
|
|
|
1242 case 3 : return 10;
|
|
|
1243 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1244 }
|
|
|
1245 case Format::eA2R10G10B10SscaledPack32:
|
|
|
1246 switch ( component )
|
|
|
1247 {
|
|
|
1248 case 0 : return 2;
|
|
|
1249 case 1 : return 10;
|
|
|
1250 case 2 : return 10;
|
|
|
1251 case 3 : return 10;
|
|
|
1252 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1253 }
|
|
|
1254 case Format::eA2R10G10B10UintPack32:
|
|
|
1255 switch ( component )
|
|
|
1256 {
|
|
|
1257 case 0 : return 2;
|
|
|
1258 case 1 : return 10;
|
|
|
1259 case 2 : return 10;
|
|
|
1260 case 3 : return 10;
|
|
|
1261 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1262 }
|
|
|
1263 case Format::eA2R10G10B10SintPack32:
|
|
|
1264 switch ( component )
|
|
|
1265 {
|
|
|
1266 case 0 : return 2;
|
|
|
1267 case 1 : return 10;
|
|
|
1268 case 2 : return 10;
|
|
|
1269 case 3 : return 10;
|
|
|
1270 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1271 }
|
|
|
1272 case Format::eA2B10G10R10UnormPack32:
|
|
|
1273 switch ( component )
|
|
|
1274 {
|
|
|
1275 case 0 : return 2;
|
|
|
1276 case 1 : return 10;
|
|
|
1277 case 2 : return 10;
|
|
|
1278 case 3 : return 10;
|
|
|
1279 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1280 }
|
|
|
1281 case Format::eA2B10G10R10SnormPack32:
|
|
|
1282 switch ( component )
|
|
|
1283 {
|
|
|
1284 case 0 : return 2;
|
|
|
1285 case 1 : return 10;
|
|
|
1286 case 2 : return 10;
|
|
|
1287 case 3 : return 10;
|
|
|
1288 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1289 }
|
|
|
1290 case Format::eA2B10G10R10UscaledPack32:
|
|
|
1291 switch ( component )
|
|
|
1292 {
|
|
|
1293 case 0 : return 2;
|
|
|
1294 case 1 : return 10;
|
|
|
1295 case 2 : return 10;
|
|
|
1296 case 3 : return 10;
|
|
|
1297 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1298 }
|
|
|
1299 case Format::eA2B10G10R10SscaledPack32:
|
|
|
1300 switch ( component )
|
|
|
1301 {
|
|
|
1302 case 0 : return 2;
|
|
|
1303 case 1 : return 10;
|
|
|
1304 case 2 : return 10;
|
|
|
1305 case 3 : return 10;
|
|
|
1306 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1307 }
|
|
|
1308 case Format::eA2B10G10R10UintPack32:
|
|
|
1309 switch ( component )
|
|
|
1310 {
|
|
|
1311 case 0 : return 2;
|
|
|
1312 case 1 : return 10;
|
|
|
1313 case 2 : return 10;
|
|
|
1314 case 3 : return 10;
|
|
|
1315 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1316 }
|
|
|
1317 case Format::eA2B10G10R10SintPack32:
|
|
|
1318 switch ( component )
|
|
|
1319 {
|
|
|
1320 case 0 : return 2;
|
|
|
1321 case 1 : return 10;
|
|
|
1322 case 2 : return 10;
|
|
|
1323 case 3 : return 10;
|
|
|
1324 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1325 }
|
|
|
1326 case Format::eR16Unorm:
|
|
|
1327 switch ( component )
|
|
|
1328 {
|
|
|
1329 case 0 : return 16;
|
|
|
1330 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1331 }
|
|
|
1332 case Format::eR16Snorm:
|
|
|
1333 switch ( component )
|
|
|
1334 {
|
|
|
1335 case 0 : return 16;
|
|
|
1336 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1337 }
|
|
|
1338 case Format::eR16Uscaled:
|
|
|
1339 switch ( component )
|
|
|
1340 {
|
|
|
1341 case 0 : return 16;
|
|
|
1342 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1343 }
|
|
|
1344 case Format::eR16Sscaled:
|
|
|
1345 switch ( component )
|
|
|
1346 {
|
|
|
1347 case 0 : return 16;
|
|
|
1348 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1349 }
|
|
|
1350 case Format::eR16Uint:
|
|
|
1351 switch ( component )
|
|
|
1352 {
|
|
|
1353 case 0 : return 16;
|
|
|
1354 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1355 }
|
|
|
1356 case Format::eR16Sint:
|
|
|
1357 switch ( component )
|
|
|
1358 {
|
|
|
1359 case 0 : return 16;
|
|
|
1360 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1361 }
|
|
|
1362 case Format::eR16Sfloat:
|
|
|
1363 switch ( component )
|
|
|
1364 {
|
|
|
1365 case 0 : return 16;
|
|
|
1366 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1367 }
|
|
|
1368 case Format::eR16G16Unorm:
|
|
|
1369 switch ( component )
|
|
|
1370 {
|
|
|
1371 case 0 : return 16;
|
|
|
1372 case 1 : return 16;
|
|
|
1373 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1374 }
|
|
|
1375 case Format::eR16G16Snorm:
|
|
|
1376 switch ( component )
|
|
|
1377 {
|
|
|
1378 case 0 : return 16;
|
|
|
1379 case 1 : return 16;
|
|
|
1380 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1381 }
|
|
|
1382 case Format::eR16G16Uscaled:
|
|
|
1383 switch ( component )
|
|
|
1384 {
|
|
|
1385 case 0 : return 16;
|
|
|
1386 case 1 : return 16;
|
|
|
1387 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1388 }
|
|
|
1389 case Format::eR16G16Sscaled:
|
|
|
1390 switch ( component )
|
|
|
1391 {
|
|
|
1392 case 0 : return 16;
|
|
|
1393 case 1 : return 16;
|
|
|
1394 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1395 }
|
|
|
1396 case Format::eR16G16Uint:
|
|
|
1397 switch ( component )
|
|
|
1398 {
|
|
|
1399 case 0 : return 16;
|
|
|
1400 case 1 : return 16;
|
|
|
1401 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1402 }
|
|
|
1403 case Format::eR16G16Sint:
|
|
|
1404 switch ( component )
|
|
|
1405 {
|
|
|
1406 case 0 : return 16;
|
|
|
1407 case 1 : return 16;
|
|
|
1408 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1409 }
|
|
|
1410 case Format::eR16G16Sfloat:
|
|
|
1411 switch ( component )
|
|
|
1412 {
|
|
|
1413 case 0 : return 16;
|
|
|
1414 case 1 : return 16;
|
|
|
1415 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1416 }
|
|
|
1417 case Format::eR16G16B16Unorm:
|
|
|
1418 switch ( component )
|
|
|
1419 {
|
|
|
1420 case 0 : return 16;
|
|
|
1421 case 1 : return 16;
|
|
|
1422 case 2 : return 16;
|
|
|
1423 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1424 }
|
|
|
1425 case Format::eR16G16B16Snorm:
|
|
|
1426 switch ( component )
|
|
|
1427 {
|
|
|
1428 case 0 : return 16;
|
|
|
1429 case 1 : return 16;
|
|
|
1430 case 2 : return 16;
|
|
|
1431 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1432 }
|
|
|
1433 case Format::eR16G16B16Uscaled:
|
|
|
1434 switch ( component )
|
|
|
1435 {
|
|
|
1436 case 0 : return 16;
|
|
|
1437 case 1 : return 16;
|
|
|
1438 case 2 : return 16;
|
|
|
1439 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1440 }
|
|
|
1441 case Format::eR16G16B16Sscaled:
|
|
|
1442 switch ( component )
|
|
|
1443 {
|
|
|
1444 case 0 : return 16;
|
|
|
1445 case 1 : return 16;
|
|
|
1446 case 2 : return 16;
|
|
|
1447 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1448 }
|
|
|
1449 case Format::eR16G16B16Uint:
|
|
|
1450 switch ( component )
|
|
|
1451 {
|
|
|
1452 case 0 : return 16;
|
|
|
1453 case 1 : return 16;
|
|
|
1454 case 2 : return 16;
|
|
|
1455 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1456 }
|
|
|
1457 case Format::eR16G16B16Sint:
|
|
|
1458 switch ( component )
|
|
|
1459 {
|
|
|
1460 case 0 : return 16;
|
|
|
1461 case 1 : return 16;
|
|
|
1462 case 2 : return 16;
|
|
|
1463 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1464 }
|
|
|
1465 case Format::eR16G16B16Sfloat:
|
|
|
1466 switch ( component )
|
|
|
1467 {
|
|
|
1468 case 0 : return 16;
|
|
|
1469 case 1 : return 16;
|
|
|
1470 case 2 : return 16;
|
|
|
1471 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1472 }
|
|
|
1473 case Format::eR16G16B16A16Unorm:
|
|
|
1474 switch ( component )
|
|
|
1475 {
|
|
|
1476 case 0 : return 16;
|
|
|
1477 case 1 : return 16;
|
|
|
1478 case 2 : return 16;
|
|
|
1479 case 3 : return 16;
|
|
|
1480 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1481 }
|
|
|
1482 case Format::eR16G16B16A16Snorm:
|
|
|
1483 switch ( component )
|
|
|
1484 {
|
|
|
1485 case 0 : return 16;
|
|
|
1486 case 1 : return 16;
|
|
|
1487 case 2 : return 16;
|
|
|
1488 case 3 : return 16;
|
|
|
1489 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1490 }
|
|
|
1491 case Format::eR16G16B16A16Uscaled:
|
|
|
1492 switch ( component )
|
|
|
1493 {
|
|
|
1494 case 0 : return 16;
|
|
|
1495 case 1 : return 16;
|
|
|
1496 case 2 : return 16;
|
|
|
1497 case 3 : return 16;
|
|
|
1498 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1499 }
|
|
|
1500 case Format::eR16G16B16A16Sscaled:
|
|
|
1501 switch ( component )
|
|
|
1502 {
|
|
|
1503 case 0 : return 16;
|
|
|
1504 case 1 : return 16;
|
|
|
1505 case 2 : return 16;
|
|
|
1506 case 3 : return 16;
|
|
|
1507 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1508 }
|
|
|
1509 case Format::eR16G16B16A16Uint:
|
|
|
1510 switch ( component )
|
|
|
1511 {
|
|
|
1512 case 0 : return 16;
|
|
|
1513 case 1 : return 16;
|
|
|
1514 case 2 : return 16;
|
|
|
1515 case 3 : return 16;
|
|
|
1516 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1517 }
|
|
|
1518 case Format::eR16G16B16A16Sint:
|
|
|
1519 switch ( component )
|
|
|
1520 {
|
|
|
1521 case 0 : return 16;
|
|
|
1522 case 1 : return 16;
|
|
|
1523 case 2 : return 16;
|
|
|
1524 case 3 : return 16;
|
|
|
1525 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1526 }
|
|
|
1527 case Format::eR16G16B16A16Sfloat:
|
|
|
1528 switch ( component )
|
|
|
1529 {
|
|
|
1530 case 0 : return 16;
|
|
|
1531 case 1 : return 16;
|
|
|
1532 case 2 : return 16;
|
|
|
1533 case 3 : return 16;
|
|
|
1534 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1535 }
|
|
|
1536 case Format::eR32Uint:
|
|
|
1537 switch ( component )
|
|
|
1538 {
|
|
|
1539 case 0 : return 32;
|
|
|
1540 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1541 }
|
|
|
1542 case Format::eR32Sint:
|
|
|
1543 switch ( component )
|
|
|
1544 {
|
|
|
1545 case 0 : return 32;
|
|
|
1546 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1547 }
|
|
|
1548 case Format::eR32Sfloat:
|
|
|
1549 switch ( component )
|
|
|
1550 {
|
|
|
1551 case 0 : return 32;
|
|
|
1552 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1553 }
|
|
|
1554 case Format::eR32G32Uint:
|
|
|
1555 switch ( component )
|
|
|
1556 {
|
|
|
1557 case 0 : return 32;
|
|
|
1558 case 1 : return 32;
|
|
|
1559 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1560 }
|
|
|
1561 case Format::eR32G32Sint:
|
|
|
1562 switch ( component )
|
|
|
1563 {
|
|
|
1564 case 0 : return 32;
|
|
|
1565 case 1 : return 32;
|
|
|
1566 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1567 }
|
|
|
1568 case Format::eR32G32Sfloat:
|
|
|
1569 switch ( component )
|
|
|
1570 {
|
|
|
1571 case 0 : return 32;
|
|
|
1572 case 1 : return 32;
|
|
|
1573 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1574 }
|
|
|
1575 case Format::eR32G32B32Uint:
|
|
|
1576 switch ( component )
|
|
|
1577 {
|
|
|
1578 case 0 : return 32;
|
|
|
1579 case 1 : return 32;
|
|
|
1580 case 2 : return 32;
|
|
|
1581 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1582 }
|
|
|
1583 case Format::eR32G32B32Sint:
|
|
|
1584 switch ( component )
|
|
|
1585 {
|
|
|
1586 case 0 : return 32;
|
|
|
1587 case 1 : return 32;
|
|
|
1588 case 2 : return 32;
|
|
|
1589 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1590 }
|
|
|
1591 case Format::eR32G32B32Sfloat:
|
|
|
1592 switch ( component )
|
|
|
1593 {
|
|
|
1594 case 0 : return 32;
|
|
|
1595 case 1 : return 32;
|
|
|
1596 case 2 : return 32;
|
|
|
1597 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1598 }
|
|
|
1599 case Format::eR32G32B32A32Uint:
|
|
|
1600 switch ( component )
|
|
|
1601 {
|
|
|
1602 case 0 : return 32;
|
|
|
1603 case 1 : return 32;
|
|
|
1604 case 2 : return 32;
|
|
|
1605 case 3 : return 32;
|
|
|
1606 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1607 }
|
|
|
1608 case Format::eR32G32B32A32Sint:
|
|
|
1609 switch ( component )
|
|
|
1610 {
|
|
|
1611 case 0 : return 32;
|
|
|
1612 case 1 : return 32;
|
|
|
1613 case 2 : return 32;
|
|
|
1614 case 3 : return 32;
|
|
|
1615 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1616 }
|
|
|
1617 case Format::eR32G32B32A32Sfloat:
|
|
|
1618 switch ( component )
|
|
|
1619 {
|
|
|
1620 case 0 : return 32;
|
|
|
1621 case 1 : return 32;
|
|
|
1622 case 2 : return 32;
|
|
|
1623 case 3 : return 32;
|
|
|
1624 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1625 }
|
|
|
1626 case Format::eR64Uint:
|
|
|
1627 switch ( component )
|
|
|
1628 {
|
|
|
1629 case 0 : return 64;
|
|
|
1630 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1631 }
|
|
|
1632 case Format::eR64Sint:
|
|
|
1633 switch ( component )
|
|
|
1634 {
|
|
|
1635 case 0 : return 64;
|
|
|
1636 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1637 }
|
|
|
1638 case Format::eR64Sfloat:
|
|
|
1639 switch ( component )
|
|
|
1640 {
|
|
|
1641 case 0 : return 64;
|
|
|
1642 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1643 }
|
|
|
1644 case Format::eR64G64Uint:
|
|
|
1645 switch ( component )
|
|
|
1646 {
|
|
|
1647 case 0 : return 64;
|
|
|
1648 case 1 : return 64;
|
|
|
1649 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1650 }
|
|
|
1651 case Format::eR64G64Sint:
|
|
|
1652 switch ( component )
|
|
|
1653 {
|
|
|
1654 case 0 : return 64;
|
|
|
1655 case 1 : return 64;
|
|
|
1656 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1657 }
|
|
|
1658 case Format::eR64G64Sfloat:
|
|
|
1659 switch ( component )
|
|
|
1660 {
|
|
|
1661 case 0 : return 64;
|
|
|
1662 case 1 : return 64;
|
|
|
1663 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1664 }
|
|
|
1665 case Format::eR64G64B64Uint:
|
|
|
1666 switch ( component )
|
|
|
1667 {
|
|
|
1668 case 0 : return 64;
|
|
|
1669 case 1 : return 64;
|
|
|
1670 case 2 : return 64;
|
|
|
1671 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1672 }
|
|
|
1673 case Format::eR64G64B64Sint:
|
|
|
1674 switch ( component )
|
|
|
1675 {
|
|
|
1676 case 0 : return 64;
|
|
|
1677 case 1 : return 64;
|
|
|
1678 case 2 : return 64;
|
|
|
1679 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1680 }
|
|
|
1681 case Format::eR64G64B64Sfloat:
|
|
|
1682 switch ( component )
|
|
|
1683 {
|
|
|
1684 case 0 : return 64;
|
|
|
1685 case 1 : return 64;
|
|
|
1686 case 2 : return 64;
|
|
|
1687 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1688 }
|
|
|
1689 case Format::eR64G64B64A64Uint:
|
|
|
1690 switch ( component )
|
|
|
1691 {
|
|
|
1692 case 0 : return 64;
|
|
|
1693 case 1 : return 64;
|
|
|
1694 case 2 : return 64;
|
|
|
1695 case 3 : return 64;
|
|
|
1696 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1697 }
|
|
|
1698 case Format::eR64G64B64A64Sint:
|
|
|
1699 switch ( component )
|
|
|
1700 {
|
|
|
1701 case 0 : return 64;
|
|
|
1702 case 1 : return 64;
|
|
|
1703 case 2 : return 64;
|
|
|
1704 case 3 : return 64;
|
|
|
1705 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1706 }
|
|
|
1707 case Format::eR64G64B64A64Sfloat:
|
|
|
1708 switch ( component )
|
|
|
1709 {
|
|
|
1710 case 0 : return 64;
|
|
|
1711 case 1 : return 64;
|
|
|
1712 case 2 : return 64;
|
|
|
1713 case 3 : return 64;
|
|
|
1714 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1715 }
|
|
|
1716 case Format::eB10G11R11UfloatPack32:
|
|
|
1717 switch ( component )
|
|
|
1718 {
|
|
|
1719 case 0 : return 10;
|
|
|
1720 case 1 : return 11;
|
|
|
1721 case 2 : return 11;
|
|
|
1722 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1723 }
|
|
|
1724 case Format::eE5B9G9R9UfloatPack32:
|
|
|
1725 switch ( component )
|
|
|
1726 {
|
|
|
1727 case 0 : return 9;
|
|
|
1728 case 1 : return 9;
|
|
|
1729 case 2 : return 9;
|
|
|
1730 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1731 }
|
|
|
1732 case Format::eD16Unorm:
|
|
|
1733 switch ( component )
|
|
|
1734 {
|
|
|
1735 case 0 : return 16;
|
|
|
1736 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1737 }
|
|
|
1738 case Format::eX8D24UnormPack32:
|
|
|
1739 switch ( component )
|
|
|
1740 {
|
|
|
1741 case 0 : return 24;
|
|
|
1742 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1743 }
|
|
|
1744 case Format::eD32Sfloat:
|
|
|
1745 switch ( component )
|
|
|
1746 {
|
|
|
1747 case 0 : return 32;
|
|
|
1748 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1749 }
|
|
|
1750 case Format::eS8Uint:
|
|
|
1751 switch ( component )
|
|
|
1752 {
|
|
|
1753 case 0 : return 8;
|
|
|
1754 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1755 }
|
|
|
1756 case Format::eD16UnormS8Uint:
|
|
|
1757 switch ( component )
|
|
|
1758 {
|
|
|
1759 case 0 : return 16;
|
|
|
1760 case 1 : return 8;
|
|
|
1761 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1762 }
|
|
|
1763 case Format::eD24UnormS8Uint:
|
|
|
1764 switch ( component )
|
|
|
1765 {
|
|
|
1766 case 0 : return 24;
|
|
|
1767 case 1 : return 8;
|
|
|
1768 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1769 }
|
|
|
1770 case Format::eD32SfloatS8Uint:
|
|
|
1771 switch ( component )
|
|
|
1772 {
|
|
|
1773 case 0 : return 32;
|
|
|
1774 case 1 : return 8;
|
|
|
1775 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1776 }
|
|
|
1777 case Format::eEacR11UnormBlock:
|
|
|
1778 switch ( component )
|
|
|
1779 {
|
|
|
1780 case 0 : return 11;
|
|
|
1781 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1782 }
|
|
|
1783 case Format::eEacR11SnormBlock:
|
|
|
1784 switch ( component )
|
|
|
1785 {
|
|
|
1786 case 0 : return 11;
|
|
|
1787 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1788 }
|
|
|
1789 case Format::eEacR11G11UnormBlock:
|
|
|
1790 switch ( component )
|
|
|
1791 {
|
|
|
1792 case 0 : return 11;
|
|
|
1793 case 1 : return 11;
|
|
|
1794 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1795 }
|
|
|
1796 case Format::eEacR11G11SnormBlock:
|
|
|
1797 switch ( component )
|
|
|
1798 {
|
|
|
1799 case 0 : return 11;
|
|
|
1800 case 1 : return 11;
|
|
|
1801 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1802 }
|
|
|
1803 case Format::eG8B8G8R8422Unorm:
|
|
|
1804 switch ( component )
|
|
|
1805 {
|
|
|
1806 case 0 : return 8;
|
|
|
1807 case 1 : return 8;
|
|
|
1808 case 2 : return 8;
|
|
|
1809 case 3 : return 8;
|
|
|
1810 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1811 }
|
|
|
1812 case Format::eB8G8R8G8422Unorm:
|
|
|
1813 switch ( component )
|
|
|
1814 {
|
|
|
1815 case 0 : return 8;
|
|
|
1816 case 1 : return 8;
|
|
|
1817 case 2 : return 8;
|
|
|
1818 case 3 : return 8;
|
|
|
1819 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1820 }
|
|
|
1821 case Format::eG8B8R83Plane420Unorm:
|
|
|
1822 switch ( component )
|
|
|
1823 {
|
|
|
1824 case 0 : return 8;
|
|
|
1825 case 1 : return 8;
|
|
|
1826 case 2 : return 8;
|
|
|
1827 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1828 }
|
|
|
1829 case Format::eG8B8R82Plane420Unorm:
|
|
|
1830 switch ( component )
|
|
|
1831 {
|
|
|
1832 case 0 : return 8;
|
|
|
1833 case 1 : return 8;
|
|
|
1834 case 2 : return 8;
|
|
|
1835 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1836 }
|
|
|
1837 case Format::eG8B8R83Plane422Unorm:
|
|
|
1838 switch ( component )
|
|
|
1839 {
|
|
|
1840 case 0 : return 8;
|
|
|
1841 case 1 : return 8;
|
|
|
1842 case 2 : return 8;
|
|
|
1843 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1844 }
|
|
|
1845 case Format::eG8B8R82Plane422Unorm:
|
|
|
1846 switch ( component )
|
|
|
1847 {
|
|
|
1848 case 0 : return 8;
|
|
|
1849 case 1 : return 8;
|
|
|
1850 case 2 : return 8;
|
|
|
1851 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1852 }
|
|
|
1853 case Format::eG8B8R83Plane444Unorm:
|
|
|
1854 switch ( component )
|
|
|
1855 {
|
|
|
1856 case 0 : return 8;
|
|
|
1857 case 1 : return 8;
|
|
|
1858 case 2 : return 8;
|
|
|
1859 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1860 }
|
|
|
1861 case Format::eR10X6UnormPack16:
|
|
|
1862 switch ( component )
|
|
|
1863 {
|
|
|
1864 case 0 : return 10;
|
|
|
1865 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1866 }
|
|
|
1867 case Format::eR10X6G10X6Unorm2Pack16:
|
|
|
1868 switch ( component )
|
|
|
1869 {
|
|
|
1870 case 0 : return 10;
|
|
|
1871 case 1 : return 10;
|
|
|
1872 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1873 }
|
|
|
1874 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
1875 switch ( component )
|
|
|
1876 {
|
|
|
1877 case 0 : return 10;
|
|
|
1878 case 1 : return 10;
|
|
|
1879 case 2 : return 10;
|
|
|
1880 case 3 : return 10;
|
|
|
1881 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1882 }
|
|
|
1883 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
1884 switch ( component )
|
|
|
1885 {
|
|
|
1886 case 0 : return 10;
|
|
|
1887 case 1 : return 10;
|
|
|
1888 case 2 : return 10;
|
|
|
1889 case 3 : return 10;
|
|
|
1890 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1891 }
|
|
|
1892 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
1893 switch ( component )
|
|
|
1894 {
|
|
|
1895 case 0 : return 10;
|
|
|
1896 case 1 : return 10;
|
|
|
1897 case 2 : return 10;
|
|
|
1898 case 3 : return 10;
|
|
|
1899 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1900 }
|
|
|
1901 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
1902 switch ( component )
|
|
|
1903 {
|
|
|
1904 case 0 : return 10;
|
|
|
1905 case 1 : return 10;
|
|
|
1906 case 2 : return 10;
|
|
|
1907 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1908 }
|
|
|
1909 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
1910 switch ( component )
|
|
|
1911 {
|
|
|
1912 case 0 : return 10;
|
|
|
1913 case 1 : return 10;
|
|
|
1914 case 2 : return 10;
|
|
|
1915 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1916 }
|
|
|
1917 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
1918 switch ( component )
|
|
|
1919 {
|
|
|
1920 case 0 : return 10;
|
|
|
1921 case 1 : return 10;
|
|
|
1922 case 2 : return 10;
|
|
|
1923 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1924 }
|
|
|
1925 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
1926 switch ( component )
|
|
|
1927 {
|
|
|
1928 case 0 : return 10;
|
|
|
1929 case 1 : return 10;
|
|
|
1930 case 2 : return 10;
|
|
|
1931 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1932 }
|
|
|
1933 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
1934 switch ( component )
|
|
|
1935 {
|
|
|
1936 case 0 : return 10;
|
|
|
1937 case 1 : return 10;
|
|
|
1938 case 2 : return 10;
|
|
|
1939 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1940 }
|
|
|
1941 case Format::eR12X4UnormPack16:
|
|
|
1942 switch ( component )
|
|
|
1943 {
|
|
|
1944 case 0 : return 12;
|
|
|
1945 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1946 }
|
|
|
1947 case Format::eR12X4G12X4Unorm2Pack16:
|
|
|
1948 switch ( component )
|
|
|
1949 {
|
|
|
1950 case 0 : return 12;
|
|
|
1951 case 1 : return 12;
|
|
|
1952 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1953 }
|
|
|
1954 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
1955 switch ( component )
|
|
|
1956 {
|
|
|
1957 case 0 : return 12;
|
|
|
1958 case 1 : return 12;
|
|
|
1959 case 2 : return 12;
|
|
|
1960 case 3 : return 12;
|
|
|
1961 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1962 }
|
|
|
1963 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
1964 switch ( component )
|
|
|
1965 {
|
|
|
1966 case 0 : return 12;
|
|
|
1967 case 1 : return 12;
|
|
|
1968 case 2 : return 12;
|
|
|
1969 case 3 : return 12;
|
|
|
1970 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1971 }
|
|
|
1972 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
1973 switch ( component )
|
|
|
1974 {
|
|
|
1975 case 0 : return 12;
|
|
|
1976 case 1 : return 12;
|
|
|
1977 case 2 : return 12;
|
|
|
1978 case 3 : return 12;
|
|
|
1979 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1980 }
|
|
|
1981 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
1982 switch ( component )
|
|
|
1983 {
|
|
|
1984 case 0 : return 12;
|
|
|
1985 case 1 : return 12;
|
|
|
1986 case 2 : return 12;
|
|
|
1987 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1988 }
|
|
|
1989 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
1990 switch ( component )
|
|
|
1991 {
|
|
|
1992 case 0 : return 12;
|
|
|
1993 case 1 : return 12;
|
|
|
1994 case 2 : return 12;
|
|
|
1995 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
1996 }
|
|
|
1997 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
1998 switch ( component )
|
|
|
1999 {
|
|
|
2000 case 0 : return 12;
|
|
|
2001 case 1 : return 12;
|
|
|
2002 case 2 : return 12;
|
|
|
2003 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2004 }
|
|
|
2005 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
2006 switch ( component )
|
|
|
2007 {
|
|
|
2008 case 0 : return 12;
|
|
|
2009 case 1 : return 12;
|
|
|
2010 case 2 : return 12;
|
|
|
2011 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2012 }
|
|
|
2013 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
2014 switch ( component )
|
|
|
2015 {
|
|
|
2016 case 0 : return 12;
|
|
|
2017 case 1 : return 12;
|
|
|
2018 case 2 : return 12;
|
|
|
2019 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2020 }
|
|
|
2021 case Format::eG16B16G16R16422Unorm:
|
|
|
2022 switch ( component )
|
|
|
2023 {
|
|
|
2024 case 0 : return 16;
|
|
|
2025 case 1 : return 16;
|
|
|
2026 case 2 : return 16;
|
|
|
2027 case 3 : return 16;
|
|
|
2028 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2029 }
|
|
|
2030 case Format::eB16G16R16G16422Unorm:
|
|
|
2031 switch ( component )
|
|
|
2032 {
|
|
|
2033 case 0 : return 16;
|
|
|
2034 case 1 : return 16;
|
|
|
2035 case 2 : return 16;
|
|
|
2036 case 3 : return 16;
|
|
|
2037 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2038 }
|
|
|
2039 case Format::eG16B16R163Plane420Unorm:
|
|
|
2040 switch ( component )
|
|
|
2041 {
|
|
|
2042 case 0 : return 16;
|
|
|
2043 case 1 : return 16;
|
|
|
2044 case 2 : return 16;
|
|
|
2045 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2046 }
|
|
|
2047 case Format::eG16B16R162Plane420Unorm:
|
|
|
2048 switch ( component )
|
|
|
2049 {
|
|
|
2050 case 0 : return 16;
|
|
|
2051 case 1 : return 16;
|
|
|
2052 case 2 : return 16;
|
|
|
2053 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2054 }
|
|
|
2055 case Format::eG16B16R163Plane422Unorm:
|
|
|
2056 switch ( component )
|
|
|
2057 {
|
|
|
2058 case 0 : return 16;
|
|
|
2059 case 1 : return 16;
|
|
|
2060 case 2 : return 16;
|
|
|
2061 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2062 }
|
|
|
2063 case Format::eG16B16R162Plane422Unorm:
|
|
|
2064 switch ( component )
|
|
|
2065 {
|
|
|
2066 case 0 : return 16;
|
|
|
2067 case 1 : return 16;
|
|
|
2068 case 2 : return 16;
|
|
|
2069 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2070 }
|
|
|
2071 case Format::eG16B16R163Plane444Unorm:
|
|
|
2072 switch ( component )
|
|
|
2073 {
|
|
|
2074 case 0 : return 16;
|
|
|
2075 case 1 : return 16;
|
|
|
2076 case 2 : return 16;
|
|
|
2077 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2078 }
|
|
|
2079 case Format::eG8B8R82Plane444Unorm:
|
|
|
2080 switch ( component )
|
|
|
2081 {
|
|
|
2082 case 0 : return 8;
|
|
|
2083 case 1 : return 8;
|
|
|
2084 case 2 : return 8;
|
|
|
2085 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2086 }
|
|
|
2087 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
2088 switch ( component )
|
|
|
2089 {
|
|
|
2090 case 0 : return 10;
|
|
|
2091 case 1 : return 10;
|
|
|
2092 case 2 : return 10;
|
|
|
2093 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2094 }
|
|
|
2095 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
2096 switch ( component )
|
|
|
2097 {
|
|
|
2098 case 0 : return 12;
|
|
|
2099 case 1 : return 12;
|
|
|
2100 case 2 : return 12;
|
|
|
2101 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2102 }
|
|
|
2103 case Format::eG16B16R162Plane444Unorm:
|
|
|
2104 switch ( component )
|
|
|
2105 {
|
|
|
2106 case 0 : return 16;
|
|
|
2107 case 1 : return 16;
|
|
|
2108 case 2 : return 16;
|
|
|
2109 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2110 }
|
|
|
2111 case Format::eA4R4G4B4UnormPack16:
|
|
|
2112 switch ( component )
|
|
|
2113 {
|
|
|
2114 case 0 : return 4;
|
|
|
2115 case 1 : return 4;
|
|
|
2116 case 2 : return 4;
|
|
|
2117 case 3 : return 4;
|
|
|
2118 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2119 }
|
|
|
2120 case Format::eA4B4G4R4UnormPack16:
|
|
|
2121 switch ( component )
|
|
|
2122 {
|
|
|
2123 case 0 : return 4;
|
|
|
2124 case 1 : return 4;
|
|
|
2125 case 2 : return 4;
|
|
|
2126 case 3 : return 4;
|
|
|
2127 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2128 }
|
|
|
2129 case Format::eA1B5G5R5UnormPack16:
|
|
|
2130 switch ( component )
|
|
|
2131 {
|
|
|
2132 case 0 : return 1;
|
|
|
2133 case 1 : return 5;
|
|
|
2134 case 2 : return 5;
|
|
|
2135 case 3 : return 5;
|
|
|
2136 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2137 }
|
|
|
2138 case Format::eA8Unorm:
|
|
|
2139 switch ( component )
|
|
|
2140 {
|
|
|
2141 case 0 : return 8;
|
|
|
2142 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2143 }
|
|
|
2144 case Format::eR8BoolARM:
|
|
|
2145 switch ( component )
|
|
|
2146 {
|
|
|
2147 case 0 : return 8;
|
|
|
2148 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2149 }
|
|
|
2150 case Format::eR16G16Sfixed5NV:
|
|
|
2151 switch ( component )
|
|
|
2152 {
|
|
|
2153 case 0 : return 16;
|
|
|
2154 case 1 : return 16;
|
|
|
2155 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2156 }
|
|
|
2157 case Format::eR10X6UintPack16ARM:
|
|
|
2158 switch ( component )
|
|
|
2159 {
|
|
|
2160 case 0 : return 10;
|
|
|
2161 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2162 }
|
|
|
2163 case Format::eR10X6G10X6Uint2Pack16ARM:
|
|
|
2164 switch ( component )
|
|
|
2165 {
|
|
|
2166 case 0 : return 10;
|
|
|
2167 case 1 : return 10;
|
|
|
2168 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2169 }
|
|
|
2170 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
2171 switch ( component )
|
|
|
2172 {
|
|
|
2173 case 0 : return 10;
|
|
|
2174 case 1 : return 10;
|
|
|
2175 case 2 : return 10;
|
|
|
2176 case 3 : return 10;
|
|
|
2177 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2178 }
|
|
|
2179 case Format::eR12X4UintPack16ARM:
|
|
|
2180 switch ( component )
|
|
|
2181 {
|
|
|
2182 case 0 : return 12;
|
|
|
2183 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2184 }
|
|
|
2185 case Format::eR12X4G12X4Uint2Pack16ARM:
|
|
|
2186 switch ( component )
|
|
|
2187 {
|
|
|
2188 case 0 : return 12;
|
|
|
2189 case 1 : return 12;
|
|
|
2190 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2191 }
|
|
|
2192 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
2193 switch ( component )
|
|
|
2194 {
|
|
|
2195 case 0 : return 12;
|
|
|
2196 case 1 : return 12;
|
|
|
2197 case 2 : return 12;
|
|
|
2198 case 3 : return 12;
|
|
|
2199 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2200 }
|
|
|
2201 case Format::eR14X2UintPack16ARM:
|
|
|
2202 switch ( component )
|
|
|
2203 {
|
|
|
2204 case 0 : return 14;
|
|
|
2205 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2206 }
|
|
|
2207 case Format::eR14X2G14X2Uint2Pack16ARM:
|
|
|
2208 switch ( component )
|
|
|
2209 {
|
|
|
2210 case 0 : return 14;
|
|
|
2211 case 1 : return 14;
|
|
|
2212 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2213 }
|
|
|
2214 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
2215 switch ( component )
|
|
|
2216 {
|
|
|
2217 case 0 : return 14;
|
|
|
2218 case 1 : return 14;
|
|
|
2219 case 2 : return 14;
|
|
|
2220 case 3 : return 14;
|
|
|
2221 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2222 }
|
|
|
2223 case Format::eR14X2UnormPack16ARM:
|
|
|
2224 switch ( component )
|
|
|
2225 {
|
|
|
2226 case 0 : return 14;
|
|
|
2227 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2228 }
|
|
|
2229 case Format::eR14X2G14X2Unorm2Pack16ARM:
|
|
|
2230 switch ( component )
|
|
|
2231 {
|
|
|
2232 case 0 : return 14;
|
|
|
2233 case 1 : return 14;
|
|
|
2234 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2235 }
|
|
|
2236 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
2237 switch ( component )
|
|
|
2238 {
|
|
|
2239 case 0 : return 14;
|
|
|
2240 case 1 : return 14;
|
|
|
2241 case 2 : return 14;
|
|
|
2242 case 3 : return 14;
|
|
|
2243 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2244 }
|
|
|
2245 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
2246 switch ( component )
|
|
|
2247 {
|
|
|
2248 case 0 : return 14;
|
|
|
2249 case 1 : return 14;
|
|
|
2250 case 2 : return 14;
|
|
|
2251 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2252 }
|
|
|
2253 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
2254 switch ( component )
|
|
|
2255 {
|
|
|
2256 case 0 : return 14;
|
|
|
2257 case 1 : return 14;
|
|
|
2258 case 2 : return 14;
|
|
|
2259 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
2260 }
|
|
|
2261
|
|
|
2262 default: return 0;
|
|
|
2263 }
|
|
|
2264 }
|
|
|
2265
|
|
|
2266 // The number of components of this format.
|
|
|
2267 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t componentCount( Format format )
|
|
|
2268 {
|
|
|
2269 switch ( format )
|
|
|
2270 {
|
|
|
2271 case Format::eR4G4UnormPack8 : return 2;
|
|
|
2272 case Format::eR4G4B4A4UnormPack16 : return 4;
|
|
|
2273 case Format::eB4G4R4A4UnormPack16 : return 4;
|
|
|
2274 case Format::eR5G6B5UnormPack16 : return 3;
|
|
|
2275 case Format::eB5G6R5UnormPack16 : return 3;
|
|
|
2276 case Format::eR5G5B5A1UnormPack16 : return 4;
|
|
|
2277 case Format::eB5G5R5A1UnormPack16 : return 4;
|
|
|
2278 case Format::eA1R5G5B5UnormPack16 : return 4;
|
|
|
2279 case Format::eR8Unorm : return 1;
|
|
|
2280 case Format::eR8Snorm : return 1;
|
|
|
2281 case Format::eR8Uscaled : return 1;
|
|
|
2282 case Format::eR8Sscaled : return 1;
|
|
|
2283 case Format::eR8Uint : return 1;
|
|
|
2284 case Format::eR8Sint : return 1;
|
|
|
2285 case Format::eR8Srgb : return 1;
|
|
|
2286 case Format::eR8G8Unorm : return 2;
|
|
|
2287 case Format::eR8G8Snorm : return 2;
|
|
|
2288 case Format::eR8G8Uscaled : return 2;
|
|
|
2289 case Format::eR8G8Sscaled : return 2;
|
|
|
2290 case Format::eR8G8Uint : return 2;
|
|
|
2291 case Format::eR8G8Sint : return 2;
|
|
|
2292 case Format::eR8G8Srgb : return 2;
|
|
|
2293 case Format::eR8G8B8Unorm : return 3;
|
|
|
2294 case Format::eR8G8B8Snorm : return 3;
|
|
|
2295 case Format::eR8G8B8Uscaled : return 3;
|
|
|
2296 case Format::eR8G8B8Sscaled : return 3;
|
|
|
2297 case Format::eR8G8B8Uint : return 3;
|
|
|
2298 case Format::eR8G8B8Sint : return 3;
|
|
|
2299 case Format::eR8G8B8Srgb : return 3;
|
|
|
2300 case Format::eB8G8R8Unorm : return 3;
|
|
|
2301 case Format::eB8G8R8Snorm : return 3;
|
|
|
2302 case Format::eB8G8R8Uscaled : return 3;
|
|
|
2303 case Format::eB8G8R8Sscaled : return 3;
|
|
|
2304 case Format::eB8G8R8Uint : return 3;
|
|
|
2305 case Format::eB8G8R8Sint : return 3;
|
|
|
2306 case Format::eB8G8R8Srgb : return 3;
|
|
|
2307 case Format::eR8G8B8A8Unorm : return 4;
|
|
|
2308 case Format::eR8G8B8A8Snorm : return 4;
|
|
|
2309 case Format::eR8G8B8A8Uscaled : return 4;
|
|
|
2310 case Format::eR8G8B8A8Sscaled : return 4;
|
|
|
2311 case Format::eR8G8B8A8Uint : return 4;
|
|
|
2312 case Format::eR8G8B8A8Sint : return 4;
|
|
|
2313 case Format::eR8G8B8A8Srgb : return 4;
|
|
|
2314 case Format::eB8G8R8A8Unorm : return 4;
|
|
|
2315 case Format::eB8G8R8A8Snorm : return 4;
|
|
|
2316 case Format::eB8G8R8A8Uscaled : return 4;
|
|
|
2317 case Format::eB8G8R8A8Sscaled : return 4;
|
|
|
2318 case Format::eB8G8R8A8Uint : return 4;
|
|
|
2319 case Format::eB8G8R8A8Sint : return 4;
|
|
|
2320 case Format::eB8G8R8A8Srgb : return 4;
|
|
|
2321 case Format::eA8B8G8R8UnormPack32 : return 4;
|
|
|
2322 case Format::eA8B8G8R8SnormPack32 : return 4;
|
|
|
2323 case Format::eA8B8G8R8UscaledPack32 : return 4;
|
|
|
2324 case Format::eA8B8G8R8SscaledPack32 : return 4;
|
|
|
2325 case Format::eA8B8G8R8UintPack32 : return 4;
|
|
|
2326 case Format::eA8B8G8R8SintPack32 : return 4;
|
|
|
2327 case Format::eA8B8G8R8SrgbPack32 : return 4;
|
|
|
2328 case Format::eA2R10G10B10UnormPack32 : return 4;
|
|
|
2329 case Format::eA2R10G10B10SnormPack32 : return 4;
|
|
|
2330 case Format::eA2R10G10B10UscaledPack32 : return 4;
|
|
|
2331 case Format::eA2R10G10B10SscaledPack32 : return 4;
|
|
|
2332 case Format::eA2R10G10B10UintPack32 : return 4;
|
|
|
2333 case Format::eA2R10G10B10SintPack32 : return 4;
|
|
|
2334 case Format::eA2B10G10R10UnormPack32 : return 4;
|
|
|
2335 case Format::eA2B10G10R10SnormPack32 : return 4;
|
|
|
2336 case Format::eA2B10G10R10UscaledPack32 : return 4;
|
|
|
2337 case Format::eA2B10G10R10SscaledPack32 : return 4;
|
|
|
2338 case Format::eA2B10G10R10UintPack32 : return 4;
|
|
|
2339 case Format::eA2B10G10R10SintPack32 : return 4;
|
|
|
2340 case Format::eR16Unorm : return 1;
|
|
|
2341 case Format::eR16Snorm : return 1;
|
|
|
2342 case Format::eR16Uscaled : return 1;
|
|
|
2343 case Format::eR16Sscaled : return 1;
|
|
|
2344 case Format::eR16Uint : return 1;
|
|
|
2345 case Format::eR16Sint : return 1;
|
|
|
2346 case Format::eR16Sfloat : return 1;
|
|
|
2347 case Format::eR16G16Unorm : return 2;
|
|
|
2348 case Format::eR16G16Snorm : return 2;
|
|
|
2349 case Format::eR16G16Uscaled : return 2;
|
|
|
2350 case Format::eR16G16Sscaled : return 2;
|
|
|
2351 case Format::eR16G16Uint : return 2;
|
|
|
2352 case Format::eR16G16Sint : return 2;
|
|
|
2353 case Format::eR16G16Sfloat : return 2;
|
|
|
2354 case Format::eR16G16B16Unorm : return 3;
|
|
|
2355 case Format::eR16G16B16Snorm : return 3;
|
|
|
2356 case Format::eR16G16B16Uscaled : return 3;
|
|
|
2357 case Format::eR16G16B16Sscaled : return 3;
|
|
|
2358 case Format::eR16G16B16Uint : return 3;
|
|
|
2359 case Format::eR16G16B16Sint : return 3;
|
|
|
2360 case Format::eR16G16B16Sfloat : return 3;
|
|
|
2361 case Format::eR16G16B16A16Unorm : return 4;
|
|
|
2362 case Format::eR16G16B16A16Snorm : return 4;
|
|
|
2363 case Format::eR16G16B16A16Uscaled : return 4;
|
|
|
2364 case Format::eR16G16B16A16Sscaled : return 4;
|
|
|
2365 case Format::eR16G16B16A16Uint : return 4;
|
|
|
2366 case Format::eR16G16B16A16Sint : return 4;
|
|
|
2367 case Format::eR16G16B16A16Sfloat : return 4;
|
|
|
2368 case Format::eR32Uint : return 1;
|
|
|
2369 case Format::eR32Sint : return 1;
|
|
|
2370 case Format::eR32Sfloat : return 1;
|
|
|
2371 case Format::eR32G32Uint : return 2;
|
|
|
2372 case Format::eR32G32Sint : return 2;
|
|
|
2373 case Format::eR32G32Sfloat : return 2;
|
|
|
2374 case Format::eR32G32B32Uint : return 3;
|
|
|
2375 case Format::eR32G32B32Sint : return 3;
|
|
|
2376 case Format::eR32G32B32Sfloat : return 3;
|
|
|
2377 case Format::eR32G32B32A32Uint : return 4;
|
|
|
2378 case Format::eR32G32B32A32Sint : return 4;
|
|
|
2379 case Format::eR32G32B32A32Sfloat : return 4;
|
|
|
2380 case Format::eR64Uint : return 1;
|
|
|
2381 case Format::eR64Sint : return 1;
|
|
|
2382 case Format::eR64Sfloat : return 1;
|
|
|
2383 case Format::eR64G64Uint : return 2;
|
|
|
2384 case Format::eR64G64Sint : return 2;
|
|
|
2385 case Format::eR64G64Sfloat : return 2;
|
|
|
2386 case Format::eR64G64B64Uint : return 3;
|
|
|
2387 case Format::eR64G64B64Sint : return 3;
|
|
|
2388 case Format::eR64G64B64Sfloat : return 3;
|
|
|
2389 case Format::eR64G64B64A64Uint : return 4;
|
|
|
2390 case Format::eR64G64B64A64Sint : return 4;
|
|
|
2391 case Format::eR64G64B64A64Sfloat : return 4;
|
|
|
2392 case Format::eB10G11R11UfloatPack32 : return 3;
|
|
|
2393 case Format::eE5B9G9R9UfloatPack32 : return 3;
|
|
|
2394 case Format::eD16Unorm : return 1;
|
|
|
2395 case Format::eX8D24UnormPack32 : return 1;
|
|
|
2396 case Format::eD32Sfloat : return 1;
|
|
|
2397 case Format::eS8Uint : return 1;
|
|
|
2398 case Format::eD16UnormS8Uint : return 2;
|
|
|
2399 case Format::eD24UnormS8Uint : return 2;
|
|
|
2400 case Format::eD32SfloatS8Uint : return 2;
|
|
|
2401 case Format::eBc1RgbUnormBlock : return 3;
|
|
|
2402 case Format::eBc1RgbSrgbBlock : return 3;
|
|
|
2403 case Format::eBc1RgbaUnormBlock : return 4;
|
|
|
2404 case Format::eBc1RgbaSrgbBlock : return 4;
|
|
|
2405 case Format::eBc2UnormBlock : return 4;
|
|
|
2406 case Format::eBc2SrgbBlock : return 4;
|
|
|
2407 case Format::eBc3UnormBlock : return 4;
|
|
|
2408 case Format::eBc3SrgbBlock : return 4;
|
|
|
2409 case Format::eBc4UnormBlock : return 1;
|
|
|
2410 case Format::eBc4SnormBlock : return 1;
|
|
|
2411 case Format::eBc5UnormBlock : return 2;
|
|
|
2412 case Format::eBc5SnormBlock : return 2;
|
|
|
2413 case Format::eBc6HUfloatBlock : return 3;
|
|
|
2414 case Format::eBc6HSfloatBlock : return 3;
|
|
|
2415 case Format::eBc7UnormBlock : return 4;
|
|
|
2416 case Format::eBc7SrgbBlock : return 4;
|
|
|
2417 case Format::eEtc2R8G8B8UnormBlock : return 3;
|
|
|
2418 case Format::eEtc2R8G8B8SrgbBlock : return 3;
|
|
|
2419 case Format::eEtc2R8G8B8A1UnormBlock : return 4;
|
|
|
2420 case Format::eEtc2R8G8B8A1SrgbBlock : return 4;
|
|
|
2421 case Format::eEtc2R8G8B8A8UnormBlock : return 4;
|
|
|
2422 case Format::eEtc2R8G8B8A8SrgbBlock : return 4;
|
|
|
2423 case Format::eEacR11UnormBlock : return 1;
|
|
|
2424 case Format::eEacR11SnormBlock : return 1;
|
|
|
2425 case Format::eEacR11G11UnormBlock : return 2;
|
|
|
2426 case Format::eEacR11G11SnormBlock : return 2;
|
|
|
2427 case Format::eAstc4x4UnormBlock : return 4;
|
|
|
2428 case Format::eAstc4x4SrgbBlock : return 4;
|
|
|
2429 case Format::eAstc5x4UnormBlock : return 4;
|
|
|
2430 case Format::eAstc5x4SrgbBlock : return 4;
|
|
|
2431 case Format::eAstc5x5UnormBlock : return 4;
|
|
|
2432 case Format::eAstc5x5SrgbBlock : return 4;
|
|
|
2433 case Format::eAstc6x5UnormBlock : return 4;
|
|
|
2434 case Format::eAstc6x5SrgbBlock : return 4;
|
|
|
2435 case Format::eAstc6x6UnormBlock : return 4;
|
|
|
2436 case Format::eAstc6x6SrgbBlock : return 4;
|
|
|
2437 case Format::eAstc8x5UnormBlock : return 4;
|
|
|
2438 case Format::eAstc8x5SrgbBlock : return 4;
|
|
|
2439 case Format::eAstc8x6UnormBlock : return 4;
|
|
|
2440 case Format::eAstc8x6SrgbBlock : return 4;
|
|
|
2441 case Format::eAstc8x8UnormBlock : return 4;
|
|
|
2442 case Format::eAstc8x8SrgbBlock : return 4;
|
|
|
2443 case Format::eAstc10x5UnormBlock : return 4;
|
|
|
2444 case Format::eAstc10x5SrgbBlock : return 4;
|
|
|
2445 case Format::eAstc10x6UnormBlock : return 4;
|
|
|
2446 case Format::eAstc10x6SrgbBlock : return 4;
|
|
|
2447 case Format::eAstc10x8UnormBlock : return 4;
|
|
|
2448 case Format::eAstc10x8SrgbBlock : return 4;
|
|
|
2449 case Format::eAstc10x10UnormBlock : return 4;
|
|
|
2450 case Format::eAstc10x10SrgbBlock : return 4;
|
|
|
2451 case Format::eAstc12x10UnormBlock : return 4;
|
|
|
2452 case Format::eAstc12x10SrgbBlock : return 4;
|
|
|
2453 case Format::eAstc12x12UnormBlock : return 4;
|
|
|
2454 case Format::eAstc12x12SrgbBlock : return 4;
|
|
|
2455 case Format::eG8B8G8R8422Unorm : return 4;
|
|
|
2456 case Format::eB8G8R8G8422Unorm : return 4;
|
|
|
2457 case Format::eG8B8R83Plane420Unorm : return 3;
|
|
|
2458 case Format::eG8B8R82Plane420Unorm : return 3;
|
|
|
2459 case Format::eG8B8R83Plane422Unorm : return 3;
|
|
|
2460 case Format::eG8B8R82Plane422Unorm : return 3;
|
|
|
2461 case Format::eG8B8R83Plane444Unorm : return 3;
|
|
|
2462 case Format::eR10X6UnormPack16 : return 1;
|
|
|
2463 case Format::eR10X6G10X6Unorm2Pack16 : return 2;
|
|
|
2464 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16 : return 4;
|
|
|
2465 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16 : return 4;
|
|
|
2466 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16 : return 4;
|
|
|
2467 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return 3;
|
|
|
2468 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return 3;
|
|
|
2469 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return 3;
|
|
|
2470 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return 3;
|
|
|
2471 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return 3;
|
|
|
2472 case Format::eR12X4UnormPack16 : return 1;
|
|
|
2473 case Format::eR12X4G12X4Unorm2Pack16 : return 2;
|
|
|
2474 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16 : return 4;
|
|
|
2475 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16 : return 4;
|
|
|
2476 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16 : return 4;
|
|
|
2477 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return 3;
|
|
|
2478 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return 3;
|
|
|
2479 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return 3;
|
|
|
2480 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return 3;
|
|
|
2481 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return 3;
|
|
|
2482 case Format::eG16B16G16R16422Unorm : return 4;
|
|
|
2483 case Format::eB16G16R16G16422Unorm : return 4;
|
|
|
2484 case Format::eG16B16R163Plane420Unorm : return 3;
|
|
|
2485 case Format::eG16B16R162Plane420Unorm : return 3;
|
|
|
2486 case Format::eG16B16R163Plane422Unorm : return 3;
|
|
|
2487 case Format::eG16B16R162Plane422Unorm : return 3;
|
|
|
2488 case Format::eG16B16R163Plane444Unorm : return 3;
|
|
|
2489 case Format::eG8B8R82Plane444Unorm : return 3;
|
|
|
2490 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return 3;
|
|
|
2491 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return 3;
|
|
|
2492 case Format::eG16B16R162Plane444Unorm : return 3;
|
|
|
2493 case Format::eA4R4G4B4UnormPack16 : return 4;
|
|
|
2494 case Format::eA4B4G4R4UnormPack16 : return 4;
|
|
|
2495 case Format::eAstc4x4SfloatBlock : return 4;
|
|
|
2496 case Format::eAstc5x4SfloatBlock : return 4;
|
|
|
2497 case Format::eAstc5x5SfloatBlock : return 4;
|
|
|
2498 case Format::eAstc6x5SfloatBlock : return 4;
|
|
|
2499 case Format::eAstc6x6SfloatBlock : return 4;
|
|
|
2500 case Format::eAstc8x5SfloatBlock : return 4;
|
|
|
2501 case Format::eAstc8x6SfloatBlock : return 4;
|
|
|
2502 case Format::eAstc8x8SfloatBlock : return 4;
|
|
|
2503 case Format::eAstc10x5SfloatBlock : return 4;
|
|
|
2504 case Format::eAstc10x6SfloatBlock : return 4;
|
|
|
2505 case Format::eAstc10x8SfloatBlock : return 4;
|
|
|
2506 case Format::eAstc10x10SfloatBlock : return 4;
|
|
|
2507 case Format::eAstc12x10SfloatBlock : return 4;
|
|
|
2508 case Format::eAstc12x12SfloatBlock : return 4;
|
|
|
2509 case Format::eA1B5G5R5UnormPack16 : return 4;
|
|
|
2510 case Format::eA8Unorm : return 1;
|
|
|
2511 case Format::ePvrtc12BppUnormBlockIMG : return 4;
|
|
|
2512 case Format::ePvrtc14BppUnormBlockIMG : return 4;
|
|
|
2513 case Format::ePvrtc22BppUnormBlockIMG : return 4;
|
|
|
2514 case Format::ePvrtc24BppUnormBlockIMG : return 4;
|
|
|
2515 case Format::ePvrtc12BppSrgbBlockIMG : return 4;
|
|
|
2516 case Format::ePvrtc14BppSrgbBlockIMG : return 4;
|
|
|
2517 case Format::ePvrtc22BppSrgbBlockIMG : return 4;
|
|
|
2518 case Format::ePvrtc24BppSrgbBlockIMG : return 4;
|
|
|
2519 case Format::eR8BoolARM : return 1;
|
|
|
2520 case Format::eR16G16Sfixed5NV : return 2;
|
|
|
2521 case Format::eR10X6UintPack16ARM : return 1;
|
|
|
2522 case Format::eR10X6G10X6Uint2Pack16ARM : return 2;
|
|
|
2523 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM : return 4;
|
|
|
2524 case Format::eR12X4UintPack16ARM : return 1;
|
|
|
2525 case Format::eR12X4G12X4Uint2Pack16ARM : return 2;
|
|
|
2526 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM : return 4;
|
|
|
2527 case Format::eR14X2UintPack16ARM : return 1;
|
|
|
2528 case Format::eR14X2G14X2Uint2Pack16ARM : return 2;
|
|
|
2529 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM : return 4;
|
|
|
2530 case Format::eR14X2UnormPack16ARM : return 1;
|
|
|
2531 case Format::eR14X2G14X2Unorm2Pack16ARM : return 2;
|
|
|
2532 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM : return 4;
|
|
|
2533 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return 3;
|
|
|
2534 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return 3;
|
|
|
2535
|
|
|
2536 default: return 0;
|
|
|
2537 }
|
|
|
2538 }
|
|
|
2539
|
|
|
2540 // The name of the component
|
|
|
2541 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 char const * componentName( Format format, uint8_t component )
|
|
|
2542 {
|
|
|
2543 switch ( format )
|
|
|
2544 {
|
|
|
2545 case Format::eR4G4UnormPack8:
|
|
|
2546 switch ( component )
|
|
|
2547 {
|
|
|
2548 case 0 : return "R";
|
|
|
2549 case 1 : return "G";
|
|
|
2550 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2551 }
|
|
|
2552 case Format::eR4G4B4A4UnormPack16:
|
|
|
2553 switch ( component )
|
|
|
2554 {
|
|
|
2555 case 0 : return "R";
|
|
|
2556 case 1 : return "G";
|
|
|
2557 case 2 : return "B";
|
|
|
2558 case 3 : return "A";
|
|
|
2559 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2560 }
|
|
|
2561 case Format::eB4G4R4A4UnormPack16:
|
|
|
2562 switch ( component )
|
|
|
2563 {
|
|
|
2564 case 0 : return "B";
|
|
|
2565 case 1 : return "G";
|
|
|
2566 case 2 : return "R";
|
|
|
2567 case 3 : return "A";
|
|
|
2568 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2569 }
|
|
|
2570 case Format::eR5G6B5UnormPack16:
|
|
|
2571 switch ( component )
|
|
|
2572 {
|
|
|
2573 case 0 : return "R";
|
|
|
2574 case 1 : return "G";
|
|
|
2575 case 2 : return "B";
|
|
|
2576 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2577 }
|
|
|
2578 case Format::eB5G6R5UnormPack16:
|
|
|
2579 switch ( component )
|
|
|
2580 {
|
|
|
2581 case 0 : return "B";
|
|
|
2582 case 1 : return "G";
|
|
|
2583 case 2 : return "R";
|
|
|
2584 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2585 }
|
|
|
2586 case Format::eR5G5B5A1UnormPack16:
|
|
|
2587 switch ( component )
|
|
|
2588 {
|
|
|
2589 case 0 : return "R";
|
|
|
2590 case 1 : return "G";
|
|
|
2591 case 2 : return "B";
|
|
|
2592 case 3 : return "A";
|
|
|
2593 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2594 }
|
|
|
2595 case Format::eB5G5R5A1UnormPack16:
|
|
|
2596 switch ( component )
|
|
|
2597 {
|
|
|
2598 case 0 : return "B";
|
|
|
2599 case 1 : return "G";
|
|
|
2600 case 2 : return "R";
|
|
|
2601 case 3 : return "A";
|
|
|
2602 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2603 }
|
|
|
2604 case Format::eA1R5G5B5UnormPack16:
|
|
|
2605 switch ( component )
|
|
|
2606 {
|
|
|
2607 case 0 : return "A";
|
|
|
2608 case 1 : return "R";
|
|
|
2609 case 2 : return "G";
|
|
|
2610 case 3 : return "B";
|
|
|
2611 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2612 }
|
|
|
2613 case Format::eR8Unorm:
|
|
|
2614 switch ( component )
|
|
|
2615 {
|
|
|
2616 case 0 : return "R";
|
|
|
2617 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2618 }
|
|
|
2619 case Format::eR8Snorm:
|
|
|
2620 switch ( component )
|
|
|
2621 {
|
|
|
2622 case 0 : return "R";
|
|
|
2623 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2624 }
|
|
|
2625 case Format::eR8Uscaled:
|
|
|
2626 switch ( component )
|
|
|
2627 {
|
|
|
2628 case 0 : return "R";
|
|
|
2629 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2630 }
|
|
|
2631 case Format::eR8Sscaled:
|
|
|
2632 switch ( component )
|
|
|
2633 {
|
|
|
2634 case 0 : return "R";
|
|
|
2635 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2636 }
|
|
|
2637 case Format::eR8Uint:
|
|
|
2638 switch ( component )
|
|
|
2639 {
|
|
|
2640 case 0 : return "R";
|
|
|
2641 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2642 }
|
|
|
2643 case Format::eR8Sint:
|
|
|
2644 switch ( component )
|
|
|
2645 {
|
|
|
2646 case 0 : return "R";
|
|
|
2647 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2648 }
|
|
|
2649 case Format::eR8Srgb:
|
|
|
2650 switch ( component )
|
|
|
2651 {
|
|
|
2652 case 0 : return "R";
|
|
|
2653 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2654 }
|
|
|
2655 case Format::eR8G8Unorm:
|
|
|
2656 switch ( component )
|
|
|
2657 {
|
|
|
2658 case 0 : return "R";
|
|
|
2659 case 1 : return "G";
|
|
|
2660 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2661 }
|
|
|
2662 case Format::eR8G8Snorm:
|
|
|
2663 switch ( component )
|
|
|
2664 {
|
|
|
2665 case 0 : return "R";
|
|
|
2666 case 1 : return "G";
|
|
|
2667 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2668 }
|
|
|
2669 case Format::eR8G8Uscaled:
|
|
|
2670 switch ( component )
|
|
|
2671 {
|
|
|
2672 case 0 : return "R";
|
|
|
2673 case 1 : return "G";
|
|
|
2674 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2675 }
|
|
|
2676 case Format::eR8G8Sscaled:
|
|
|
2677 switch ( component )
|
|
|
2678 {
|
|
|
2679 case 0 : return "R";
|
|
|
2680 case 1 : return "G";
|
|
|
2681 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2682 }
|
|
|
2683 case Format::eR8G8Uint:
|
|
|
2684 switch ( component )
|
|
|
2685 {
|
|
|
2686 case 0 : return "R";
|
|
|
2687 case 1 : return "G";
|
|
|
2688 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2689 }
|
|
|
2690 case Format::eR8G8Sint:
|
|
|
2691 switch ( component )
|
|
|
2692 {
|
|
|
2693 case 0 : return "R";
|
|
|
2694 case 1 : return "G";
|
|
|
2695 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2696 }
|
|
|
2697 case Format::eR8G8Srgb:
|
|
|
2698 switch ( component )
|
|
|
2699 {
|
|
|
2700 case 0 : return "R";
|
|
|
2701 case 1 : return "G";
|
|
|
2702 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2703 }
|
|
|
2704 case Format::eR8G8B8Unorm:
|
|
|
2705 switch ( component )
|
|
|
2706 {
|
|
|
2707 case 0 : return "R";
|
|
|
2708 case 1 : return "G";
|
|
|
2709 case 2 : return "B";
|
|
|
2710 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2711 }
|
|
|
2712 case Format::eR8G8B8Snorm:
|
|
|
2713 switch ( component )
|
|
|
2714 {
|
|
|
2715 case 0 : return "R";
|
|
|
2716 case 1 : return "G";
|
|
|
2717 case 2 : return "B";
|
|
|
2718 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2719 }
|
|
|
2720 case Format::eR8G8B8Uscaled:
|
|
|
2721 switch ( component )
|
|
|
2722 {
|
|
|
2723 case 0 : return "R";
|
|
|
2724 case 1 : return "G";
|
|
|
2725 case 2 : return "B";
|
|
|
2726 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2727 }
|
|
|
2728 case Format::eR8G8B8Sscaled:
|
|
|
2729 switch ( component )
|
|
|
2730 {
|
|
|
2731 case 0 : return "R";
|
|
|
2732 case 1 : return "G";
|
|
|
2733 case 2 : return "B";
|
|
|
2734 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2735 }
|
|
|
2736 case Format::eR8G8B8Uint:
|
|
|
2737 switch ( component )
|
|
|
2738 {
|
|
|
2739 case 0 : return "R";
|
|
|
2740 case 1 : return "G";
|
|
|
2741 case 2 : return "B";
|
|
|
2742 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2743 }
|
|
|
2744 case Format::eR8G8B8Sint:
|
|
|
2745 switch ( component )
|
|
|
2746 {
|
|
|
2747 case 0 : return "R";
|
|
|
2748 case 1 : return "G";
|
|
|
2749 case 2 : return "B";
|
|
|
2750 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2751 }
|
|
|
2752 case Format::eR8G8B8Srgb:
|
|
|
2753 switch ( component )
|
|
|
2754 {
|
|
|
2755 case 0 : return "R";
|
|
|
2756 case 1 : return "G";
|
|
|
2757 case 2 : return "B";
|
|
|
2758 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2759 }
|
|
|
2760 case Format::eB8G8R8Unorm:
|
|
|
2761 switch ( component )
|
|
|
2762 {
|
|
|
2763 case 0 : return "B";
|
|
|
2764 case 1 : return "G";
|
|
|
2765 case 2 : return "R";
|
|
|
2766 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2767 }
|
|
|
2768 case Format::eB8G8R8Snorm:
|
|
|
2769 switch ( component )
|
|
|
2770 {
|
|
|
2771 case 0 : return "B";
|
|
|
2772 case 1 : return "G";
|
|
|
2773 case 2 : return "R";
|
|
|
2774 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2775 }
|
|
|
2776 case Format::eB8G8R8Uscaled:
|
|
|
2777 switch ( component )
|
|
|
2778 {
|
|
|
2779 case 0 : return "B";
|
|
|
2780 case 1 : return "G";
|
|
|
2781 case 2 : return "R";
|
|
|
2782 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2783 }
|
|
|
2784 case Format::eB8G8R8Sscaled:
|
|
|
2785 switch ( component )
|
|
|
2786 {
|
|
|
2787 case 0 : return "B";
|
|
|
2788 case 1 : return "G";
|
|
|
2789 case 2 : return "R";
|
|
|
2790 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2791 }
|
|
|
2792 case Format::eB8G8R8Uint:
|
|
|
2793 switch ( component )
|
|
|
2794 {
|
|
|
2795 case 0 : return "B";
|
|
|
2796 case 1 : return "G";
|
|
|
2797 case 2 : return "R";
|
|
|
2798 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2799 }
|
|
|
2800 case Format::eB8G8R8Sint:
|
|
|
2801 switch ( component )
|
|
|
2802 {
|
|
|
2803 case 0 : return "B";
|
|
|
2804 case 1 : return "G";
|
|
|
2805 case 2 : return "R";
|
|
|
2806 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2807 }
|
|
|
2808 case Format::eB8G8R8Srgb:
|
|
|
2809 switch ( component )
|
|
|
2810 {
|
|
|
2811 case 0 : return "B";
|
|
|
2812 case 1 : return "G";
|
|
|
2813 case 2 : return "R";
|
|
|
2814 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2815 }
|
|
|
2816 case Format::eR8G8B8A8Unorm:
|
|
|
2817 switch ( component )
|
|
|
2818 {
|
|
|
2819 case 0 : return "R";
|
|
|
2820 case 1 : return "G";
|
|
|
2821 case 2 : return "B";
|
|
|
2822 case 3 : return "A";
|
|
|
2823 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2824 }
|
|
|
2825 case Format::eR8G8B8A8Snorm:
|
|
|
2826 switch ( component )
|
|
|
2827 {
|
|
|
2828 case 0 : return "R";
|
|
|
2829 case 1 : return "G";
|
|
|
2830 case 2 : return "B";
|
|
|
2831 case 3 : return "A";
|
|
|
2832 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2833 }
|
|
|
2834 case Format::eR8G8B8A8Uscaled:
|
|
|
2835 switch ( component )
|
|
|
2836 {
|
|
|
2837 case 0 : return "R";
|
|
|
2838 case 1 : return "G";
|
|
|
2839 case 2 : return "B";
|
|
|
2840 case 3 : return "A";
|
|
|
2841 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2842 }
|
|
|
2843 case Format::eR8G8B8A8Sscaled:
|
|
|
2844 switch ( component )
|
|
|
2845 {
|
|
|
2846 case 0 : return "R";
|
|
|
2847 case 1 : return "G";
|
|
|
2848 case 2 : return "B";
|
|
|
2849 case 3 : return "A";
|
|
|
2850 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2851 }
|
|
|
2852 case Format::eR8G8B8A8Uint:
|
|
|
2853 switch ( component )
|
|
|
2854 {
|
|
|
2855 case 0 : return "R";
|
|
|
2856 case 1 : return "G";
|
|
|
2857 case 2 : return "B";
|
|
|
2858 case 3 : return "A";
|
|
|
2859 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2860 }
|
|
|
2861 case Format::eR8G8B8A8Sint:
|
|
|
2862 switch ( component )
|
|
|
2863 {
|
|
|
2864 case 0 : return "R";
|
|
|
2865 case 1 : return "G";
|
|
|
2866 case 2 : return "B";
|
|
|
2867 case 3 : return "A";
|
|
|
2868 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2869 }
|
|
|
2870 case Format::eR8G8B8A8Srgb:
|
|
|
2871 switch ( component )
|
|
|
2872 {
|
|
|
2873 case 0 : return "R";
|
|
|
2874 case 1 : return "G";
|
|
|
2875 case 2 : return "B";
|
|
|
2876 case 3 : return "A";
|
|
|
2877 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2878 }
|
|
|
2879 case Format::eB8G8R8A8Unorm:
|
|
|
2880 switch ( component )
|
|
|
2881 {
|
|
|
2882 case 0 : return "B";
|
|
|
2883 case 1 : return "G";
|
|
|
2884 case 2 : return "R";
|
|
|
2885 case 3 : return "A";
|
|
|
2886 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2887 }
|
|
|
2888 case Format::eB8G8R8A8Snorm:
|
|
|
2889 switch ( component )
|
|
|
2890 {
|
|
|
2891 case 0 : return "B";
|
|
|
2892 case 1 : return "G";
|
|
|
2893 case 2 : return "R";
|
|
|
2894 case 3 : return "A";
|
|
|
2895 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2896 }
|
|
|
2897 case Format::eB8G8R8A8Uscaled:
|
|
|
2898 switch ( component )
|
|
|
2899 {
|
|
|
2900 case 0 : return "B";
|
|
|
2901 case 1 : return "G";
|
|
|
2902 case 2 : return "R";
|
|
|
2903 case 3 : return "A";
|
|
|
2904 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2905 }
|
|
|
2906 case Format::eB8G8R8A8Sscaled:
|
|
|
2907 switch ( component )
|
|
|
2908 {
|
|
|
2909 case 0 : return "B";
|
|
|
2910 case 1 : return "G";
|
|
|
2911 case 2 : return "R";
|
|
|
2912 case 3 : return "A";
|
|
|
2913 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2914 }
|
|
|
2915 case Format::eB8G8R8A8Uint:
|
|
|
2916 switch ( component )
|
|
|
2917 {
|
|
|
2918 case 0 : return "B";
|
|
|
2919 case 1 : return "G";
|
|
|
2920 case 2 : return "R";
|
|
|
2921 case 3 : return "A";
|
|
|
2922 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2923 }
|
|
|
2924 case Format::eB8G8R8A8Sint:
|
|
|
2925 switch ( component )
|
|
|
2926 {
|
|
|
2927 case 0 : return "B";
|
|
|
2928 case 1 : return "G";
|
|
|
2929 case 2 : return "R";
|
|
|
2930 case 3 : return "A";
|
|
|
2931 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2932 }
|
|
|
2933 case Format::eB8G8R8A8Srgb:
|
|
|
2934 switch ( component )
|
|
|
2935 {
|
|
|
2936 case 0 : return "B";
|
|
|
2937 case 1 : return "G";
|
|
|
2938 case 2 : return "R";
|
|
|
2939 case 3 : return "A";
|
|
|
2940 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2941 }
|
|
|
2942 case Format::eA8B8G8R8UnormPack32:
|
|
|
2943 switch ( component )
|
|
|
2944 {
|
|
|
2945 case 0 : return "A";
|
|
|
2946 case 1 : return "B";
|
|
|
2947 case 2 : return "G";
|
|
|
2948 case 3 : return "R";
|
|
|
2949 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2950 }
|
|
|
2951 case Format::eA8B8G8R8SnormPack32:
|
|
|
2952 switch ( component )
|
|
|
2953 {
|
|
|
2954 case 0 : return "A";
|
|
|
2955 case 1 : return "B";
|
|
|
2956 case 2 : return "G";
|
|
|
2957 case 3 : return "R";
|
|
|
2958 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2959 }
|
|
|
2960 case Format::eA8B8G8R8UscaledPack32:
|
|
|
2961 switch ( component )
|
|
|
2962 {
|
|
|
2963 case 0 : return "A";
|
|
|
2964 case 1 : return "B";
|
|
|
2965 case 2 : return "G";
|
|
|
2966 case 3 : return "R";
|
|
|
2967 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2968 }
|
|
|
2969 case Format::eA8B8G8R8SscaledPack32:
|
|
|
2970 switch ( component )
|
|
|
2971 {
|
|
|
2972 case 0 : return "A";
|
|
|
2973 case 1 : return "B";
|
|
|
2974 case 2 : return "G";
|
|
|
2975 case 3 : return "R";
|
|
|
2976 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2977 }
|
|
|
2978 case Format::eA8B8G8R8UintPack32:
|
|
|
2979 switch ( component )
|
|
|
2980 {
|
|
|
2981 case 0 : return "A";
|
|
|
2982 case 1 : return "B";
|
|
|
2983 case 2 : return "G";
|
|
|
2984 case 3 : return "R";
|
|
|
2985 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2986 }
|
|
|
2987 case Format::eA8B8G8R8SintPack32:
|
|
|
2988 switch ( component )
|
|
|
2989 {
|
|
|
2990 case 0 : return "A";
|
|
|
2991 case 1 : return "B";
|
|
|
2992 case 2 : return "G";
|
|
|
2993 case 3 : return "R";
|
|
|
2994 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
2995 }
|
|
|
2996 case Format::eA8B8G8R8SrgbPack32:
|
|
|
2997 switch ( component )
|
|
|
2998 {
|
|
|
2999 case 0 : return "A";
|
|
|
3000 case 1 : return "B";
|
|
|
3001 case 2 : return "G";
|
|
|
3002 case 3 : return "R";
|
|
|
3003 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3004 }
|
|
|
3005 case Format::eA2R10G10B10UnormPack32:
|
|
|
3006 switch ( component )
|
|
|
3007 {
|
|
|
3008 case 0 : return "A";
|
|
|
3009 case 1 : return "R";
|
|
|
3010 case 2 : return "G";
|
|
|
3011 case 3 : return "B";
|
|
|
3012 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3013 }
|
|
|
3014 case Format::eA2R10G10B10SnormPack32:
|
|
|
3015 switch ( component )
|
|
|
3016 {
|
|
|
3017 case 0 : return "A";
|
|
|
3018 case 1 : return "R";
|
|
|
3019 case 2 : return "G";
|
|
|
3020 case 3 : return "B";
|
|
|
3021 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3022 }
|
|
|
3023 case Format::eA2R10G10B10UscaledPack32:
|
|
|
3024 switch ( component )
|
|
|
3025 {
|
|
|
3026 case 0 : return "A";
|
|
|
3027 case 1 : return "R";
|
|
|
3028 case 2 : return "G";
|
|
|
3029 case 3 : return "B";
|
|
|
3030 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3031 }
|
|
|
3032 case Format::eA2R10G10B10SscaledPack32:
|
|
|
3033 switch ( component )
|
|
|
3034 {
|
|
|
3035 case 0 : return "A";
|
|
|
3036 case 1 : return "R";
|
|
|
3037 case 2 : return "G";
|
|
|
3038 case 3 : return "B";
|
|
|
3039 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3040 }
|
|
|
3041 case Format::eA2R10G10B10UintPack32:
|
|
|
3042 switch ( component )
|
|
|
3043 {
|
|
|
3044 case 0 : return "A";
|
|
|
3045 case 1 : return "R";
|
|
|
3046 case 2 : return "G";
|
|
|
3047 case 3 : return "B";
|
|
|
3048 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3049 }
|
|
|
3050 case Format::eA2R10G10B10SintPack32:
|
|
|
3051 switch ( component )
|
|
|
3052 {
|
|
|
3053 case 0 : return "A";
|
|
|
3054 case 1 : return "R";
|
|
|
3055 case 2 : return "G";
|
|
|
3056 case 3 : return "B";
|
|
|
3057 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3058 }
|
|
|
3059 case Format::eA2B10G10R10UnormPack32:
|
|
|
3060 switch ( component )
|
|
|
3061 {
|
|
|
3062 case 0 : return "A";
|
|
|
3063 case 1 : return "B";
|
|
|
3064 case 2 : return "G";
|
|
|
3065 case 3 : return "R";
|
|
|
3066 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3067 }
|
|
|
3068 case Format::eA2B10G10R10SnormPack32:
|
|
|
3069 switch ( component )
|
|
|
3070 {
|
|
|
3071 case 0 : return "A";
|
|
|
3072 case 1 : return "B";
|
|
|
3073 case 2 : return "G";
|
|
|
3074 case 3 : return "R";
|
|
|
3075 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3076 }
|
|
|
3077 case Format::eA2B10G10R10UscaledPack32:
|
|
|
3078 switch ( component )
|
|
|
3079 {
|
|
|
3080 case 0 : return "A";
|
|
|
3081 case 1 : return "B";
|
|
|
3082 case 2 : return "G";
|
|
|
3083 case 3 : return "R";
|
|
|
3084 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3085 }
|
|
|
3086 case Format::eA2B10G10R10SscaledPack32:
|
|
|
3087 switch ( component )
|
|
|
3088 {
|
|
|
3089 case 0 : return "A";
|
|
|
3090 case 1 : return "B";
|
|
|
3091 case 2 : return "G";
|
|
|
3092 case 3 : return "R";
|
|
|
3093 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3094 }
|
|
|
3095 case Format::eA2B10G10R10UintPack32:
|
|
|
3096 switch ( component )
|
|
|
3097 {
|
|
|
3098 case 0 : return "A";
|
|
|
3099 case 1 : return "B";
|
|
|
3100 case 2 : return "G";
|
|
|
3101 case 3 : return "R";
|
|
|
3102 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3103 }
|
|
|
3104 case Format::eA2B10G10R10SintPack32:
|
|
|
3105 switch ( component )
|
|
|
3106 {
|
|
|
3107 case 0 : return "A";
|
|
|
3108 case 1 : return "B";
|
|
|
3109 case 2 : return "G";
|
|
|
3110 case 3 : return "R";
|
|
|
3111 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3112 }
|
|
|
3113 case Format::eR16Unorm:
|
|
|
3114 switch ( component )
|
|
|
3115 {
|
|
|
3116 case 0 : return "R";
|
|
|
3117 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3118 }
|
|
|
3119 case Format::eR16Snorm:
|
|
|
3120 switch ( component )
|
|
|
3121 {
|
|
|
3122 case 0 : return "R";
|
|
|
3123 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3124 }
|
|
|
3125 case Format::eR16Uscaled:
|
|
|
3126 switch ( component )
|
|
|
3127 {
|
|
|
3128 case 0 : return "R";
|
|
|
3129 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3130 }
|
|
|
3131 case Format::eR16Sscaled:
|
|
|
3132 switch ( component )
|
|
|
3133 {
|
|
|
3134 case 0 : return "R";
|
|
|
3135 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3136 }
|
|
|
3137 case Format::eR16Uint:
|
|
|
3138 switch ( component )
|
|
|
3139 {
|
|
|
3140 case 0 : return "R";
|
|
|
3141 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3142 }
|
|
|
3143 case Format::eR16Sint:
|
|
|
3144 switch ( component )
|
|
|
3145 {
|
|
|
3146 case 0 : return "R";
|
|
|
3147 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3148 }
|
|
|
3149 case Format::eR16Sfloat:
|
|
|
3150 switch ( component )
|
|
|
3151 {
|
|
|
3152 case 0 : return "R";
|
|
|
3153 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3154 }
|
|
|
3155 case Format::eR16G16Unorm:
|
|
|
3156 switch ( component )
|
|
|
3157 {
|
|
|
3158 case 0 : return "R";
|
|
|
3159 case 1 : return "G";
|
|
|
3160 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3161 }
|
|
|
3162 case Format::eR16G16Snorm:
|
|
|
3163 switch ( component )
|
|
|
3164 {
|
|
|
3165 case 0 : return "R";
|
|
|
3166 case 1 : return "G";
|
|
|
3167 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3168 }
|
|
|
3169 case Format::eR16G16Uscaled:
|
|
|
3170 switch ( component )
|
|
|
3171 {
|
|
|
3172 case 0 : return "R";
|
|
|
3173 case 1 : return "G";
|
|
|
3174 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3175 }
|
|
|
3176 case Format::eR16G16Sscaled:
|
|
|
3177 switch ( component )
|
|
|
3178 {
|
|
|
3179 case 0 : return "R";
|
|
|
3180 case 1 : return "G";
|
|
|
3181 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3182 }
|
|
|
3183 case Format::eR16G16Uint:
|
|
|
3184 switch ( component )
|
|
|
3185 {
|
|
|
3186 case 0 : return "R";
|
|
|
3187 case 1 : return "G";
|
|
|
3188 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3189 }
|
|
|
3190 case Format::eR16G16Sint:
|
|
|
3191 switch ( component )
|
|
|
3192 {
|
|
|
3193 case 0 : return "R";
|
|
|
3194 case 1 : return "G";
|
|
|
3195 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3196 }
|
|
|
3197 case Format::eR16G16Sfloat:
|
|
|
3198 switch ( component )
|
|
|
3199 {
|
|
|
3200 case 0 : return "R";
|
|
|
3201 case 1 : return "G";
|
|
|
3202 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3203 }
|
|
|
3204 case Format::eR16G16B16Unorm:
|
|
|
3205 switch ( component )
|
|
|
3206 {
|
|
|
3207 case 0 : return "R";
|
|
|
3208 case 1 : return "G";
|
|
|
3209 case 2 : return "B";
|
|
|
3210 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3211 }
|
|
|
3212 case Format::eR16G16B16Snorm:
|
|
|
3213 switch ( component )
|
|
|
3214 {
|
|
|
3215 case 0 : return "R";
|
|
|
3216 case 1 : return "G";
|
|
|
3217 case 2 : return "B";
|
|
|
3218 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3219 }
|
|
|
3220 case Format::eR16G16B16Uscaled:
|
|
|
3221 switch ( component )
|
|
|
3222 {
|
|
|
3223 case 0 : return "R";
|
|
|
3224 case 1 : return "G";
|
|
|
3225 case 2 : return "B";
|
|
|
3226 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3227 }
|
|
|
3228 case Format::eR16G16B16Sscaled:
|
|
|
3229 switch ( component )
|
|
|
3230 {
|
|
|
3231 case 0 : return "R";
|
|
|
3232 case 1 : return "G";
|
|
|
3233 case 2 : return "B";
|
|
|
3234 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3235 }
|
|
|
3236 case Format::eR16G16B16Uint:
|
|
|
3237 switch ( component )
|
|
|
3238 {
|
|
|
3239 case 0 : return "R";
|
|
|
3240 case 1 : return "G";
|
|
|
3241 case 2 : return "B";
|
|
|
3242 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3243 }
|
|
|
3244 case Format::eR16G16B16Sint:
|
|
|
3245 switch ( component )
|
|
|
3246 {
|
|
|
3247 case 0 : return "R";
|
|
|
3248 case 1 : return "G";
|
|
|
3249 case 2 : return "B";
|
|
|
3250 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3251 }
|
|
|
3252 case Format::eR16G16B16Sfloat:
|
|
|
3253 switch ( component )
|
|
|
3254 {
|
|
|
3255 case 0 : return "R";
|
|
|
3256 case 1 : return "G";
|
|
|
3257 case 2 : return "B";
|
|
|
3258 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3259 }
|
|
|
3260 case Format::eR16G16B16A16Unorm:
|
|
|
3261 switch ( component )
|
|
|
3262 {
|
|
|
3263 case 0 : return "R";
|
|
|
3264 case 1 : return "G";
|
|
|
3265 case 2 : return "B";
|
|
|
3266 case 3 : return "A";
|
|
|
3267 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3268 }
|
|
|
3269 case Format::eR16G16B16A16Snorm:
|
|
|
3270 switch ( component )
|
|
|
3271 {
|
|
|
3272 case 0 : return "R";
|
|
|
3273 case 1 : return "G";
|
|
|
3274 case 2 : return "B";
|
|
|
3275 case 3 : return "A";
|
|
|
3276 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3277 }
|
|
|
3278 case Format::eR16G16B16A16Uscaled:
|
|
|
3279 switch ( component )
|
|
|
3280 {
|
|
|
3281 case 0 : return "R";
|
|
|
3282 case 1 : return "G";
|
|
|
3283 case 2 : return "B";
|
|
|
3284 case 3 : return "A";
|
|
|
3285 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3286 }
|
|
|
3287 case Format::eR16G16B16A16Sscaled:
|
|
|
3288 switch ( component )
|
|
|
3289 {
|
|
|
3290 case 0 : return "R";
|
|
|
3291 case 1 : return "G";
|
|
|
3292 case 2 : return "B";
|
|
|
3293 case 3 : return "A";
|
|
|
3294 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3295 }
|
|
|
3296 case Format::eR16G16B16A16Uint:
|
|
|
3297 switch ( component )
|
|
|
3298 {
|
|
|
3299 case 0 : return "R";
|
|
|
3300 case 1 : return "G";
|
|
|
3301 case 2 : return "B";
|
|
|
3302 case 3 : return "A";
|
|
|
3303 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3304 }
|
|
|
3305 case Format::eR16G16B16A16Sint:
|
|
|
3306 switch ( component )
|
|
|
3307 {
|
|
|
3308 case 0 : return "R";
|
|
|
3309 case 1 : return "G";
|
|
|
3310 case 2 : return "B";
|
|
|
3311 case 3 : return "A";
|
|
|
3312 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3313 }
|
|
|
3314 case Format::eR16G16B16A16Sfloat:
|
|
|
3315 switch ( component )
|
|
|
3316 {
|
|
|
3317 case 0 : return "R";
|
|
|
3318 case 1 : return "G";
|
|
|
3319 case 2 : return "B";
|
|
|
3320 case 3 : return "A";
|
|
|
3321 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3322 }
|
|
|
3323 case Format::eR32Uint:
|
|
|
3324 switch ( component )
|
|
|
3325 {
|
|
|
3326 case 0 : return "R";
|
|
|
3327 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3328 }
|
|
|
3329 case Format::eR32Sint:
|
|
|
3330 switch ( component )
|
|
|
3331 {
|
|
|
3332 case 0 : return "R";
|
|
|
3333 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3334 }
|
|
|
3335 case Format::eR32Sfloat:
|
|
|
3336 switch ( component )
|
|
|
3337 {
|
|
|
3338 case 0 : return "R";
|
|
|
3339 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3340 }
|
|
|
3341 case Format::eR32G32Uint:
|
|
|
3342 switch ( component )
|
|
|
3343 {
|
|
|
3344 case 0 : return "R";
|
|
|
3345 case 1 : return "G";
|
|
|
3346 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3347 }
|
|
|
3348 case Format::eR32G32Sint:
|
|
|
3349 switch ( component )
|
|
|
3350 {
|
|
|
3351 case 0 : return "R";
|
|
|
3352 case 1 : return "G";
|
|
|
3353 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3354 }
|
|
|
3355 case Format::eR32G32Sfloat:
|
|
|
3356 switch ( component )
|
|
|
3357 {
|
|
|
3358 case 0 : return "R";
|
|
|
3359 case 1 : return "G";
|
|
|
3360 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3361 }
|
|
|
3362 case Format::eR32G32B32Uint:
|
|
|
3363 switch ( component )
|
|
|
3364 {
|
|
|
3365 case 0 : return "R";
|
|
|
3366 case 1 : return "G";
|
|
|
3367 case 2 : return "B";
|
|
|
3368 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3369 }
|
|
|
3370 case Format::eR32G32B32Sint:
|
|
|
3371 switch ( component )
|
|
|
3372 {
|
|
|
3373 case 0 : return "R";
|
|
|
3374 case 1 : return "G";
|
|
|
3375 case 2 : return "B";
|
|
|
3376 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3377 }
|
|
|
3378 case Format::eR32G32B32Sfloat:
|
|
|
3379 switch ( component )
|
|
|
3380 {
|
|
|
3381 case 0 : return "R";
|
|
|
3382 case 1 : return "G";
|
|
|
3383 case 2 : return "B";
|
|
|
3384 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3385 }
|
|
|
3386 case Format::eR32G32B32A32Uint:
|
|
|
3387 switch ( component )
|
|
|
3388 {
|
|
|
3389 case 0 : return "R";
|
|
|
3390 case 1 : return "G";
|
|
|
3391 case 2 : return "B";
|
|
|
3392 case 3 : return "A";
|
|
|
3393 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3394 }
|
|
|
3395 case Format::eR32G32B32A32Sint:
|
|
|
3396 switch ( component )
|
|
|
3397 {
|
|
|
3398 case 0 : return "R";
|
|
|
3399 case 1 : return "G";
|
|
|
3400 case 2 : return "B";
|
|
|
3401 case 3 : return "A";
|
|
|
3402 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3403 }
|
|
|
3404 case Format::eR32G32B32A32Sfloat:
|
|
|
3405 switch ( component )
|
|
|
3406 {
|
|
|
3407 case 0 : return "R";
|
|
|
3408 case 1 : return "G";
|
|
|
3409 case 2 : return "B";
|
|
|
3410 case 3 : return "A";
|
|
|
3411 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3412 }
|
|
|
3413 case Format::eR64Uint:
|
|
|
3414 switch ( component )
|
|
|
3415 {
|
|
|
3416 case 0 : return "R";
|
|
|
3417 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3418 }
|
|
|
3419 case Format::eR64Sint:
|
|
|
3420 switch ( component )
|
|
|
3421 {
|
|
|
3422 case 0 : return "R";
|
|
|
3423 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3424 }
|
|
|
3425 case Format::eR64Sfloat:
|
|
|
3426 switch ( component )
|
|
|
3427 {
|
|
|
3428 case 0 : return "R";
|
|
|
3429 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3430 }
|
|
|
3431 case Format::eR64G64Uint:
|
|
|
3432 switch ( component )
|
|
|
3433 {
|
|
|
3434 case 0 : return "R";
|
|
|
3435 case 1 : return "G";
|
|
|
3436 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3437 }
|
|
|
3438 case Format::eR64G64Sint:
|
|
|
3439 switch ( component )
|
|
|
3440 {
|
|
|
3441 case 0 : return "R";
|
|
|
3442 case 1 : return "G";
|
|
|
3443 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3444 }
|
|
|
3445 case Format::eR64G64Sfloat:
|
|
|
3446 switch ( component )
|
|
|
3447 {
|
|
|
3448 case 0 : return "R";
|
|
|
3449 case 1 : return "G";
|
|
|
3450 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3451 }
|
|
|
3452 case Format::eR64G64B64Uint:
|
|
|
3453 switch ( component )
|
|
|
3454 {
|
|
|
3455 case 0 : return "R";
|
|
|
3456 case 1 : return "G";
|
|
|
3457 case 2 : return "B";
|
|
|
3458 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3459 }
|
|
|
3460 case Format::eR64G64B64Sint:
|
|
|
3461 switch ( component )
|
|
|
3462 {
|
|
|
3463 case 0 : return "R";
|
|
|
3464 case 1 : return "G";
|
|
|
3465 case 2 : return "B";
|
|
|
3466 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3467 }
|
|
|
3468 case Format::eR64G64B64Sfloat:
|
|
|
3469 switch ( component )
|
|
|
3470 {
|
|
|
3471 case 0 : return "R";
|
|
|
3472 case 1 : return "G";
|
|
|
3473 case 2 : return "B";
|
|
|
3474 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3475 }
|
|
|
3476 case Format::eR64G64B64A64Uint:
|
|
|
3477 switch ( component )
|
|
|
3478 {
|
|
|
3479 case 0 : return "R";
|
|
|
3480 case 1 : return "G";
|
|
|
3481 case 2 : return "B";
|
|
|
3482 case 3 : return "A";
|
|
|
3483 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3484 }
|
|
|
3485 case Format::eR64G64B64A64Sint:
|
|
|
3486 switch ( component )
|
|
|
3487 {
|
|
|
3488 case 0 : return "R";
|
|
|
3489 case 1 : return "G";
|
|
|
3490 case 2 : return "B";
|
|
|
3491 case 3 : return "A";
|
|
|
3492 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3493 }
|
|
|
3494 case Format::eR64G64B64A64Sfloat:
|
|
|
3495 switch ( component )
|
|
|
3496 {
|
|
|
3497 case 0 : return "R";
|
|
|
3498 case 1 : return "G";
|
|
|
3499 case 2 : return "B";
|
|
|
3500 case 3 : return "A";
|
|
|
3501 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3502 }
|
|
|
3503 case Format::eB10G11R11UfloatPack32:
|
|
|
3504 switch ( component )
|
|
|
3505 {
|
|
|
3506 case 0 : return "B";
|
|
|
3507 case 1 : return "G";
|
|
|
3508 case 2 : return "R";
|
|
|
3509 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3510 }
|
|
|
3511 case Format::eE5B9G9R9UfloatPack32:
|
|
|
3512 switch ( component )
|
|
|
3513 {
|
|
|
3514 case 0 : return "B";
|
|
|
3515 case 1 : return "G";
|
|
|
3516 case 2 : return "R";
|
|
|
3517 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3518 }
|
|
|
3519 case Format::eD16Unorm:
|
|
|
3520 switch ( component )
|
|
|
3521 {
|
|
|
3522 case 0 : return "D";
|
|
|
3523 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3524 }
|
|
|
3525 case Format::eX8D24UnormPack32:
|
|
|
3526 switch ( component )
|
|
|
3527 {
|
|
|
3528 case 0 : return "D";
|
|
|
3529 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3530 }
|
|
|
3531 case Format::eD32Sfloat:
|
|
|
3532 switch ( component )
|
|
|
3533 {
|
|
|
3534 case 0 : return "D";
|
|
|
3535 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3536 }
|
|
|
3537 case Format::eS8Uint:
|
|
|
3538 switch ( component )
|
|
|
3539 {
|
|
|
3540 case 0 : return "S";
|
|
|
3541 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3542 }
|
|
|
3543 case Format::eD16UnormS8Uint:
|
|
|
3544 switch ( component )
|
|
|
3545 {
|
|
|
3546 case 0 : return "D";
|
|
|
3547 case 1 : return "S";
|
|
|
3548 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3549 }
|
|
|
3550 case Format::eD24UnormS8Uint:
|
|
|
3551 switch ( component )
|
|
|
3552 {
|
|
|
3553 case 0 : return "D";
|
|
|
3554 case 1 : return "S";
|
|
|
3555 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3556 }
|
|
|
3557 case Format::eD32SfloatS8Uint:
|
|
|
3558 switch ( component )
|
|
|
3559 {
|
|
|
3560 case 0 : return "D";
|
|
|
3561 case 1 : return "S";
|
|
|
3562 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3563 }
|
|
|
3564 case Format::eBc1RgbUnormBlock:
|
|
|
3565 switch ( component )
|
|
|
3566 {
|
|
|
3567 case 0 : return "R";
|
|
|
3568 case 1 : return "G";
|
|
|
3569 case 2 : return "B";
|
|
|
3570 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3571 }
|
|
|
3572 case Format::eBc1RgbSrgbBlock:
|
|
|
3573 switch ( component )
|
|
|
3574 {
|
|
|
3575 case 0 : return "R";
|
|
|
3576 case 1 : return "G";
|
|
|
3577 case 2 : return "B";
|
|
|
3578 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3579 }
|
|
|
3580 case Format::eBc1RgbaUnormBlock:
|
|
|
3581 switch ( component )
|
|
|
3582 {
|
|
|
3583 case 0 : return "R";
|
|
|
3584 case 1 : return "G";
|
|
|
3585 case 2 : return "B";
|
|
|
3586 case 3 : return "A";
|
|
|
3587 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3588 }
|
|
|
3589 case Format::eBc1RgbaSrgbBlock:
|
|
|
3590 switch ( component )
|
|
|
3591 {
|
|
|
3592 case 0 : return "R";
|
|
|
3593 case 1 : return "G";
|
|
|
3594 case 2 : return "B";
|
|
|
3595 case 3 : return "A";
|
|
|
3596 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3597 }
|
|
|
3598 case Format::eBc2UnormBlock:
|
|
|
3599 switch ( component )
|
|
|
3600 {
|
|
|
3601 case 0 : return "R";
|
|
|
3602 case 1 : return "G";
|
|
|
3603 case 2 : return "B";
|
|
|
3604 case 3 : return "A";
|
|
|
3605 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3606 }
|
|
|
3607 case Format::eBc2SrgbBlock:
|
|
|
3608 switch ( component )
|
|
|
3609 {
|
|
|
3610 case 0 : return "R";
|
|
|
3611 case 1 : return "G";
|
|
|
3612 case 2 : return "B";
|
|
|
3613 case 3 : return "A";
|
|
|
3614 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3615 }
|
|
|
3616 case Format::eBc3UnormBlock:
|
|
|
3617 switch ( component )
|
|
|
3618 {
|
|
|
3619 case 0 : return "R";
|
|
|
3620 case 1 : return "G";
|
|
|
3621 case 2 : return "B";
|
|
|
3622 case 3 : return "A";
|
|
|
3623 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3624 }
|
|
|
3625 case Format::eBc3SrgbBlock:
|
|
|
3626 switch ( component )
|
|
|
3627 {
|
|
|
3628 case 0 : return "R";
|
|
|
3629 case 1 : return "G";
|
|
|
3630 case 2 : return "B";
|
|
|
3631 case 3 : return "A";
|
|
|
3632 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3633 }
|
|
|
3634 case Format::eBc4UnormBlock:
|
|
|
3635 switch ( component )
|
|
|
3636 {
|
|
|
3637 case 0 : return "R";
|
|
|
3638 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3639 }
|
|
|
3640 case Format::eBc4SnormBlock:
|
|
|
3641 switch ( component )
|
|
|
3642 {
|
|
|
3643 case 0 : return "R";
|
|
|
3644 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3645 }
|
|
|
3646 case Format::eBc5UnormBlock:
|
|
|
3647 switch ( component )
|
|
|
3648 {
|
|
|
3649 case 0 : return "R";
|
|
|
3650 case 1 : return "G";
|
|
|
3651 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3652 }
|
|
|
3653 case Format::eBc5SnormBlock:
|
|
|
3654 switch ( component )
|
|
|
3655 {
|
|
|
3656 case 0 : return "R";
|
|
|
3657 case 1 : return "G";
|
|
|
3658 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3659 }
|
|
|
3660 case Format::eBc6HUfloatBlock:
|
|
|
3661 switch ( component )
|
|
|
3662 {
|
|
|
3663 case 0 : return "R";
|
|
|
3664 case 1 : return "G";
|
|
|
3665 case 2 : return "B";
|
|
|
3666 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3667 }
|
|
|
3668 case Format::eBc6HSfloatBlock:
|
|
|
3669 switch ( component )
|
|
|
3670 {
|
|
|
3671 case 0 : return "R";
|
|
|
3672 case 1 : return "G";
|
|
|
3673 case 2 : return "B";
|
|
|
3674 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3675 }
|
|
|
3676 case Format::eBc7UnormBlock:
|
|
|
3677 switch ( component )
|
|
|
3678 {
|
|
|
3679 case 0 : return "R";
|
|
|
3680 case 1 : return "G";
|
|
|
3681 case 2 : return "B";
|
|
|
3682 case 3 : return "A";
|
|
|
3683 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3684 }
|
|
|
3685 case Format::eBc7SrgbBlock:
|
|
|
3686 switch ( component )
|
|
|
3687 {
|
|
|
3688 case 0 : return "R";
|
|
|
3689 case 1 : return "G";
|
|
|
3690 case 2 : return "B";
|
|
|
3691 case 3 : return "A";
|
|
|
3692 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3693 }
|
|
|
3694 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
3695 switch ( component )
|
|
|
3696 {
|
|
|
3697 case 0 : return "R";
|
|
|
3698 case 1 : return "G";
|
|
|
3699 case 2 : return "B";
|
|
|
3700 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3701 }
|
|
|
3702 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
3703 switch ( component )
|
|
|
3704 {
|
|
|
3705 case 0 : return "R";
|
|
|
3706 case 1 : return "G";
|
|
|
3707 case 2 : return "B";
|
|
|
3708 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3709 }
|
|
|
3710 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
3711 switch ( component )
|
|
|
3712 {
|
|
|
3713 case 0 : return "R";
|
|
|
3714 case 1 : return "G";
|
|
|
3715 case 2 : return "B";
|
|
|
3716 case 3 : return "A";
|
|
|
3717 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3718 }
|
|
|
3719 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
3720 switch ( component )
|
|
|
3721 {
|
|
|
3722 case 0 : return "R";
|
|
|
3723 case 1 : return "G";
|
|
|
3724 case 2 : return "B";
|
|
|
3725 case 3 : return "A";
|
|
|
3726 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3727 }
|
|
|
3728 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
3729 switch ( component )
|
|
|
3730 {
|
|
|
3731 case 0 : return "R";
|
|
|
3732 case 1 : return "G";
|
|
|
3733 case 2 : return "B";
|
|
|
3734 case 3 : return "A";
|
|
|
3735 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3736 }
|
|
|
3737 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
3738 switch ( component )
|
|
|
3739 {
|
|
|
3740 case 0 : return "R";
|
|
|
3741 case 1 : return "G";
|
|
|
3742 case 2 : return "B";
|
|
|
3743 case 3 : return "A";
|
|
|
3744 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3745 }
|
|
|
3746 case Format::eEacR11UnormBlock:
|
|
|
3747 switch ( component )
|
|
|
3748 {
|
|
|
3749 case 0 : return "R";
|
|
|
3750 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3751 }
|
|
|
3752 case Format::eEacR11SnormBlock:
|
|
|
3753 switch ( component )
|
|
|
3754 {
|
|
|
3755 case 0 : return "R";
|
|
|
3756 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3757 }
|
|
|
3758 case Format::eEacR11G11UnormBlock:
|
|
|
3759 switch ( component )
|
|
|
3760 {
|
|
|
3761 case 0 : return "R";
|
|
|
3762 case 1 : return "G";
|
|
|
3763 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3764 }
|
|
|
3765 case Format::eEacR11G11SnormBlock:
|
|
|
3766 switch ( component )
|
|
|
3767 {
|
|
|
3768 case 0 : return "R";
|
|
|
3769 case 1 : return "G";
|
|
|
3770 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3771 }
|
|
|
3772 case Format::eAstc4x4UnormBlock:
|
|
|
3773 switch ( component )
|
|
|
3774 {
|
|
|
3775 case 0 : return "R";
|
|
|
3776 case 1 : return "G";
|
|
|
3777 case 2 : return "B";
|
|
|
3778 case 3 : return "A";
|
|
|
3779 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3780 }
|
|
|
3781 case Format::eAstc4x4SrgbBlock:
|
|
|
3782 switch ( component )
|
|
|
3783 {
|
|
|
3784 case 0 : return "R";
|
|
|
3785 case 1 : return "G";
|
|
|
3786 case 2 : return "B";
|
|
|
3787 case 3 : return "A";
|
|
|
3788 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3789 }
|
|
|
3790 case Format::eAstc5x4UnormBlock:
|
|
|
3791 switch ( component )
|
|
|
3792 {
|
|
|
3793 case 0 : return "R";
|
|
|
3794 case 1 : return "G";
|
|
|
3795 case 2 : return "B";
|
|
|
3796 case 3 : return "A";
|
|
|
3797 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3798 }
|
|
|
3799 case Format::eAstc5x4SrgbBlock:
|
|
|
3800 switch ( component )
|
|
|
3801 {
|
|
|
3802 case 0 : return "R";
|
|
|
3803 case 1 : return "G";
|
|
|
3804 case 2 : return "B";
|
|
|
3805 case 3 : return "A";
|
|
|
3806 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3807 }
|
|
|
3808 case Format::eAstc5x5UnormBlock:
|
|
|
3809 switch ( component )
|
|
|
3810 {
|
|
|
3811 case 0 : return "R";
|
|
|
3812 case 1 : return "G";
|
|
|
3813 case 2 : return "B";
|
|
|
3814 case 3 : return "A";
|
|
|
3815 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3816 }
|
|
|
3817 case Format::eAstc5x5SrgbBlock:
|
|
|
3818 switch ( component )
|
|
|
3819 {
|
|
|
3820 case 0 : return "R";
|
|
|
3821 case 1 : return "G";
|
|
|
3822 case 2 : return "B";
|
|
|
3823 case 3 : return "A";
|
|
|
3824 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3825 }
|
|
|
3826 case Format::eAstc6x5UnormBlock:
|
|
|
3827 switch ( component )
|
|
|
3828 {
|
|
|
3829 case 0 : return "R";
|
|
|
3830 case 1 : return "G";
|
|
|
3831 case 2 : return "B";
|
|
|
3832 case 3 : return "A";
|
|
|
3833 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3834 }
|
|
|
3835 case Format::eAstc6x5SrgbBlock:
|
|
|
3836 switch ( component )
|
|
|
3837 {
|
|
|
3838 case 0 : return "R";
|
|
|
3839 case 1 : return "G";
|
|
|
3840 case 2 : return "B";
|
|
|
3841 case 3 : return "A";
|
|
|
3842 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3843 }
|
|
|
3844 case Format::eAstc6x6UnormBlock:
|
|
|
3845 switch ( component )
|
|
|
3846 {
|
|
|
3847 case 0 : return "R";
|
|
|
3848 case 1 : return "G";
|
|
|
3849 case 2 : return "B";
|
|
|
3850 case 3 : return "A";
|
|
|
3851 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3852 }
|
|
|
3853 case Format::eAstc6x6SrgbBlock:
|
|
|
3854 switch ( component )
|
|
|
3855 {
|
|
|
3856 case 0 : return "R";
|
|
|
3857 case 1 : return "G";
|
|
|
3858 case 2 : return "B";
|
|
|
3859 case 3 : return "A";
|
|
|
3860 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3861 }
|
|
|
3862 case Format::eAstc8x5UnormBlock:
|
|
|
3863 switch ( component )
|
|
|
3864 {
|
|
|
3865 case 0 : return "R";
|
|
|
3866 case 1 : return "G";
|
|
|
3867 case 2 : return "B";
|
|
|
3868 case 3 : return "A";
|
|
|
3869 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3870 }
|
|
|
3871 case Format::eAstc8x5SrgbBlock:
|
|
|
3872 switch ( component )
|
|
|
3873 {
|
|
|
3874 case 0 : return "R";
|
|
|
3875 case 1 : return "G";
|
|
|
3876 case 2 : return "B";
|
|
|
3877 case 3 : return "A";
|
|
|
3878 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3879 }
|
|
|
3880 case Format::eAstc8x6UnormBlock:
|
|
|
3881 switch ( component )
|
|
|
3882 {
|
|
|
3883 case 0 : return "R";
|
|
|
3884 case 1 : return "G";
|
|
|
3885 case 2 : return "B";
|
|
|
3886 case 3 : return "A";
|
|
|
3887 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3888 }
|
|
|
3889 case Format::eAstc8x6SrgbBlock:
|
|
|
3890 switch ( component )
|
|
|
3891 {
|
|
|
3892 case 0 : return "R";
|
|
|
3893 case 1 : return "G";
|
|
|
3894 case 2 : return "B";
|
|
|
3895 case 3 : return "A";
|
|
|
3896 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3897 }
|
|
|
3898 case Format::eAstc8x8UnormBlock:
|
|
|
3899 switch ( component )
|
|
|
3900 {
|
|
|
3901 case 0 : return "R";
|
|
|
3902 case 1 : return "G";
|
|
|
3903 case 2 : return "B";
|
|
|
3904 case 3 : return "A";
|
|
|
3905 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3906 }
|
|
|
3907 case Format::eAstc8x8SrgbBlock:
|
|
|
3908 switch ( component )
|
|
|
3909 {
|
|
|
3910 case 0 : return "R";
|
|
|
3911 case 1 : return "G";
|
|
|
3912 case 2 : return "B";
|
|
|
3913 case 3 : return "A";
|
|
|
3914 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3915 }
|
|
|
3916 case Format::eAstc10x5UnormBlock:
|
|
|
3917 switch ( component )
|
|
|
3918 {
|
|
|
3919 case 0 : return "R";
|
|
|
3920 case 1 : return "G";
|
|
|
3921 case 2 : return "B";
|
|
|
3922 case 3 : return "A";
|
|
|
3923 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3924 }
|
|
|
3925 case Format::eAstc10x5SrgbBlock:
|
|
|
3926 switch ( component )
|
|
|
3927 {
|
|
|
3928 case 0 : return "R";
|
|
|
3929 case 1 : return "G";
|
|
|
3930 case 2 : return "B";
|
|
|
3931 case 3 : return "A";
|
|
|
3932 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3933 }
|
|
|
3934 case Format::eAstc10x6UnormBlock:
|
|
|
3935 switch ( component )
|
|
|
3936 {
|
|
|
3937 case 0 : return "R";
|
|
|
3938 case 1 : return "G";
|
|
|
3939 case 2 : return "B";
|
|
|
3940 case 3 : return "A";
|
|
|
3941 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3942 }
|
|
|
3943 case Format::eAstc10x6SrgbBlock:
|
|
|
3944 switch ( component )
|
|
|
3945 {
|
|
|
3946 case 0 : return "R";
|
|
|
3947 case 1 : return "G";
|
|
|
3948 case 2 : return "B";
|
|
|
3949 case 3 : return "A";
|
|
|
3950 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3951 }
|
|
|
3952 case Format::eAstc10x8UnormBlock:
|
|
|
3953 switch ( component )
|
|
|
3954 {
|
|
|
3955 case 0 : return "R";
|
|
|
3956 case 1 : return "G";
|
|
|
3957 case 2 : return "B";
|
|
|
3958 case 3 : return "A";
|
|
|
3959 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3960 }
|
|
|
3961 case Format::eAstc10x8SrgbBlock:
|
|
|
3962 switch ( component )
|
|
|
3963 {
|
|
|
3964 case 0 : return "R";
|
|
|
3965 case 1 : return "G";
|
|
|
3966 case 2 : return "B";
|
|
|
3967 case 3 : return "A";
|
|
|
3968 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3969 }
|
|
|
3970 case Format::eAstc10x10UnormBlock:
|
|
|
3971 switch ( component )
|
|
|
3972 {
|
|
|
3973 case 0 : return "R";
|
|
|
3974 case 1 : return "G";
|
|
|
3975 case 2 : return "B";
|
|
|
3976 case 3 : return "A";
|
|
|
3977 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3978 }
|
|
|
3979 case Format::eAstc10x10SrgbBlock:
|
|
|
3980 switch ( component )
|
|
|
3981 {
|
|
|
3982 case 0 : return "R";
|
|
|
3983 case 1 : return "G";
|
|
|
3984 case 2 : return "B";
|
|
|
3985 case 3 : return "A";
|
|
|
3986 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3987 }
|
|
|
3988 case Format::eAstc12x10UnormBlock:
|
|
|
3989 switch ( component )
|
|
|
3990 {
|
|
|
3991 case 0 : return "R";
|
|
|
3992 case 1 : return "G";
|
|
|
3993 case 2 : return "B";
|
|
|
3994 case 3 : return "A";
|
|
|
3995 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
3996 }
|
|
|
3997 case Format::eAstc12x10SrgbBlock:
|
|
|
3998 switch ( component )
|
|
|
3999 {
|
|
|
4000 case 0 : return "R";
|
|
|
4001 case 1 : return "G";
|
|
|
4002 case 2 : return "B";
|
|
|
4003 case 3 : return "A";
|
|
|
4004 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4005 }
|
|
|
4006 case Format::eAstc12x12UnormBlock:
|
|
|
4007 switch ( component )
|
|
|
4008 {
|
|
|
4009 case 0 : return "R";
|
|
|
4010 case 1 : return "G";
|
|
|
4011 case 2 : return "B";
|
|
|
4012 case 3 : return "A";
|
|
|
4013 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4014 }
|
|
|
4015 case Format::eAstc12x12SrgbBlock:
|
|
|
4016 switch ( component )
|
|
|
4017 {
|
|
|
4018 case 0 : return "R";
|
|
|
4019 case 1 : return "G";
|
|
|
4020 case 2 : return "B";
|
|
|
4021 case 3 : return "A";
|
|
|
4022 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4023 }
|
|
|
4024 case Format::eG8B8G8R8422Unorm:
|
|
|
4025 switch ( component )
|
|
|
4026 {
|
|
|
4027 case 0 : return "G";
|
|
|
4028 case 1 : return "B";
|
|
|
4029 case 2 : return "G";
|
|
|
4030 case 3 : return "R";
|
|
|
4031 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4032 }
|
|
|
4033 case Format::eB8G8R8G8422Unorm:
|
|
|
4034 switch ( component )
|
|
|
4035 {
|
|
|
4036 case 0 : return "B";
|
|
|
4037 case 1 : return "G";
|
|
|
4038 case 2 : return "R";
|
|
|
4039 case 3 : return "G";
|
|
|
4040 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4041 }
|
|
|
4042 case Format::eG8B8R83Plane420Unorm:
|
|
|
4043 switch ( component )
|
|
|
4044 {
|
|
|
4045 case 0 : return "G";
|
|
|
4046 case 1 : return "B";
|
|
|
4047 case 2 : return "R";
|
|
|
4048 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4049 }
|
|
|
4050 case Format::eG8B8R82Plane420Unorm:
|
|
|
4051 switch ( component )
|
|
|
4052 {
|
|
|
4053 case 0 : return "G";
|
|
|
4054 case 1 : return "B";
|
|
|
4055 case 2 : return "R";
|
|
|
4056 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4057 }
|
|
|
4058 case Format::eG8B8R83Plane422Unorm:
|
|
|
4059 switch ( component )
|
|
|
4060 {
|
|
|
4061 case 0 : return "G";
|
|
|
4062 case 1 : return "B";
|
|
|
4063 case 2 : return "R";
|
|
|
4064 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4065 }
|
|
|
4066 case Format::eG8B8R82Plane422Unorm:
|
|
|
4067 switch ( component )
|
|
|
4068 {
|
|
|
4069 case 0 : return "G";
|
|
|
4070 case 1 : return "B";
|
|
|
4071 case 2 : return "R";
|
|
|
4072 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4073 }
|
|
|
4074 case Format::eG8B8R83Plane444Unorm:
|
|
|
4075 switch ( component )
|
|
|
4076 {
|
|
|
4077 case 0 : return "G";
|
|
|
4078 case 1 : return "B";
|
|
|
4079 case 2 : return "R";
|
|
|
4080 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4081 }
|
|
|
4082 case Format::eR10X6UnormPack16:
|
|
|
4083 switch ( component )
|
|
|
4084 {
|
|
|
4085 case 0 : return "R";
|
|
|
4086 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4087 }
|
|
|
4088 case Format::eR10X6G10X6Unorm2Pack16:
|
|
|
4089 switch ( component )
|
|
|
4090 {
|
|
|
4091 case 0 : return "R";
|
|
|
4092 case 1 : return "G";
|
|
|
4093 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4094 }
|
|
|
4095 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
4096 switch ( component )
|
|
|
4097 {
|
|
|
4098 case 0 : return "R";
|
|
|
4099 case 1 : return "G";
|
|
|
4100 case 2 : return "B";
|
|
|
4101 case 3 : return "A";
|
|
|
4102 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4103 }
|
|
|
4104 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
4105 switch ( component )
|
|
|
4106 {
|
|
|
4107 case 0 : return "G";
|
|
|
4108 case 1 : return "B";
|
|
|
4109 case 2 : return "G";
|
|
|
4110 case 3 : return "R";
|
|
|
4111 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4112 }
|
|
|
4113 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
4114 switch ( component )
|
|
|
4115 {
|
|
|
4116 case 0 : return "B";
|
|
|
4117 case 1 : return "G";
|
|
|
4118 case 2 : return "R";
|
|
|
4119 case 3 : return "G";
|
|
|
4120 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4121 }
|
|
|
4122 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
4123 switch ( component )
|
|
|
4124 {
|
|
|
4125 case 0 : return "G";
|
|
|
4126 case 1 : return "B";
|
|
|
4127 case 2 : return "R";
|
|
|
4128 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4129 }
|
|
|
4130 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
4131 switch ( component )
|
|
|
4132 {
|
|
|
4133 case 0 : return "G";
|
|
|
4134 case 1 : return "B";
|
|
|
4135 case 2 : return "R";
|
|
|
4136 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4137 }
|
|
|
4138 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
4139 switch ( component )
|
|
|
4140 {
|
|
|
4141 case 0 : return "G";
|
|
|
4142 case 1 : return "B";
|
|
|
4143 case 2 : return "R";
|
|
|
4144 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4145 }
|
|
|
4146 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
4147 switch ( component )
|
|
|
4148 {
|
|
|
4149 case 0 : return "G";
|
|
|
4150 case 1 : return "B";
|
|
|
4151 case 2 : return "R";
|
|
|
4152 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4153 }
|
|
|
4154 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
4155 switch ( component )
|
|
|
4156 {
|
|
|
4157 case 0 : return "G";
|
|
|
4158 case 1 : return "B";
|
|
|
4159 case 2 : return "R";
|
|
|
4160 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4161 }
|
|
|
4162 case Format::eR12X4UnormPack16:
|
|
|
4163 switch ( component )
|
|
|
4164 {
|
|
|
4165 case 0 : return "R";
|
|
|
4166 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4167 }
|
|
|
4168 case Format::eR12X4G12X4Unorm2Pack16:
|
|
|
4169 switch ( component )
|
|
|
4170 {
|
|
|
4171 case 0 : return "R";
|
|
|
4172 case 1 : return "G";
|
|
|
4173 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4174 }
|
|
|
4175 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
4176 switch ( component )
|
|
|
4177 {
|
|
|
4178 case 0 : return "R";
|
|
|
4179 case 1 : return "G";
|
|
|
4180 case 2 : return "B";
|
|
|
4181 case 3 : return "A";
|
|
|
4182 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4183 }
|
|
|
4184 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
4185 switch ( component )
|
|
|
4186 {
|
|
|
4187 case 0 : return "G";
|
|
|
4188 case 1 : return "B";
|
|
|
4189 case 2 : return "G";
|
|
|
4190 case 3 : return "R";
|
|
|
4191 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4192 }
|
|
|
4193 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
4194 switch ( component )
|
|
|
4195 {
|
|
|
4196 case 0 : return "B";
|
|
|
4197 case 1 : return "G";
|
|
|
4198 case 2 : return "R";
|
|
|
4199 case 3 : return "G";
|
|
|
4200 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4201 }
|
|
|
4202 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
4203 switch ( component )
|
|
|
4204 {
|
|
|
4205 case 0 : return "G";
|
|
|
4206 case 1 : return "B";
|
|
|
4207 case 2 : return "R";
|
|
|
4208 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4209 }
|
|
|
4210 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
4211 switch ( component )
|
|
|
4212 {
|
|
|
4213 case 0 : return "G";
|
|
|
4214 case 1 : return "B";
|
|
|
4215 case 2 : return "R";
|
|
|
4216 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4217 }
|
|
|
4218 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
4219 switch ( component )
|
|
|
4220 {
|
|
|
4221 case 0 : return "G";
|
|
|
4222 case 1 : return "B";
|
|
|
4223 case 2 : return "R";
|
|
|
4224 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4225 }
|
|
|
4226 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
4227 switch ( component )
|
|
|
4228 {
|
|
|
4229 case 0 : return "G";
|
|
|
4230 case 1 : return "B";
|
|
|
4231 case 2 : return "R";
|
|
|
4232 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4233 }
|
|
|
4234 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
4235 switch ( component )
|
|
|
4236 {
|
|
|
4237 case 0 : return "G";
|
|
|
4238 case 1 : return "B";
|
|
|
4239 case 2 : return "R";
|
|
|
4240 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4241 }
|
|
|
4242 case Format::eG16B16G16R16422Unorm:
|
|
|
4243 switch ( component )
|
|
|
4244 {
|
|
|
4245 case 0 : return "G";
|
|
|
4246 case 1 : return "B";
|
|
|
4247 case 2 : return "G";
|
|
|
4248 case 3 : return "R";
|
|
|
4249 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4250 }
|
|
|
4251 case Format::eB16G16R16G16422Unorm:
|
|
|
4252 switch ( component )
|
|
|
4253 {
|
|
|
4254 case 0 : return "B";
|
|
|
4255 case 1 : return "G";
|
|
|
4256 case 2 : return "R";
|
|
|
4257 case 3 : return "G";
|
|
|
4258 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4259 }
|
|
|
4260 case Format::eG16B16R163Plane420Unorm:
|
|
|
4261 switch ( component )
|
|
|
4262 {
|
|
|
4263 case 0 : return "G";
|
|
|
4264 case 1 : return "B";
|
|
|
4265 case 2 : return "R";
|
|
|
4266 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4267 }
|
|
|
4268 case Format::eG16B16R162Plane420Unorm:
|
|
|
4269 switch ( component )
|
|
|
4270 {
|
|
|
4271 case 0 : return "G";
|
|
|
4272 case 1 : return "B";
|
|
|
4273 case 2 : return "R";
|
|
|
4274 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4275 }
|
|
|
4276 case Format::eG16B16R163Plane422Unorm:
|
|
|
4277 switch ( component )
|
|
|
4278 {
|
|
|
4279 case 0 : return "G";
|
|
|
4280 case 1 : return "B";
|
|
|
4281 case 2 : return "R";
|
|
|
4282 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4283 }
|
|
|
4284 case Format::eG16B16R162Plane422Unorm:
|
|
|
4285 switch ( component )
|
|
|
4286 {
|
|
|
4287 case 0 : return "G";
|
|
|
4288 case 1 : return "B";
|
|
|
4289 case 2 : return "R";
|
|
|
4290 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4291 }
|
|
|
4292 case Format::eG16B16R163Plane444Unorm:
|
|
|
4293 switch ( component )
|
|
|
4294 {
|
|
|
4295 case 0 : return "G";
|
|
|
4296 case 1 : return "B";
|
|
|
4297 case 2 : return "R";
|
|
|
4298 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4299 }
|
|
|
4300 case Format::eG8B8R82Plane444Unorm:
|
|
|
4301 switch ( component )
|
|
|
4302 {
|
|
|
4303 case 0 : return "G";
|
|
|
4304 case 1 : return "B";
|
|
|
4305 case 2 : return "R";
|
|
|
4306 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4307 }
|
|
|
4308 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
4309 switch ( component )
|
|
|
4310 {
|
|
|
4311 case 0 : return "G";
|
|
|
4312 case 1 : return "B";
|
|
|
4313 case 2 : return "R";
|
|
|
4314 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4315 }
|
|
|
4316 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
4317 switch ( component )
|
|
|
4318 {
|
|
|
4319 case 0 : return "G";
|
|
|
4320 case 1 : return "B";
|
|
|
4321 case 2 : return "R";
|
|
|
4322 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4323 }
|
|
|
4324 case Format::eG16B16R162Plane444Unorm:
|
|
|
4325 switch ( component )
|
|
|
4326 {
|
|
|
4327 case 0 : return "G";
|
|
|
4328 case 1 : return "B";
|
|
|
4329 case 2 : return "R";
|
|
|
4330 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4331 }
|
|
|
4332 case Format::eA4R4G4B4UnormPack16:
|
|
|
4333 switch ( component )
|
|
|
4334 {
|
|
|
4335 case 0 : return "A";
|
|
|
4336 case 1 : return "R";
|
|
|
4337 case 2 : return "G";
|
|
|
4338 case 3 : return "B";
|
|
|
4339 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4340 }
|
|
|
4341 case Format::eA4B4G4R4UnormPack16:
|
|
|
4342 switch ( component )
|
|
|
4343 {
|
|
|
4344 case 0 : return "A";
|
|
|
4345 case 1 : return "B";
|
|
|
4346 case 2 : return "G";
|
|
|
4347 case 3 : return "R";
|
|
|
4348 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4349 }
|
|
|
4350 case Format::eAstc4x4SfloatBlock:
|
|
|
4351 switch ( component )
|
|
|
4352 {
|
|
|
4353 case 0 : return "R";
|
|
|
4354 case 1 : return "G";
|
|
|
4355 case 2 : return "B";
|
|
|
4356 case 3 : return "A";
|
|
|
4357 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4358 }
|
|
|
4359 case Format::eAstc5x4SfloatBlock:
|
|
|
4360 switch ( component )
|
|
|
4361 {
|
|
|
4362 case 0 : return "R";
|
|
|
4363 case 1 : return "G";
|
|
|
4364 case 2 : return "B";
|
|
|
4365 case 3 : return "A";
|
|
|
4366 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4367 }
|
|
|
4368 case Format::eAstc5x5SfloatBlock:
|
|
|
4369 switch ( component )
|
|
|
4370 {
|
|
|
4371 case 0 : return "R";
|
|
|
4372 case 1 : return "G";
|
|
|
4373 case 2 : return "B";
|
|
|
4374 case 3 : return "A";
|
|
|
4375 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4376 }
|
|
|
4377 case Format::eAstc6x5SfloatBlock:
|
|
|
4378 switch ( component )
|
|
|
4379 {
|
|
|
4380 case 0 : return "R";
|
|
|
4381 case 1 : return "G";
|
|
|
4382 case 2 : return "B";
|
|
|
4383 case 3 : return "A";
|
|
|
4384 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4385 }
|
|
|
4386 case Format::eAstc6x6SfloatBlock:
|
|
|
4387 switch ( component )
|
|
|
4388 {
|
|
|
4389 case 0 : return "R";
|
|
|
4390 case 1 : return "G";
|
|
|
4391 case 2 : return "B";
|
|
|
4392 case 3 : return "A";
|
|
|
4393 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4394 }
|
|
|
4395 case Format::eAstc8x5SfloatBlock:
|
|
|
4396 switch ( component )
|
|
|
4397 {
|
|
|
4398 case 0 : return "R";
|
|
|
4399 case 1 : return "G";
|
|
|
4400 case 2 : return "B";
|
|
|
4401 case 3 : return "A";
|
|
|
4402 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4403 }
|
|
|
4404 case Format::eAstc8x6SfloatBlock:
|
|
|
4405 switch ( component )
|
|
|
4406 {
|
|
|
4407 case 0 : return "R";
|
|
|
4408 case 1 : return "G";
|
|
|
4409 case 2 : return "B";
|
|
|
4410 case 3 : return "A";
|
|
|
4411 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4412 }
|
|
|
4413 case Format::eAstc8x8SfloatBlock:
|
|
|
4414 switch ( component )
|
|
|
4415 {
|
|
|
4416 case 0 : return "R";
|
|
|
4417 case 1 : return "G";
|
|
|
4418 case 2 : return "B";
|
|
|
4419 case 3 : return "A";
|
|
|
4420 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4421 }
|
|
|
4422 case Format::eAstc10x5SfloatBlock:
|
|
|
4423 switch ( component )
|
|
|
4424 {
|
|
|
4425 case 0 : return "R";
|
|
|
4426 case 1 : return "G";
|
|
|
4427 case 2 : return "B";
|
|
|
4428 case 3 : return "A";
|
|
|
4429 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4430 }
|
|
|
4431 case Format::eAstc10x6SfloatBlock:
|
|
|
4432 switch ( component )
|
|
|
4433 {
|
|
|
4434 case 0 : return "R";
|
|
|
4435 case 1 : return "G";
|
|
|
4436 case 2 : return "B";
|
|
|
4437 case 3 : return "A";
|
|
|
4438 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4439 }
|
|
|
4440 case Format::eAstc10x8SfloatBlock:
|
|
|
4441 switch ( component )
|
|
|
4442 {
|
|
|
4443 case 0 : return "R";
|
|
|
4444 case 1 : return "G";
|
|
|
4445 case 2 : return "B";
|
|
|
4446 case 3 : return "A";
|
|
|
4447 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4448 }
|
|
|
4449 case Format::eAstc10x10SfloatBlock:
|
|
|
4450 switch ( component )
|
|
|
4451 {
|
|
|
4452 case 0 : return "R";
|
|
|
4453 case 1 : return "G";
|
|
|
4454 case 2 : return "B";
|
|
|
4455 case 3 : return "A";
|
|
|
4456 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4457 }
|
|
|
4458 case Format::eAstc12x10SfloatBlock:
|
|
|
4459 switch ( component )
|
|
|
4460 {
|
|
|
4461 case 0 : return "R";
|
|
|
4462 case 1 : return "G";
|
|
|
4463 case 2 : return "B";
|
|
|
4464 case 3 : return "A";
|
|
|
4465 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4466 }
|
|
|
4467 case Format::eAstc12x12SfloatBlock:
|
|
|
4468 switch ( component )
|
|
|
4469 {
|
|
|
4470 case 0 : return "R";
|
|
|
4471 case 1 : return "G";
|
|
|
4472 case 2 : return "B";
|
|
|
4473 case 3 : return "A";
|
|
|
4474 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4475 }
|
|
|
4476 case Format::eA1B5G5R5UnormPack16:
|
|
|
4477 switch ( component )
|
|
|
4478 {
|
|
|
4479 case 0 : return "A";
|
|
|
4480 case 1 : return "B";
|
|
|
4481 case 2 : return "G";
|
|
|
4482 case 3 : return "R";
|
|
|
4483 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4484 }
|
|
|
4485 case Format::eA8Unorm:
|
|
|
4486 switch ( component )
|
|
|
4487 {
|
|
|
4488 case 0 : return "A";
|
|
|
4489 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4490 }
|
|
|
4491 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
4492 switch ( component )
|
|
|
4493 {
|
|
|
4494 case 0 : return "R";
|
|
|
4495 case 1 : return "G";
|
|
|
4496 case 2 : return "B";
|
|
|
4497 case 3 : return "A";
|
|
|
4498 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4499 }
|
|
|
4500 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
4501 switch ( component )
|
|
|
4502 {
|
|
|
4503 case 0 : return "R";
|
|
|
4504 case 1 : return "G";
|
|
|
4505 case 2 : return "B";
|
|
|
4506 case 3 : return "A";
|
|
|
4507 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4508 }
|
|
|
4509 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
4510 switch ( component )
|
|
|
4511 {
|
|
|
4512 case 0 : return "R";
|
|
|
4513 case 1 : return "G";
|
|
|
4514 case 2 : return "B";
|
|
|
4515 case 3 : return "A";
|
|
|
4516 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4517 }
|
|
|
4518 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
4519 switch ( component )
|
|
|
4520 {
|
|
|
4521 case 0 : return "R";
|
|
|
4522 case 1 : return "G";
|
|
|
4523 case 2 : return "B";
|
|
|
4524 case 3 : return "A";
|
|
|
4525 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4526 }
|
|
|
4527 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
4528 switch ( component )
|
|
|
4529 {
|
|
|
4530 case 0 : return "R";
|
|
|
4531 case 1 : return "G";
|
|
|
4532 case 2 : return "B";
|
|
|
4533 case 3 : return "A";
|
|
|
4534 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4535 }
|
|
|
4536 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
4537 switch ( component )
|
|
|
4538 {
|
|
|
4539 case 0 : return "R";
|
|
|
4540 case 1 : return "G";
|
|
|
4541 case 2 : return "B";
|
|
|
4542 case 3 : return "A";
|
|
|
4543 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4544 }
|
|
|
4545 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
4546 switch ( component )
|
|
|
4547 {
|
|
|
4548 case 0 : return "R";
|
|
|
4549 case 1 : return "G";
|
|
|
4550 case 2 : return "B";
|
|
|
4551 case 3 : return "A";
|
|
|
4552 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4553 }
|
|
|
4554 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
4555 switch ( component )
|
|
|
4556 {
|
|
|
4557 case 0 : return "R";
|
|
|
4558 case 1 : return "G";
|
|
|
4559 case 2 : return "B";
|
|
|
4560 case 3 : return "A";
|
|
|
4561 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4562 }
|
|
|
4563 case Format::eR8BoolARM:
|
|
|
4564 switch ( component )
|
|
|
4565 {
|
|
|
4566 case 0 : return "R";
|
|
|
4567 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4568 }
|
|
|
4569 case Format::eR16G16Sfixed5NV:
|
|
|
4570 switch ( component )
|
|
|
4571 {
|
|
|
4572 case 0 : return "R";
|
|
|
4573 case 1 : return "G";
|
|
|
4574 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4575 }
|
|
|
4576 case Format::eR10X6UintPack16ARM:
|
|
|
4577 switch ( component )
|
|
|
4578 {
|
|
|
4579 case 0 : return "R";
|
|
|
4580 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4581 }
|
|
|
4582 case Format::eR10X6G10X6Uint2Pack16ARM:
|
|
|
4583 switch ( component )
|
|
|
4584 {
|
|
|
4585 case 0 : return "R";
|
|
|
4586 case 1 : return "G";
|
|
|
4587 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4588 }
|
|
|
4589 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
4590 switch ( component )
|
|
|
4591 {
|
|
|
4592 case 0 : return "R";
|
|
|
4593 case 1 : return "G";
|
|
|
4594 case 2 : return "B";
|
|
|
4595 case 3 : return "A";
|
|
|
4596 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4597 }
|
|
|
4598 case Format::eR12X4UintPack16ARM:
|
|
|
4599 switch ( component )
|
|
|
4600 {
|
|
|
4601 case 0 : return "R";
|
|
|
4602 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4603 }
|
|
|
4604 case Format::eR12X4G12X4Uint2Pack16ARM:
|
|
|
4605 switch ( component )
|
|
|
4606 {
|
|
|
4607 case 0 : return "R";
|
|
|
4608 case 1 : return "G";
|
|
|
4609 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4610 }
|
|
|
4611 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
4612 switch ( component )
|
|
|
4613 {
|
|
|
4614 case 0 : return "R";
|
|
|
4615 case 1 : return "G";
|
|
|
4616 case 2 : return "B";
|
|
|
4617 case 3 : return "A";
|
|
|
4618 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4619 }
|
|
|
4620 case Format::eR14X2UintPack16ARM:
|
|
|
4621 switch ( component )
|
|
|
4622 {
|
|
|
4623 case 0 : return "R";
|
|
|
4624 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4625 }
|
|
|
4626 case Format::eR14X2G14X2Uint2Pack16ARM:
|
|
|
4627 switch ( component )
|
|
|
4628 {
|
|
|
4629 case 0 : return "R";
|
|
|
4630 case 1 : return "G";
|
|
|
4631 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4632 }
|
|
|
4633 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
4634 switch ( component )
|
|
|
4635 {
|
|
|
4636 case 0 : return "R";
|
|
|
4637 case 1 : return "G";
|
|
|
4638 case 2 : return "B";
|
|
|
4639 case 3 : return "A";
|
|
|
4640 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4641 }
|
|
|
4642 case Format::eR14X2UnormPack16ARM:
|
|
|
4643 switch ( component )
|
|
|
4644 {
|
|
|
4645 case 0 : return "R";
|
|
|
4646 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4647 }
|
|
|
4648 case Format::eR14X2G14X2Unorm2Pack16ARM:
|
|
|
4649 switch ( component )
|
|
|
4650 {
|
|
|
4651 case 0 : return "R";
|
|
|
4652 case 1 : return "G";
|
|
|
4653 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4654 }
|
|
|
4655 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
4656 switch ( component )
|
|
|
4657 {
|
|
|
4658 case 0 : return "R";
|
|
|
4659 case 1 : return "G";
|
|
|
4660 case 2 : return "B";
|
|
|
4661 case 3 : return "A";
|
|
|
4662 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4663 }
|
|
|
4664 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
4665 switch ( component )
|
|
|
4666 {
|
|
|
4667 case 0 : return "G";
|
|
|
4668 case 1 : return "B";
|
|
|
4669 case 2 : return "R";
|
|
|
4670 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4671 }
|
|
|
4672 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
4673 switch ( component )
|
|
|
4674 {
|
|
|
4675 case 0 : return "G";
|
|
|
4676 case 1 : return "B";
|
|
|
4677 case 2 : return "R";
|
|
|
4678 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4679 }
|
|
|
4680
|
|
|
4681 default: return "";
|
|
|
4682 }
|
|
|
4683 }
|
|
|
4684
|
|
|
4685 // The numeric format of the component
|
|
|
4686 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 char const * componentNumericFormat( Format format, uint8_t component )
|
|
|
4687 {
|
|
|
4688 switch ( format )
|
|
|
4689 {
|
|
|
4690 case Format::eR4G4UnormPack8:
|
|
|
4691 switch ( component )
|
|
|
4692 {
|
|
|
4693 case 0 : return "UNORM";
|
|
|
4694 case 1 : return "UNORM";
|
|
|
4695 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4696 }
|
|
|
4697 case Format::eR4G4B4A4UnormPack16:
|
|
|
4698 switch ( component )
|
|
|
4699 {
|
|
|
4700 case 0 : return "UNORM";
|
|
|
4701 case 1 : return "UNORM";
|
|
|
4702 case 2 : return "UNORM";
|
|
|
4703 case 3 : return "UNORM";
|
|
|
4704 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4705 }
|
|
|
4706 case Format::eB4G4R4A4UnormPack16:
|
|
|
4707 switch ( component )
|
|
|
4708 {
|
|
|
4709 case 0 : return "UNORM";
|
|
|
4710 case 1 : return "UNORM";
|
|
|
4711 case 2 : return "UNORM";
|
|
|
4712 case 3 : return "UNORM";
|
|
|
4713 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4714 }
|
|
|
4715 case Format::eR5G6B5UnormPack16:
|
|
|
4716 switch ( component )
|
|
|
4717 {
|
|
|
4718 case 0 : return "UNORM";
|
|
|
4719 case 1 : return "UNORM";
|
|
|
4720 case 2 : return "UNORM";
|
|
|
4721 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4722 }
|
|
|
4723 case Format::eB5G6R5UnormPack16:
|
|
|
4724 switch ( component )
|
|
|
4725 {
|
|
|
4726 case 0 : return "UNORM";
|
|
|
4727 case 1 : return "UNORM";
|
|
|
4728 case 2 : return "UNORM";
|
|
|
4729 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4730 }
|
|
|
4731 case Format::eR5G5B5A1UnormPack16:
|
|
|
4732 switch ( component )
|
|
|
4733 {
|
|
|
4734 case 0 : return "UNORM";
|
|
|
4735 case 1 : return "UNORM";
|
|
|
4736 case 2 : return "UNORM";
|
|
|
4737 case 3 : return "UNORM";
|
|
|
4738 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4739 }
|
|
|
4740 case Format::eB5G5R5A1UnormPack16:
|
|
|
4741 switch ( component )
|
|
|
4742 {
|
|
|
4743 case 0 : return "UNORM";
|
|
|
4744 case 1 : return "UNORM";
|
|
|
4745 case 2 : return "UNORM";
|
|
|
4746 case 3 : return "UNORM";
|
|
|
4747 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4748 }
|
|
|
4749 case Format::eA1R5G5B5UnormPack16:
|
|
|
4750 switch ( component )
|
|
|
4751 {
|
|
|
4752 case 0 : return "UNORM";
|
|
|
4753 case 1 : return "UNORM";
|
|
|
4754 case 2 : return "UNORM";
|
|
|
4755 case 3 : return "UNORM";
|
|
|
4756 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4757 }
|
|
|
4758 case Format::eR8Unorm:
|
|
|
4759 switch ( component )
|
|
|
4760 {
|
|
|
4761 case 0 : return "UNORM";
|
|
|
4762 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4763 }
|
|
|
4764 case Format::eR8Snorm:
|
|
|
4765 switch ( component )
|
|
|
4766 {
|
|
|
4767 case 0 : return "SNORM";
|
|
|
4768 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4769 }
|
|
|
4770 case Format::eR8Uscaled:
|
|
|
4771 switch ( component )
|
|
|
4772 {
|
|
|
4773 case 0 : return "USCALED";
|
|
|
4774 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4775 }
|
|
|
4776 case Format::eR8Sscaled:
|
|
|
4777 switch ( component )
|
|
|
4778 {
|
|
|
4779 case 0 : return "SSCALED";
|
|
|
4780 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4781 }
|
|
|
4782 case Format::eR8Uint:
|
|
|
4783 switch ( component )
|
|
|
4784 {
|
|
|
4785 case 0 : return "UINT";
|
|
|
4786 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4787 }
|
|
|
4788 case Format::eR8Sint:
|
|
|
4789 switch ( component )
|
|
|
4790 {
|
|
|
4791 case 0 : return "SINT";
|
|
|
4792 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4793 }
|
|
|
4794 case Format::eR8Srgb:
|
|
|
4795 switch ( component )
|
|
|
4796 {
|
|
|
4797 case 0 : return "SRGB";
|
|
|
4798 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4799 }
|
|
|
4800 case Format::eR8G8Unorm:
|
|
|
4801 switch ( component )
|
|
|
4802 {
|
|
|
4803 case 0 : return "UNORM";
|
|
|
4804 case 1 : return "UNORM";
|
|
|
4805 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4806 }
|
|
|
4807 case Format::eR8G8Snorm:
|
|
|
4808 switch ( component )
|
|
|
4809 {
|
|
|
4810 case 0 : return "SNORM";
|
|
|
4811 case 1 : return "SNORM";
|
|
|
4812 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4813 }
|
|
|
4814 case Format::eR8G8Uscaled:
|
|
|
4815 switch ( component )
|
|
|
4816 {
|
|
|
4817 case 0 : return "USCALED";
|
|
|
4818 case 1 : return "USCALED";
|
|
|
4819 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4820 }
|
|
|
4821 case Format::eR8G8Sscaled:
|
|
|
4822 switch ( component )
|
|
|
4823 {
|
|
|
4824 case 0 : return "SSCALED";
|
|
|
4825 case 1 : return "SSCALED";
|
|
|
4826 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4827 }
|
|
|
4828 case Format::eR8G8Uint:
|
|
|
4829 switch ( component )
|
|
|
4830 {
|
|
|
4831 case 0 : return "UINT";
|
|
|
4832 case 1 : return "UINT";
|
|
|
4833 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4834 }
|
|
|
4835 case Format::eR8G8Sint:
|
|
|
4836 switch ( component )
|
|
|
4837 {
|
|
|
4838 case 0 : return "SINT";
|
|
|
4839 case 1 : return "SINT";
|
|
|
4840 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4841 }
|
|
|
4842 case Format::eR8G8Srgb:
|
|
|
4843 switch ( component )
|
|
|
4844 {
|
|
|
4845 case 0 : return "SRGB";
|
|
|
4846 case 1 : return "SRGB";
|
|
|
4847 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4848 }
|
|
|
4849 case Format::eR8G8B8Unorm:
|
|
|
4850 switch ( component )
|
|
|
4851 {
|
|
|
4852 case 0 : return "UNORM";
|
|
|
4853 case 1 : return "UNORM";
|
|
|
4854 case 2 : return "UNORM";
|
|
|
4855 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4856 }
|
|
|
4857 case Format::eR8G8B8Snorm:
|
|
|
4858 switch ( component )
|
|
|
4859 {
|
|
|
4860 case 0 : return "SNORM";
|
|
|
4861 case 1 : return "SNORM";
|
|
|
4862 case 2 : return "SNORM";
|
|
|
4863 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4864 }
|
|
|
4865 case Format::eR8G8B8Uscaled:
|
|
|
4866 switch ( component )
|
|
|
4867 {
|
|
|
4868 case 0 : return "USCALED";
|
|
|
4869 case 1 : return "USCALED";
|
|
|
4870 case 2 : return "USCALED";
|
|
|
4871 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4872 }
|
|
|
4873 case Format::eR8G8B8Sscaled:
|
|
|
4874 switch ( component )
|
|
|
4875 {
|
|
|
4876 case 0 : return "SSCALED";
|
|
|
4877 case 1 : return "SSCALED";
|
|
|
4878 case 2 : return "SSCALED";
|
|
|
4879 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4880 }
|
|
|
4881 case Format::eR8G8B8Uint:
|
|
|
4882 switch ( component )
|
|
|
4883 {
|
|
|
4884 case 0 : return "UINT";
|
|
|
4885 case 1 : return "UINT";
|
|
|
4886 case 2 : return "UINT";
|
|
|
4887 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4888 }
|
|
|
4889 case Format::eR8G8B8Sint:
|
|
|
4890 switch ( component )
|
|
|
4891 {
|
|
|
4892 case 0 : return "SINT";
|
|
|
4893 case 1 : return "SINT";
|
|
|
4894 case 2 : return "SINT";
|
|
|
4895 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4896 }
|
|
|
4897 case Format::eR8G8B8Srgb:
|
|
|
4898 switch ( component )
|
|
|
4899 {
|
|
|
4900 case 0 : return "SRGB";
|
|
|
4901 case 1 : return "SRGB";
|
|
|
4902 case 2 : return "SRGB";
|
|
|
4903 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4904 }
|
|
|
4905 case Format::eB8G8R8Unorm:
|
|
|
4906 switch ( component )
|
|
|
4907 {
|
|
|
4908 case 0 : return "UNORM";
|
|
|
4909 case 1 : return "UNORM";
|
|
|
4910 case 2 : return "UNORM";
|
|
|
4911 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4912 }
|
|
|
4913 case Format::eB8G8R8Snorm:
|
|
|
4914 switch ( component )
|
|
|
4915 {
|
|
|
4916 case 0 : return "SNORM";
|
|
|
4917 case 1 : return "SNORM";
|
|
|
4918 case 2 : return "SNORM";
|
|
|
4919 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4920 }
|
|
|
4921 case Format::eB8G8R8Uscaled:
|
|
|
4922 switch ( component )
|
|
|
4923 {
|
|
|
4924 case 0 : return "USCALED";
|
|
|
4925 case 1 : return "USCALED";
|
|
|
4926 case 2 : return "USCALED";
|
|
|
4927 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4928 }
|
|
|
4929 case Format::eB8G8R8Sscaled:
|
|
|
4930 switch ( component )
|
|
|
4931 {
|
|
|
4932 case 0 : return "SSCALED";
|
|
|
4933 case 1 : return "SSCALED";
|
|
|
4934 case 2 : return "SSCALED";
|
|
|
4935 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4936 }
|
|
|
4937 case Format::eB8G8R8Uint:
|
|
|
4938 switch ( component )
|
|
|
4939 {
|
|
|
4940 case 0 : return "UINT";
|
|
|
4941 case 1 : return "UINT";
|
|
|
4942 case 2 : return "UINT";
|
|
|
4943 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4944 }
|
|
|
4945 case Format::eB8G8R8Sint:
|
|
|
4946 switch ( component )
|
|
|
4947 {
|
|
|
4948 case 0 : return "SINT";
|
|
|
4949 case 1 : return "SINT";
|
|
|
4950 case 2 : return "SINT";
|
|
|
4951 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4952 }
|
|
|
4953 case Format::eB8G8R8Srgb:
|
|
|
4954 switch ( component )
|
|
|
4955 {
|
|
|
4956 case 0 : return "SRGB";
|
|
|
4957 case 1 : return "SRGB";
|
|
|
4958 case 2 : return "SRGB";
|
|
|
4959 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4960 }
|
|
|
4961 case Format::eR8G8B8A8Unorm:
|
|
|
4962 switch ( component )
|
|
|
4963 {
|
|
|
4964 case 0 : return "UNORM";
|
|
|
4965 case 1 : return "UNORM";
|
|
|
4966 case 2 : return "UNORM";
|
|
|
4967 case 3 : return "UNORM";
|
|
|
4968 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4969 }
|
|
|
4970 case Format::eR8G8B8A8Snorm:
|
|
|
4971 switch ( component )
|
|
|
4972 {
|
|
|
4973 case 0 : return "SNORM";
|
|
|
4974 case 1 : return "SNORM";
|
|
|
4975 case 2 : return "SNORM";
|
|
|
4976 case 3 : return "SNORM";
|
|
|
4977 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4978 }
|
|
|
4979 case Format::eR8G8B8A8Uscaled:
|
|
|
4980 switch ( component )
|
|
|
4981 {
|
|
|
4982 case 0 : return "USCALED";
|
|
|
4983 case 1 : return "USCALED";
|
|
|
4984 case 2 : return "USCALED";
|
|
|
4985 case 3 : return "USCALED";
|
|
|
4986 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4987 }
|
|
|
4988 case Format::eR8G8B8A8Sscaled:
|
|
|
4989 switch ( component )
|
|
|
4990 {
|
|
|
4991 case 0 : return "SSCALED";
|
|
|
4992 case 1 : return "SSCALED";
|
|
|
4993 case 2 : return "SSCALED";
|
|
|
4994 case 3 : return "SSCALED";
|
|
|
4995 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
4996 }
|
|
|
4997 case Format::eR8G8B8A8Uint:
|
|
|
4998 switch ( component )
|
|
|
4999 {
|
|
|
5000 case 0 : return "UINT";
|
|
|
5001 case 1 : return "UINT";
|
|
|
5002 case 2 : return "UINT";
|
|
|
5003 case 3 : return "UINT";
|
|
|
5004 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5005 }
|
|
|
5006 case Format::eR8G8B8A8Sint:
|
|
|
5007 switch ( component )
|
|
|
5008 {
|
|
|
5009 case 0 : return "SINT";
|
|
|
5010 case 1 : return "SINT";
|
|
|
5011 case 2 : return "SINT";
|
|
|
5012 case 3 : return "SINT";
|
|
|
5013 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5014 }
|
|
|
5015 case Format::eR8G8B8A8Srgb:
|
|
|
5016 switch ( component )
|
|
|
5017 {
|
|
|
5018 case 0 : return "SRGB";
|
|
|
5019 case 1 : return "SRGB";
|
|
|
5020 case 2 : return "SRGB";
|
|
|
5021 case 3 : return "UNORM";
|
|
|
5022 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5023 }
|
|
|
5024 case Format::eB8G8R8A8Unorm:
|
|
|
5025 switch ( component )
|
|
|
5026 {
|
|
|
5027 case 0 : return "UNORM";
|
|
|
5028 case 1 : return "UNORM";
|
|
|
5029 case 2 : return "UNORM";
|
|
|
5030 case 3 : return "UNORM";
|
|
|
5031 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5032 }
|
|
|
5033 case Format::eB8G8R8A8Snorm:
|
|
|
5034 switch ( component )
|
|
|
5035 {
|
|
|
5036 case 0 : return "SNORM";
|
|
|
5037 case 1 : return "SNORM";
|
|
|
5038 case 2 : return "SNORM";
|
|
|
5039 case 3 : return "SNORM";
|
|
|
5040 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5041 }
|
|
|
5042 case Format::eB8G8R8A8Uscaled:
|
|
|
5043 switch ( component )
|
|
|
5044 {
|
|
|
5045 case 0 : return "USCALED";
|
|
|
5046 case 1 : return "USCALED";
|
|
|
5047 case 2 : return "USCALED";
|
|
|
5048 case 3 : return "USCALED";
|
|
|
5049 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5050 }
|
|
|
5051 case Format::eB8G8R8A8Sscaled:
|
|
|
5052 switch ( component )
|
|
|
5053 {
|
|
|
5054 case 0 : return "SSCALED";
|
|
|
5055 case 1 : return "SSCALED";
|
|
|
5056 case 2 : return "SSCALED";
|
|
|
5057 case 3 : return "SSCALED";
|
|
|
5058 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5059 }
|
|
|
5060 case Format::eB8G8R8A8Uint:
|
|
|
5061 switch ( component )
|
|
|
5062 {
|
|
|
5063 case 0 : return "UINT";
|
|
|
5064 case 1 : return "UINT";
|
|
|
5065 case 2 : return "UINT";
|
|
|
5066 case 3 : return "UINT";
|
|
|
5067 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5068 }
|
|
|
5069 case Format::eB8G8R8A8Sint:
|
|
|
5070 switch ( component )
|
|
|
5071 {
|
|
|
5072 case 0 : return "SINT";
|
|
|
5073 case 1 : return "SINT";
|
|
|
5074 case 2 : return "SINT";
|
|
|
5075 case 3 : return "SINT";
|
|
|
5076 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5077 }
|
|
|
5078 case Format::eB8G8R8A8Srgb:
|
|
|
5079 switch ( component )
|
|
|
5080 {
|
|
|
5081 case 0 : return "SRGB";
|
|
|
5082 case 1 : return "SRGB";
|
|
|
5083 case 2 : return "SRGB";
|
|
|
5084 case 3 : return "UNORM";
|
|
|
5085 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5086 }
|
|
|
5087 case Format::eA8B8G8R8UnormPack32:
|
|
|
5088 switch ( component )
|
|
|
5089 {
|
|
|
5090 case 0 : return "UNORM";
|
|
|
5091 case 1 : return "UNORM";
|
|
|
5092 case 2 : return "UNORM";
|
|
|
5093 case 3 : return "UNORM";
|
|
|
5094 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5095 }
|
|
|
5096 case Format::eA8B8G8R8SnormPack32:
|
|
|
5097 switch ( component )
|
|
|
5098 {
|
|
|
5099 case 0 : return "SNORM";
|
|
|
5100 case 1 : return "SNORM";
|
|
|
5101 case 2 : return "SNORM";
|
|
|
5102 case 3 : return "SNORM";
|
|
|
5103 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5104 }
|
|
|
5105 case Format::eA8B8G8R8UscaledPack32:
|
|
|
5106 switch ( component )
|
|
|
5107 {
|
|
|
5108 case 0 : return "USCALED";
|
|
|
5109 case 1 : return "USCALED";
|
|
|
5110 case 2 : return "USCALED";
|
|
|
5111 case 3 : return "USCALED";
|
|
|
5112 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5113 }
|
|
|
5114 case Format::eA8B8G8R8SscaledPack32:
|
|
|
5115 switch ( component )
|
|
|
5116 {
|
|
|
5117 case 0 : return "SSCALED";
|
|
|
5118 case 1 : return "SSCALED";
|
|
|
5119 case 2 : return "SSCALED";
|
|
|
5120 case 3 : return "SSCALED";
|
|
|
5121 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5122 }
|
|
|
5123 case Format::eA8B8G8R8UintPack32:
|
|
|
5124 switch ( component )
|
|
|
5125 {
|
|
|
5126 case 0 : return "UINT";
|
|
|
5127 case 1 : return "UINT";
|
|
|
5128 case 2 : return "UINT";
|
|
|
5129 case 3 : return "UINT";
|
|
|
5130 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5131 }
|
|
|
5132 case Format::eA8B8G8R8SintPack32:
|
|
|
5133 switch ( component )
|
|
|
5134 {
|
|
|
5135 case 0 : return "SINT";
|
|
|
5136 case 1 : return "SINT";
|
|
|
5137 case 2 : return "SINT";
|
|
|
5138 case 3 : return "SINT";
|
|
|
5139 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5140 }
|
|
|
5141 case Format::eA8B8G8R8SrgbPack32:
|
|
|
5142 switch ( component )
|
|
|
5143 {
|
|
|
5144 case 0 : return "UNORM";
|
|
|
5145 case 1 : return "SRGB";
|
|
|
5146 case 2 : return "SRGB";
|
|
|
5147 case 3 : return "SRGB";
|
|
|
5148 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5149 }
|
|
|
5150 case Format::eA2R10G10B10UnormPack32:
|
|
|
5151 switch ( component )
|
|
|
5152 {
|
|
|
5153 case 0 : return "UNORM";
|
|
|
5154 case 1 : return "UNORM";
|
|
|
5155 case 2 : return "UNORM";
|
|
|
5156 case 3 : return "UNORM";
|
|
|
5157 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5158 }
|
|
|
5159 case Format::eA2R10G10B10SnormPack32:
|
|
|
5160 switch ( component )
|
|
|
5161 {
|
|
|
5162 case 0 : return "SNORM";
|
|
|
5163 case 1 : return "SNORM";
|
|
|
5164 case 2 : return "SNORM";
|
|
|
5165 case 3 : return "SNORM";
|
|
|
5166 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5167 }
|
|
|
5168 case Format::eA2R10G10B10UscaledPack32:
|
|
|
5169 switch ( component )
|
|
|
5170 {
|
|
|
5171 case 0 : return "USCALED";
|
|
|
5172 case 1 : return "USCALED";
|
|
|
5173 case 2 : return "USCALED";
|
|
|
5174 case 3 : return "USCALED";
|
|
|
5175 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5176 }
|
|
|
5177 case Format::eA2R10G10B10SscaledPack32:
|
|
|
5178 switch ( component )
|
|
|
5179 {
|
|
|
5180 case 0 : return "SSCALED";
|
|
|
5181 case 1 : return "SSCALED";
|
|
|
5182 case 2 : return "SSCALED";
|
|
|
5183 case 3 : return "SSCALED";
|
|
|
5184 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5185 }
|
|
|
5186 case Format::eA2R10G10B10UintPack32:
|
|
|
5187 switch ( component )
|
|
|
5188 {
|
|
|
5189 case 0 : return "UINT";
|
|
|
5190 case 1 : return "UINT";
|
|
|
5191 case 2 : return "UINT";
|
|
|
5192 case 3 : return "UINT";
|
|
|
5193 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5194 }
|
|
|
5195 case Format::eA2R10G10B10SintPack32:
|
|
|
5196 switch ( component )
|
|
|
5197 {
|
|
|
5198 case 0 : return "SINT";
|
|
|
5199 case 1 : return "SINT";
|
|
|
5200 case 2 : return "SINT";
|
|
|
5201 case 3 : return "SINT";
|
|
|
5202 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5203 }
|
|
|
5204 case Format::eA2B10G10R10UnormPack32:
|
|
|
5205 switch ( component )
|
|
|
5206 {
|
|
|
5207 case 0 : return "UNORM";
|
|
|
5208 case 1 : return "UNORM";
|
|
|
5209 case 2 : return "UNORM";
|
|
|
5210 case 3 : return "UNORM";
|
|
|
5211 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5212 }
|
|
|
5213 case Format::eA2B10G10R10SnormPack32:
|
|
|
5214 switch ( component )
|
|
|
5215 {
|
|
|
5216 case 0 : return "SNORM";
|
|
|
5217 case 1 : return "SNORM";
|
|
|
5218 case 2 : return "SNORM";
|
|
|
5219 case 3 : return "SNORM";
|
|
|
5220 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5221 }
|
|
|
5222 case Format::eA2B10G10R10UscaledPack32:
|
|
|
5223 switch ( component )
|
|
|
5224 {
|
|
|
5225 case 0 : return "USCALED";
|
|
|
5226 case 1 : return "USCALED";
|
|
|
5227 case 2 : return "USCALED";
|
|
|
5228 case 3 : return "USCALED";
|
|
|
5229 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5230 }
|
|
|
5231 case Format::eA2B10G10R10SscaledPack32:
|
|
|
5232 switch ( component )
|
|
|
5233 {
|
|
|
5234 case 0 : return "SSCALED";
|
|
|
5235 case 1 : return "SSCALED";
|
|
|
5236 case 2 : return "SSCALED";
|
|
|
5237 case 3 : return "SSCALED";
|
|
|
5238 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5239 }
|
|
|
5240 case Format::eA2B10G10R10UintPack32:
|
|
|
5241 switch ( component )
|
|
|
5242 {
|
|
|
5243 case 0 : return "UINT";
|
|
|
5244 case 1 : return "UINT";
|
|
|
5245 case 2 : return "UINT";
|
|
|
5246 case 3 : return "UINT";
|
|
|
5247 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5248 }
|
|
|
5249 case Format::eA2B10G10R10SintPack32:
|
|
|
5250 switch ( component )
|
|
|
5251 {
|
|
|
5252 case 0 : return "SINT";
|
|
|
5253 case 1 : return "SINT";
|
|
|
5254 case 2 : return "SINT";
|
|
|
5255 case 3 : return "SINT";
|
|
|
5256 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5257 }
|
|
|
5258 case Format::eR16Unorm:
|
|
|
5259 switch ( component )
|
|
|
5260 {
|
|
|
5261 case 0 : return "UNORM";
|
|
|
5262 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5263 }
|
|
|
5264 case Format::eR16Snorm:
|
|
|
5265 switch ( component )
|
|
|
5266 {
|
|
|
5267 case 0 : return "SNORM";
|
|
|
5268 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5269 }
|
|
|
5270 case Format::eR16Uscaled:
|
|
|
5271 switch ( component )
|
|
|
5272 {
|
|
|
5273 case 0 : return "USCALED";
|
|
|
5274 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5275 }
|
|
|
5276 case Format::eR16Sscaled:
|
|
|
5277 switch ( component )
|
|
|
5278 {
|
|
|
5279 case 0 : return "SSCALED";
|
|
|
5280 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5281 }
|
|
|
5282 case Format::eR16Uint:
|
|
|
5283 switch ( component )
|
|
|
5284 {
|
|
|
5285 case 0 : return "UINT";
|
|
|
5286 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5287 }
|
|
|
5288 case Format::eR16Sint:
|
|
|
5289 switch ( component )
|
|
|
5290 {
|
|
|
5291 case 0 : return "SINT";
|
|
|
5292 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5293 }
|
|
|
5294 case Format::eR16Sfloat:
|
|
|
5295 switch ( component )
|
|
|
5296 {
|
|
|
5297 case 0 : return "SFLOAT";
|
|
|
5298 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5299 }
|
|
|
5300 case Format::eR16G16Unorm:
|
|
|
5301 switch ( component )
|
|
|
5302 {
|
|
|
5303 case 0 : return "UNORM";
|
|
|
5304 case 1 : return "UNORM";
|
|
|
5305 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5306 }
|
|
|
5307 case Format::eR16G16Snorm:
|
|
|
5308 switch ( component )
|
|
|
5309 {
|
|
|
5310 case 0 : return "SNORM";
|
|
|
5311 case 1 : return "SNORM";
|
|
|
5312 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5313 }
|
|
|
5314 case Format::eR16G16Uscaled:
|
|
|
5315 switch ( component )
|
|
|
5316 {
|
|
|
5317 case 0 : return "USCALED";
|
|
|
5318 case 1 : return "USCALED";
|
|
|
5319 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5320 }
|
|
|
5321 case Format::eR16G16Sscaled:
|
|
|
5322 switch ( component )
|
|
|
5323 {
|
|
|
5324 case 0 : return "SSCALED";
|
|
|
5325 case 1 : return "SSCALED";
|
|
|
5326 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5327 }
|
|
|
5328 case Format::eR16G16Uint:
|
|
|
5329 switch ( component )
|
|
|
5330 {
|
|
|
5331 case 0 : return "UINT";
|
|
|
5332 case 1 : return "UINT";
|
|
|
5333 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5334 }
|
|
|
5335 case Format::eR16G16Sint:
|
|
|
5336 switch ( component )
|
|
|
5337 {
|
|
|
5338 case 0 : return "SINT";
|
|
|
5339 case 1 : return "SINT";
|
|
|
5340 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5341 }
|
|
|
5342 case Format::eR16G16Sfloat:
|
|
|
5343 switch ( component )
|
|
|
5344 {
|
|
|
5345 case 0 : return "SFLOAT";
|
|
|
5346 case 1 : return "SFLOAT";
|
|
|
5347 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5348 }
|
|
|
5349 case Format::eR16G16B16Unorm:
|
|
|
5350 switch ( component )
|
|
|
5351 {
|
|
|
5352 case 0 : return "UNORM";
|
|
|
5353 case 1 : return "UNORM";
|
|
|
5354 case 2 : return "UNORM";
|
|
|
5355 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5356 }
|
|
|
5357 case Format::eR16G16B16Snorm:
|
|
|
5358 switch ( component )
|
|
|
5359 {
|
|
|
5360 case 0 : return "SNORM";
|
|
|
5361 case 1 : return "SNORM";
|
|
|
5362 case 2 : return "SNORM";
|
|
|
5363 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5364 }
|
|
|
5365 case Format::eR16G16B16Uscaled:
|
|
|
5366 switch ( component )
|
|
|
5367 {
|
|
|
5368 case 0 : return "USCALED";
|
|
|
5369 case 1 : return "USCALED";
|
|
|
5370 case 2 : return "USCALED";
|
|
|
5371 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5372 }
|
|
|
5373 case Format::eR16G16B16Sscaled:
|
|
|
5374 switch ( component )
|
|
|
5375 {
|
|
|
5376 case 0 : return "SSCALED";
|
|
|
5377 case 1 : return "SSCALED";
|
|
|
5378 case 2 : return "SSCALED";
|
|
|
5379 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5380 }
|
|
|
5381 case Format::eR16G16B16Uint:
|
|
|
5382 switch ( component )
|
|
|
5383 {
|
|
|
5384 case 0 : return "UINT";
|
|
|
5385 case 1 : return "UINT";
|
|
|
5386 case 2 : return "UINT";
|
|
|
5387 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5388 }
|
|
|
5389 case Format::eR16G16B16Sint:
|
|
|
5390 switch ( component )
|
|
|
5391 {
|
|
|
5392 case 0 : return "SINT";
|
|
|
5393 case 1 : return "SINT";
|
|
|
5394 case 2 : return "SINT";
|
|
|
5395 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5396 }
|
|
|
5397 case Format::eR16G16B16Sfloat:
|
|
|
5398 switch ( component )
|
|
|
5399 {
|
|
|
5400 case 0 : return "SFLOAT";
|
|
|
5401 case 1 : return "SFLOAT";
|
|
|
5402 case 2 : return "SFLOAT";
|
|
|
5403 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5404 }
|
|
|
5405 case Format::eR16G16B16A16Unorm:
|
|
|
5406 switch ( component )
|
|
|
5407 {
|
|
|
5408 case 0 : return "UNORM";
|
|
|
5409 case 1 : return "UNORM";
|
|
|
5410 case 2 : return "UNORM";
|
|
|
5411 case 3 : return "UNORM";
|
|
|
5412 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5413 }
|
|
|
5414 case Format::eR16G16B16A16Snorm:
|
|
|
5415 switch ( component )
|
|
|
5416 {
|
|
|
5417 case 0 : return "SNORM";
|
|
|
5418 case 1 : return "SNORM";
|
|
|
5419 case 2 : return "SNORM";
|
|
|
5420 case 3 : return "SNORM";
|
|
|
5421 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5422 }
|
|
|
5423 case Format::eR16G16B16A16Uscaled:
|
|
|
5424 switch ( component )
|
|
|
5425 {
|
|
|
5426 case 0 : return "USCALED";
|
|
|
5427 case 1 : return "USCALED";
|
|
|
5428 case 2 : return "USCALED";
|
|
|
5429 case 3 : return "USCALED";
|
|
|
5430 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5431 }
|
|
|
5432 case Format::eR16G16B16A16Sscaled:
|
|
|
5433 switch ( component )
|
|
|
5434 {
|
|
|
5435 case 0 : return "SSCALED";
|
|
|
5436 case 1 : return "SSCALED";
|
|
|
5437 case 2 : return "SSCALED";
|
|
|
5438 case 3 : return "SSCALED";
|
|
|
5439 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5440 }
|
|
|
5441 case Format::eR16G16B16A16Uint:
|
|
|
5442 switch ( component )
|
|
|
5443 {
|
|
|
5444 case 0 : return "UINT";
|
|
|
5445 case 1 : return "UINT";
|
|
|
5446 case 2 : return "UINT";
|
|
|
5447 case 3 : return "UINT";
|
|
|
5448 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5449 }
|
|
|
5450 case Format::eR16G16B16A16Sint:
|
|
|
5451 switch ( component )
|
|
|
5452 {
|
|
|
5453 case 0 : return "SINT";
|
|
|
5454 case 1 : return "SINT";
|
|
|
5455 case 2 : return "SINT";
|
|
|
5456 case 3 : return "SINT";
|
|
|
5457 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5458 }
|
|
|
5459 case Format::eR16G16B16A16Sfloat:
|
|
|
5460 switch ( component )
|
|
|
5461 {
|
|
|
5462 case 0 : return "SFLOAT";
|
|
|
5463 case 1 : return "SFLOAT";
|
|
|
5464 case 2 : return "SFLOAT";
|
|
|
5465 case 3 : return "SFLOAT";
|
|
|
5466 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5467 }
|
|
|
5468 case Format::eR32Uint:
|
|
|
5469 switch ( component )
|
|
|
5470 {
|
|
|
5471 case 0 : return "UINT";
|
|
|
5472 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5473 }
|
|
|
5474 case Format::eR32Sint:
|
|
|
5475 switch ( component )
|
|
|
5476 {
|
|
|
5477 case 0 : return "SINT";
|
|
|
5478 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5479 }
|
|
|
5480 case Format::eR32Sfloat:
|
|
|
5481 switch ( component )
|
|
|
5482 {
|
|
|
5483 case 0 : return "SFLOAT";
|
|
|
5484 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5485 }
|
|
|
5486 case Format::eR32G32Uint:
|
|
|
5487 switch ( component )
|
|
|
5488 {
|
|
|
5489 case 0 : return "UINT";
|
|
|
5490 case 1 : return "UINT";
|
|
|
5491 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5492 }
|
|
|
5493 case Format::eR32G32Sint:
|
|
|
5494 switch ( component )
|
|
|
5495 {
|
|
|
5496 case 0 : return "SINT";
|
|
|
5497 case 1 : return "SINT";
|
|
|
5498 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5499 }
|
|
|
5500 case Format::eR32G32Sfloat:
|
|
|
5501 switch ( component )
|
|
|
5502 {
|
|
|
5503 case 0 : return "SFLOAT";
|
|
|
5504 case 1 : return "SFLOAT";
|
|
|
5505 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5506 }
|
|
|
5507 case Format::eR32G32B32Uint:
|
|
|
5508 switch ( component )
|
|
|
5509 {
|
|
|
5510 case 0 : return "UINT";
|
|
|
5511 case 1 : return "UINT";
|
|
|
5512 case 2 : return "UINT";
|
|
|
5513 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5514 }
|
|
|
5515 case Format::eR32G32B32Sint:
|
|
|
5516 switch ( component )
|
|
|
5517 {
|
|
|
5518 case 0 : return "SINT";
|
|
|
5519 case 1 : return "SINT";
|
|
|
5520 case 2 : return "SINT";
|
|
|
5521 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5522 }
|
|
|
5523 case Format::eR32G32B32Sfloat:
|
|
|
5524 switch ( component )
|
|
|
5525 {
|
|
|
5526 case 0 : return "SFLOAT";
|
|
|
5527 case 1 : return "SFLOAT";
|
|
|
5528 case 2 : return "SFLOAT";
|
|
|
5529 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5530 }
|
|
|
5531 case Format::eR32G32B32A32Uint:
|
|
|
5532 switch ( component )
|
|
|
5533 {
|
|
|
5534 case 0 : return "UINT";
|
|
|
5535 case 1 : return "UINT";
|
|
|
5536 case 2 : return "UINT";
|
|
|
5537 case 3 : return "UINT";
|
|
|
5538 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5539 }
|
|
|
5540 case Format::eR32G32B32A32Sint:
|
|
|
5541 switch ( component )
|
|
|
5542 {
|
|
|
5543 case 0 : return "SINT";
|
|
|
5544 case 1 : return "SINT";
|
|
|
5545 case 2 : return "SINT";
|
|
|
5546 case 3 : return "SINT";
|
|
|
5547 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5548 }
|
|
|
5549 case Format::eR32G32B32A32Sfloat:
|
|
|
5550 switch ( component )
|
|
|
5551 {
|
|
|
5552 case 0 : return "SFLOAT";
|
|
|
5553 case 1 : return "SFLOAT";
|
|
|
5554 case 2 : return "SFLOAT";
|
|
|
5555 case 3 : return "SFLOAT";
|
|
|
5556 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5557 }
|
|
|
5558 case Format::eR64Uint:
|
|
|
5559 switch ( component )
|
|
|
5560 {
|
|
|
5561 case 0 : return "UINT";
|
|
|
5562 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5563 }
|
|
|
5564 case Format::eR64Sint:
|
|
|
5565 switch ( component )
|
|
|
5566 {
|
|
|
5567 case 0 : return "SINT";
|
|
|
5568 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5569 }
|
|
|
5570 case Format::eR64Sfloat:
|
|
|
5571 switch ( component )
|
|
|
5572 {
|
|
|
5573 case 0 : return "SFLOAT";
|
|
|
5574 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5575 }
|
|
|
5576 case Format::eR64G64Uint:
|
|
|
5577 switch ( component )
|
|
|
5578 {
|
|
|
5579 case 0 : return "UINT";
|
|
|
5580 case 1 : return "UINT";
|
|
|
5581 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5582 }
|
|
|
5583 case Format::eR64G64Sint:
|
|
|
5584 switch ( component )
|
|
|
5585 {
|
|
|
5586 case 0 : return "SINT";
|
|
|
5587 case 1 : return "SINT";
|
|
|
5588 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5589 }
|
|
|
5590 case Format::eR64G64Sfloat:
|
|
|
5591 switch ( component )
|
|
|
5592 {
|
|
|
5593 case 0 : return "SFLOAT";
|
|
|
5594 case 1 : return "SFLOAT";
|
|
|
5595 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5596 }
|
|
|
5597 case Format::eR64G64B64Uint:
|
|
|
5598 switch ( component )
|
|
|
5599 {
|
|
|
5600 case 0 : return "UINT";
|
|
|
5601 case 1 : return "UINT";
|
|
|
5602 case 2 : return "UINT";
|
|
|
5603 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5604 }
|
|
|
5605 case Format::eR64G64B64Sint:
|
|
|
5606 switch ( component )
|
|
|
5607 {
|
|
|
5608 case 0 : return "SINT";
|
|
|
5609 case 1 : return "SINT";
|
|
|
5610 case 2 : return "SINT";
|
|
|
5611 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5612 }
|
|
|
5613 case Format::eR64G64B64Sfloat:
|
|
|
5614 switch ( component )
|
|
|
5615 {
|
|
|
5616 case 0 : return "SFLOAT";
|
|
|
5617 case 1 : return "SFLOAT";
|
|
|
5618 case 2 : return "SFLOAT";
|
|
|
5619 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5620 }
|
|
|
5621 case Format::eR64G64B64A64Uint:
|
|
|
5622 switch ( component )
|
|
|
5623 {
|
|
|
5624 case 0 : return "UINT";
|
|
|
5625 case 1 : return "UINT";
|
|
|
5626 case 2 : return "UINT";
|
|
|
5627 case 3 : return "UINT";
|
|
|
5628 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5629 }
|
|
|
5630 case Format::eR64G64B64A64Sint:
|
|
|
5631 switch ( component )
|
|
|
5632 {
|
|
|
5633 case 0 : return "SINT";
|
|
|
5634 case 1 : return "SINT";
|
|
|
5635 case 2 : return "SINT";
|
|
|
5636 case 3 : return "SINT";
|
|
|
5637 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5638 }
|
|
|
5639 case Format::eR64G64B64A64Sfloat:
|
|
|
5640 switch ( component )
|
|
|
5641 {
|
|
|
5642 case 0 : return "SFLOAT";
|
|
|
5643 case 1 : return "SFLOAT";
|
|
|
5644 case 2 : return "SFLOAT";
|
|
|
5645 case 3 : return "SFLOAT";
|
|
|
5646 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5647 }
|
|
|
5648 case Format::eB10G11R11UfloatPack32:
|
|
|
5649 switch ( component )
|
|
|
5650 {
|
|
|
5651 case 0 : return "UFLOAT";
|
|
|
5652 case 1 : return "UFLOAT";
|
|
|
5653 case 2 : return "UFLOAT";
|
|
|
5654 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5655 }
|
|
|
5656 case Format::eE5B9G9R9UfloatPack32:
|
|
|
5657 switch ( component )
|
|
|
5658 {
|
|
|
5659 case 0 : return "UFLOAT";
|
|
|
5660 case 1 : return "UFLOAT";
|
|
|
5661 case 2 : return "UFLOAT";
|
|
|
5662 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5663 }
|
|
|
5664 case Format::eD16Unorm:
|
|
|
5665 switch ( component )
|
|
|
5666 {
|
|
|
5667 case 0 : return "UNORM";
|
|
|
5668 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5669 }
|
|
|
5670 case Format::eX8D24UnormPack32:
|
|
|
5671 switch ( component )
|
|
|
5672 {
|
|
|
5673 case 0 : return "UNORM";
|
|
|
5674 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5675 }
|
|
|
5676 case Format::eD32Sfloat:
|
|
|
5677 switch ( component )
|
|
|
5678 {
|
|
|
5679 case 0 : return "SFLOAT";
|
|
|
5680 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5681 }
|
|
|
5682 case Format::eS8Uint:
|
|
|
5683 switch ( component )
|
|
|
5684 {
|
|
|
5685 case 0 : return "UINT";
|
|
|
5686 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5687 }
|
|
|
5688 case Format::eD16UnormS8Uint:
|
|
|
5689 switch ( component )
|
|
|
5690 {
|
|
|
5691 case 0 : return "UNORM";
|
|
|
5692 case 1 : return "UINT";
|
|
|
5693 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5694 }
|
|
|
5695 case Format::eD24UnormS8Uint:
|
|
|
5696 switch ( component )
|
|
|
5697 {
|
|
|
5698 case 0 : return "UNORM";
|
|
|
5699 case 1 : return "UINT";
|
|
|
5700 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5701 }
|
|
|
5702 case Format::eD32SfloatS8Uint:
|
|
|
5703 switch ( component )
|
|
|
5704 {
|
|
|
5705 case 0 : return "SFLOAT";
|
|
|
5706 case 1 : return "UINT";
|
|
|
5707 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5708 }
|
|
|
5709 case Format::eBc1RgbUnormBlock:
|
|
|
5710 switch ( component )
|
|
|
5711 {
|
|
|
5712 case 0 : return "UNORM";
|
|
|
5713 case 1 : return "UNORM";
|
|
|
5714 case 2 : return "UNORM";
|
|
|
5715 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5716 }
|
|
|
5717 case Format::eBc1RgbSrgbBlock:
|
|
|
5718 switch ( component )
|
|
|
5719 {
|
|
|
5720 case 0 : return "SRGB";
|
|
|
5721 case 1 : return "SRGB";
|
|
|
5722 case 2 : return "SRGB";
|
|
|
5723 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5724 }
|
|
|
5725 case Format::eBc1RgbaUnormBlock:
|
|
|
5726 switch ( component )
|
|
|
5727 {
|
|
|
5728 case 0 : return "UNORM";
|
|
|
5729 case 1 : return "UNORM";
|
|
|
5730 case 2 : return "UNORM";
|
|
|
5731 case 3 : return "UNORM";
|
|
|
5732 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5733 }
|
|
|
5734 case Format::eBc1RgbaSrgbBlock:
|
|
|
5735 switch ( component )
|
|
|
5736 {
|
|
|
5737 case 0 : return "SRGB";
|
|
|
5738 case 1 : return "SRGB";
|
|
|
5739 case 2 : return "SRGB";
|
|
|
5740 case 3 : return "UNORM";
|
|
|
5741 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5742 }
|
|
|
5743 case Format::eBc2UnormBlock:
|
|
|
5744 switch ( component )
|
|
|
5745 {
|
|
|
5746 case 0 : return "UNORM";
|
|
|
5747 case 1 : return "UNORM";
|
|
|
5748 case 2 : return "UNORM";
|
|
|
5749 case 3 : return "UNORM";
|
|
|
5750 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5751 }
|
|
|
5752 case Format::eBc2SrgbBlock:
|
|
|
5753 switch ( component )
|
|
|
5754 {
|
|
|
5755 case 0 : return "SRGB";
|
|
|
5756 case 1 : return "SRGB";
|
|
|
5757 case 2 : return "SRGB";
|
|
|
5758 case 3 : return "UNORM";
|
|
|
5759 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5760 }
|
|
|
5761 case Format::eBc3UnormBlock:
|
|
|
5762 switch ( component )
|
|
|
5763 {
|
|
|
5764 case 0 : return "UNORM";
|
|
|
5765 case 1 : return "UNORM";
|
|
|
5766 case 2 : return "UNORM";
|
|
|
5767 case 3 : return "UNORM";
|
|
|
5768 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5769 }
|
|
|
5770 case Format::eBc3SrgbBlock:
|
|
|
5771 switch ( component )
|
|
|
5772 {
|
|
|
5773 case 0 : return "SRGB";
|
|
|
5774 case 1 : return "SRGB";
|
|
|
5775 case 2 : return "SRGB";
|
|
|
5776 case 3 : return "UNORM";
|
|
|
5777 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5778 }
|
|
|
5779 case Format::eBc4UnormBlock:
|
|
|
5780 switch ( component )
|
|
|
5781 {
|
|
|
5782 case 0 : return "UNORM";
|
|
|
5783 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5784 }
|
|
|
5785 case Format::eBc4SnormBlock:
|
|
|
5786 switch ( component )
|
|
|
5787 {
|
|
|
5788 case 0 : return "SNORM";
|
|
|
5789 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5790 }
|
|
|
5791 case Format::eBc5UnormBlock:
|
|
|
5792 switch ( component )
|
|
|
5793 {
|
|
|
5794 case 0 : return "UNORM";
|
|
|
5795 case 1 : return "UNORM";
|
|
|
5796 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5797 }
|
|
|
5798 case Format::eBc5SnormBlock:
|
|
|
5799 switch ( component )
|
|
|
5800 {
|
|
|
5801 case 0 : return "SNORM";
|
|
|
5802 case 1 : return "SNORM";
|
|
|
5803 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5804 }
|
|
|
5805 case Format::eBc6HUfloatBlock:
|
|
|
5806 switch ( component )
|
|
|
5807 {
|
|
|
5808 case 0 : return "UFLOAT";
|
|
|
5809 case 1 : return "UFLOAT";
|
|
|
5810 case 2 : return "UFLOAT";
|
|
|
5811 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5812 }
|
|
|
5813 case Format::eBc6HSfloatBlock:
|
|
|
5814 switch ( component )
|
|
|
5815 {
|
|
|
5816 case 0 : return "SFLOAT";
|
|
|
5817 case 1 : return "SFLOAT";
|
|
|
5818 case 2 : return "SFLOAT";
|
|
|
5819 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5820 }
|
|
|
5821 case Format::eBc7UnormBlock:
|
|
|
5822 switch ( component )
|
|
|
5823 {
|
|
|
5824 case 0 : return "UNORM";
|
|
|
5825 case 1 : return "UNORM";
|
|
|
5826 case 2 : return "UNORM";
|
|
|
5827 case 3 : return "UNORM";
|
|
|
5828 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5829 }
|
|
|
5830 case Format::eBc7SrgbBlock:
|
|
|
5831 switch ( component )
|
|
|
5832 {
|
|
|
5833 case 0 : return "SRGB";
|
|
|
5834 case 1 : return "SRGB";
|
|
|
5835 case 2 : return "SRGB";
|
|
|
5836 case 3 : return "UNORM";
|
|
|
5837 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5838 }
|
|
|
5839 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
5840 switch ( component )
|
|
|
5841 {
|
|
|
5842 case 0 : return "UNORM";
|
|
|
5843 case 1 : return "UNORM";
|
|
|
5844 case 2 : return "UNORM";
|
|
|
5845 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5846 }
|
|
|
5847 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
5848 switch ( component )
|
|
|
5849 {
|
|
|
5850 case 0 : return "SRGB";
|
|
|
5851 case 1 : return "SRGB";
|
|
|
5852 case 2 : return "SRGB";
|
|
|
5853 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5854 }
|
|
|
5855 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
5856 switch ( component )
|
|
|
5857 {
|
|
|
5858 case 0 : return "UNORM";
|
|
|
5859 case 1 : return "UNORM";
|
|
|
5860 case 2 : return "UNORM";
|
|
|
5861 case 3 : return "UNORM";
|
|
|
5862 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5863 }
|
|
|
5864 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
5865 switch ( component )
|
|
|
5866 {
|
|
|
5867 case 0 : return "SRGB";
|
|
|
5868 case 1 : return "SRGB";
|
|
|
5869 case 2 : return "SRGB";
|
|
|
5870 case 3 : return "UNORM";
|
|
|
5871 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5872 }
|
|
|
5873 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
5874 switch ( component )
|
|
|
5875 {
|
|
|
5876 case 0 : return "UNORM";
|
|
|
5877 case 1 : return "UNORM";
|
|
|
5878 case 2 : return "UNORM";
|
|
|
5879 case 3 : return "UNORM";
|
|
|
5880 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5881 }
|
|
|
5882 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
5883 switch ( component )
|
|
|
5884 {
|
|
|
5885 case 0 : return "SRGB";
|
|
|
5886 case 1 : return "SRGB";
|
|
|
5887 case 2 : return "SRGB";
|
|
|
5888 case 3 : return "UNORM";
|
|
|
5889 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5890 }
|
|
|
5891 case Format::eEacR11UnormBlock:
|
|
|
5892 switch ( component )
|
|
|
5893 {
|
|
|
5894 case 0 : return "UNORM";
|
|
|
5895 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5896 }
|
|
|
5897 case Format::eEacR11SnormBlock:
|
|
|
5898 switch ( component )
|
|
|
5899 {
|
|
|
5900 case 0 : return "SNORM";
|
|
|
5901 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5902 }
|
|
|
5903 case Format::eEacR11G11UnormBlock:
|
|
|
5904 switch ( component )
|
|
|
5905 {
|
|
|
5906 case 0 : return "UNORM";
|
|
|
5907 case 1 : return "UNORM";
|
|
|
5908 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5909 }
|
|
|
5910 case Format::eEacR11G11SnormBlock:
|
|
|
5911 switch ( component )
|
|
|
5912 {
|
|
|
5913 case 0 : return "SNORM";
|
|
|
5914 case 1 : return "SNORM";
|
|
|
5915 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5916 }
|
|
|
5917 case Format::eAstc4x4UnormBlock:
|
|
|
5918 switch ( component )
|
|
|
5919 {
|
|
|
5920 case 0 : return "UNORM";
|
|
|
5921 case 1 : return "UNORM";
|
|
|
5922 case 2 : return "UNORM";
|
|
|
5923 case 3 : return "UNORM";
|
|
|
5924 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5925 }
|
|
|
5926 case Format::eAstc4x4SrgbBlock:
|
|
|
5927 switch ( component )
|
|
|
5928 {
|
|
|
5929 case 0 : return "SRGB";
|
|
|
5930 case 1 : return "SRGB";
|
|
|
5931 case 2 : return "SRGB";
|
|
|
5932 case 3 : return "UNORM";
|
|
|
5933 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5934 }
|
|
|
5935 case Format::eAstc5x4UnormBlock:
|
|
|
5936 switch ( component )
|
|
|
5937 {
|
|
|
5938 case 0 : return "UNORM";
|
|
|
5939 case 1 : return "UNORM";
|
|
|
5940 case 2 : return "UNORM";
|
|
|
5941 case 3 : return "UNORM";
|
|
|
5942 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5943 }
|
|
|
5944 case Format::eAstc5x4SrgbBlock:
|
|
|
5945 switch ( component )
|
|
|
5946 {
|
|
|
5947 case 0 : return "SRGB";
|
|
|
5948 case 1 : return "SRGB";
|
|
|
5949 case 2 : return "SRGB";
|
|
|
5950 case 3 : return "UNORM";
|
|
|
5951 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5952 }
|
|
|
5953 case Format::eAstc5x5UnormBlock:
|
|
|
5954 switch ( component )
|
|
|
5955 {
|
|
|
5956 case 0 : return "UNORM";
|
|
|
5957 case 1 : return "UNORM";
|
|
|
5958 case 2 : return "UNORM";
|
|
|
5959 case 3 : return "UNORM";
|
|
|
5960 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5961 }
|
|
|
5962 case Format::eAstc5x5SrgbBlock:
|
|
|
5963 switch ( component )
|
|
|
5964 {
|
|
|
5965 case 0 : return "SRGB";
|
|
|
5966 case 1 : return "SRGB";
|
|
|
5967 case 2 : return "SRGB";
|
|
|
5968 case 3 : return "UNORM";
|
|
|
5969 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5970 }
|
|
|
5971 case Format::eAstc6x5UnormBlock:
|
|
|
5972 switch ( component )
|
|
|
5973 {
|
|
|
5974 case 0 : return "UNORM";
|
|
|
5975 case 1 : return "UNORM";
|
|
|
5976 case 2 : return "UNORM";
|
|
|
5977 case 3 : return "UNORM";
|
|
|
5978 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5979 }
|
|
|
5980 case Format::eAstc6x5SrgbBlock:
|
|
|
5981 switch ( component )
|
|
|
5982 {
|
|
|
5983 case 0 : return "SRGB";
|
|
|
5984 case 1 : return "SRGB";
|
|
|
5985 case 2 : return "SRGB";
|
|
|
5986 case 3 : return "UNORM";
|
|
|
5987 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5988 }
|
|
|
5989 case Format::eAstc6x6UnormBlock:
|
|
|
5990 switch ( component )
|
|
|
5991 {
|
|
|
5992 case 0 : return "UNORM";
|
|
|
5993 case 1 : return "UNORM";
|
|
|
5994 case 2 : return "UNORM";
|
|
|
5995 case 3 : return "UNORM";
|
|
|
5996 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
5997 }
|
|
|
5998 case Format::eAstc6x6SrgbBlock:
|
|
|
5999 switch ( component )
|
|
|
6000 {
|
|
|
6001 case 0 : return "SRGB";
|
|
|
6002 case 1 : return "SRGB";
|
|
|
6003 case 2 : return "SRGB";
|
|
|
6004 case 3 : return "UNORM";
|
|
|
6005 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6006 }
|
|
|
6007 case Format::eAstc8x5UnormBlock:
|
|
|
6008 switch ( component )
|
|
|
6009 {
|
|
|
6010 case 0 : return "UNORM";
|
|
|
6011 case 1 : return "UNORM";
|
|
|
6012 case 2 : return "UNORM";
|
|
|
6013 case 3 : return "UNORM";
|
|
|
6014 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6015 }
|
|
|
6016 case Format::eAstc8x5SrgbBlock:
|
|
|
6017 switch ( component )
|
|
|
6018 {
|
|
|
6019 case 0 : return "SRGB";
|
|
|
6020 case 1 : return "SRGB";
|
|
|
6021 case 2 : return "SRGB";
|
|
|
6022 case 3 : return "UNORM";
|
|
|
6023 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6024 }
|
|
|
6025 case Format::eAstc8x6UnormBlock:
|
|
|
6026 switch ( component )
|
|
|
6027 {
|
|
|
6028 case 0 : return "UNORM";
|
|
|
6029 case 1 : return "UNORM";
|
|
|
6030 case 2 : return "UNORM";
|
|
|
6031 case 3 : return "UNORM";
|
|
|
6032 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6033 }
|
|
|
6034 case Format::eAstc8x6SrgbBlock:
|
|
|
6035 switch ( component )
|
|
|
6036 {
|
|
|
6037 case 0 : return "SRGB";
|
|
|
6038 case 1 : return "SRGB";
|
|
|
6039 case 2 : return "SRGB";
|
|
|
6040 case 3 : return "UNORM";
|
|
|
6041 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6042 }
|
|
|
6043 case Format::eAstc8x8UnormBlock:
|
|
|
6044 switch ( component )
|
|
|
6045 {
|
|
|
6046 case 0 : return "UNORM";
|
|
|
6047 case 1 : return "UNORM";
|
|
|
6048 case 2 : return "UNORM";
|
|
|
6049 case 3 : return "UNORM";
|
|
|
6050 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6051 }
|
|
|
6052 case Format::eAstc8x8SrgbBlock:
|
|
|
6053 switch ( component )
|
|
|
6054 {
|
|
|
6055 case 0 : return "SRGB";
|
|
|
6056 case 1 : return "SRGB";
|
|
|
6057 case 2 : return "SRGB";
|
|
|
6058 case 3 : return "UNORM";
|
|
|
6059 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6060 }
|
|
|
6061 case Format::eAstc10x5UnormBlock:
|
|
|
6062 switch ( component )
|
|
|
6063 {
|
|
|
6064 case 0 : return "UNORM";
|
|
|
6065 case 1 : return "UNORM";
|
|
|
6066 case 2 : return "UNORM";
|
|
|
6067 case 3 : return "UNORM";
|
|
|
6068 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6069 }
|
|
|
6070 case Format::eAstc10x5SrgbBlock:
|
|
|
6071 switch ( component )
|
|
|
6072 {
|
|
|
6073 case 0 : return "SRGB";
|
|
|
6074 case 1 : return "SRGB";
|
|
|
6075 case 2 : return "SRGB";
|
|
|
6076 case 3 : return "UNORM";
|
|
|
6077 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6078 }
|
|
|
6079 case Format::eAstc10x6UnormBlock:
|
|
|
6080 switch ( component )
|
|
|
6081 {
|
|
|
6082 case 0 : return "UNORM";
|
|
|
6083 case 1 : return "UNORM";
|
|
|
6084 case 2 : return "UNORM";
|
|
|
6085 case 3 : return "UNORM";
|
|
|
6086 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6087 }
|
|
|
6088 case Format::eAstc10x6SrgbBlock:
|
|
|
6089 switch ( component )
|
|
|
6090 {
|
|
|
6091 case 0 : return "SRGB";
|
|
|
6092 case 1 : return "SRGB";
|
|
|
6093 case 2 : return "SRGB";
|
|
|
6094 case 3 : return "UNORM";
|
|
|
6095 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6096 }
|
|
|
6097 case Format::eAstc10x8UnormBlock:
|
|
|
6098 switch ( component )
|
|
|
6099 {
|
|
|
6100 case 0 : return "UNORM";
|
|
|
6101 case 1 : return "UNORM";
|
|
|
6102 case 2 : return "UNORM";
|
|
|
6103 case 3 : return "UNORM";
|
|
|
6104 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6105 }
|
|
|
6106 case Format::eAstc10x8SrgbBlock:
|
|
|
6107 switch ( component )
|
|
|
6108 {
|
|
|
6109 case 0 : return "SRGB";
|
|
|
6110 case 1 : return "SRGB";
|
|
|
6111 case 2 : return "SRGB";
|
|
|
6112 case 3 : return "UNORM";
|
|
|
6113 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6114 }
|
|
|
6115 case Format::eAstc10x10UnormBlock:
|
|
|
6116 switch ( component )
|
|
|
6117 {
|
|
|
6118 case 0 : return "UNORM";
|
|
|
6119 case 1 : return "UNORM";
|
|
|
6120 case 2 : return "UNORM";
|
|
|
6121 case 3 : return "UNORM";
|
|
|
6122 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6123 }
|
|
|
6124 case Format::eAstc10x10SrgbBlock:
|
|
|
6125 switch ( component )
|
|
|
6126 {
|
|
|
6127 case 0 : return "SRGB";
|
|
|
6128 case 1 : return "SRGB";
|
|
|
6129 case 2 : return "SRGB";
|
|
|
6130 case 3 : return "UNORM";
|
|
|
6131 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6132 }
|
|
|
6133 case Format::eAstc12x10UnormBlock:
|
|
|
6134 switch ( component )
|
|
|
6135 {
|
|
|
6136 case 0 : return "UNORM";
|
|
|
6137 case 1 : return "UNORM";
|
|
|
6138 case 2 : return "UNORM";
|
|
|
6139 case 3 : return "UNORM";
|
|
|
6140 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6141 }
|
|
|
6142 case Format::eAstc12x10SrgbBlock:
|
|
|
6143 switch ( component )
|
|
|
6144 {
|
|
|
6145 case 0 : return "SRGB";
|
|
|
6146 case 1 : return "SRGB";
|
|
|
6147 case 2 : return "SRGB";
|
|
|
6148 case 3 : return "UNORM";
|
|
|
6149 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6150 }
|
|
|
6151 case Format::eAstc12x12UnormBlock:
|
|
|
6152 switch ( component )
|
|
|
6153 {
|
|
|
6154 case 0 : return "UNORM";
|
|
|
6155 case 1 : return "UNORM";
|
|
|
6156 case 2 : return "UNORM";
|
|
|
6157 case 3 : return "UNORM";
|
|
|
6158 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6159 }
|
|
|
6160 case Format::eAstc12x12SrgbBlock:
|
|
|
6161 switch ( component )
|
|
|
6162 {
|
|
|
6163 case 0 : return "SRGB";
|
|
|
6164 case 1 : return "SRGB";
|
|
|
6165 case 2 : return "SRGB";
|
|
|
6166 case 3 : return "UNORM";
|
|
|
6167 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6168 }
|
|
|
6169 case Format::eG8B8G8R8422Unorm:
|
|
|
6170 switch ( component )
|
|
|
6171 {
|
|
|
6172 case 0 : return "UNORM";
|
|
|
6173 case 1 : return "UNORM";
|
|
|
6174 case 2 : return "UNORM";
|
|
|
6175 case 3 : return "UNORM";
|
|
|
6176 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6177 }
|
|
|
6178 case Format::eB8G8R8G8422Unorm:
|
|
|
6179 switch ( component )
|
|
|
6180 {
|
|
|
6181 case 0 : return "UNORM";
|
|
|
6182 case 1 : return "UNORM";
|
|
|
6183 case 2 : return "UNORM";
|
|
|
6184 case 3 : return "UNORM";
|
|
|
6185 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6186 }
|
|
|
6187 case Format::eG8B8R83Plane420Unorm:
|
|
|
6188 switch ( component )
|
|
|
6189 {
|
|
|
6190 case 0 : return "UNORM";
|
|
|
6191 case 1 : return "UNORM";
|
|
|
6192 case 2 : return "UNORM";
|
|
|
6193 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6194 }
|
|
|
6195 case Format::eG8B8R82Plane420Unorm:
|
|
|
6196 switch ( component )
|
|
|
6197 {
|
|
|
6198 case 0 : return "UNORM";
|
|
|
6199 case 1 : return "UNORM";
|
|
|
6200 case 2 : return "UNORM";
|
|
|
6201 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6202 }
|
|
|
6203 case Format::eG8B8R83Plane422Unorm:
|
|
|
6204 switch ( component )
|
|
|
6205 {
|
|
|
6206 case 0 : return "UNORM";
|
|
|
6207 case 1 : return "UNORM";
|
|
|
6208 case 2 : return "UNORM";
|
|
|
6209 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6210 }
|
|
|
6211 case Format::eG8B8R82Plane422Unorm:
|
|
|
6212 switch ( component )
|
|
|
6213 {
|
|
|
6214 case 0 : return "UNORM";
|
|
|
6215 case 1 : return "UNORM";
|
|
|
6216 case 2 : return "UNORM";
|
|
|
6217 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6218 }
|
|
|
6219 case Format::eG8B8R83Plane444Unorm:
|
|
|
6220 switch ( component )
|
|
|
6221 {
|
|
|
6222 case 0 : return "UNORM";
|
|
|
6223 case 1 : return "UNORM";
|
|
|
6224 case 2 : return "UNORM";
|
|
|
6225 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6226 }
|
|
|
6227 case Format::eR10X6UnormPack16:
|
|
|
6228 switch ( component )
|
|
|
6229 {
|
|
|
6230 case 0 : return "UNORM";
|
|
|
6231 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6232 }
|
|
|
6233 case Format::eR10X6G10X6Unorm2Pack16:
|
|
|
6234 switch ( component )
|
|
|
6235 {
|
|
|
6236 case 0 : return "UNORM";
|
|
|
6237 case 1 : return "UNORM";
|
|
|
6238 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6239 }
|
|
|
6240 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
6241 switch ( component )
|
|
|
6242 {
|
|
|
6243 case 0 : return "UNORM";
|
|
|
6244 case 1 : return "UNORM";
|
|
|
6245 case 2 : return "UNORM";
|
|
|
6246 case 3 : return "UNORM";
|
|
|
6247 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6248 }
|
|
|
6249 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
6250 switch ( component )
|
|
|
6251 {
|
|
|
6252 case 0 : return "UNORM";
|
|
|
6253 case 1 : return "UNORM";
|
|
|
6254 case 2 : return "UNORM";
|
|
|
6255 case 3 : return "UNORM";
|
|
|
6256 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6257 }
|
|
|
6258 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
6259 switch ( component )
|
|
|
6260 {
|
|
|
6261 case 0 : return "UNORM";
|
|
|
6262 case 1 : return "UNORM";
|
|
|
6263 case 2 : return "UNORM";
|
|
|
6264 case 3 : return "UNORM";
|
|
|
6265 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6266 }
|
|
|
6267 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
6268 switch ( component )
|
|
|
6269 {
|
|
|
6270 case 0 : return "UNORM";
|
|
|
6271 case 1 : return "UNORM";
|
|
|
6272 case 2 : return "UNORM";
|
|
|
6273 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6274 }
|
|
|
6275 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
6276 switch ( component )
|
|
|
6277 {
|
|
|
6278 case 0 : return "UNORM";
|
|
|
6279 case 1 : return "UNORM";
|
|
|
6280 case 2 : return "UNORM";
|
|
|
6281 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6282 }
|
|
|
6283 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
6284 switch ( component )
|
|
|
6285 {
|
|
|
6286 case 0 : return "UNORM";
|
|
|
6287 case 1 : return "UNORM";
|
|
|
6288 case 2 : return "UNORM";
|
|
|
6289 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6290 }
|
|
|
6291 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
6292 switch ( component )
|
|
|
6293 {
|
|
|
6294 case 0 : return "UNORM";
|
|
|
6295 case 1 : return "UNORM";
|
|
|
6296 case 2 : return "UNORM";
|
|
|
6297 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6298 }
|
|
|
6299 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
6300 switch ( component )
|
|
|
6301 {
|
|
|
6302 case 0 : return "UNORM";
|
|
|
6303 case 1 : return "UNORM";
|
|
|
6304 case 2 : return "UNORM";
|
|
|
6305 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6306 }
|
|
|
6307 case Format::eR12X4UnormPack16:
|
|
|
6308 switch ( component )
|
|
|
6309 {
|
|
|
6310 case 0 : return "UNORM";
|
|
|
6311 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6312 }
|
|
|
6313 case Format::eR12X4G12X4Unorm2Pack16:
|
|
|
6314 switch ( component )
|
|
|
6315 {
|
|
|
6316 case 0 : return "UNORM";
|
|
|
6317 case 1 : return "UNORM";
|
|
|
6318 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6319 }
|
|
|
6320 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
6321 switch ( component )
|
|
|
6322 {
|
|
|
6323 case 0 : return "UNORM";
|
|
|
6324 case 1 : return "UNORM";
|
|
|
6325 case 2 : return "UNORM";
|
|
|
6326 case 3 : return "UNORM";
|
|
|
6327 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6328 }
|
|
|
6329 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
6330 switch ( component )
|
|
|
6331 {
|
|
|
6332 case 0 : return "UNORM";
|
|
|
6333 case 1 : return "UNORM";
|
|
|
6334 case 2 : return "UNORM";
|
|
|
6335 case 3 : return "UNORM";
|
|
|
6336 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6337 }
|
|
|
6338 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
6339 switch ( component )
|
|
|
6340 {
|
|
|
6341 case 0 : return "UNORM";
|
|
|
6342 case 1 : return "UNORM";
|
|
|
6343 case 2 : return "UNORM";
|
|
|
6344 case 3 : return "UNORM";
|
|
|
6345 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6346 }
|
|
|
6347 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
6348 switch ( component )
|
|
|
6349 {
|
|
|
6350 case 0 : return "UNORM";
|
|
|
6351 case 1 : return "UNORM";
|
|
|
6352 case 2 : return "UNORM";
|
|
|
6353 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6354 }
|
|
|
6355 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
6356 switch ( component )
|
|
|
6357 {
|
|
|
6358 case 0 : return "UNORM";
|
|
|
6359 case 1 : return "UNORM";
|
|
|
6360 case 2 : return "UNORM";
|
|
|
6361 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6362 }
|
|
|
6363 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
6364 switch ( component )
|
|
|
6365 {
|
|
|
6366 case 0 : return "UNORM";
|
|
|
6367 case 1 : return "UNORM";
|
|
|
6368 case 2 : return "UNORM";
|
|
|
6369 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6370 }
|
|
|
6371 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
6372 switch ( component )
|
|
|
6373 {
|
|
|
6374 case 0 : return "UNORM";
|
|
|
6375 case 1 : return "UNORM";
|
|
|
6376 case 2 : return "UNORM";
|
|
|
6377 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6378 }
|
|
|
6379 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
6380 switch ( component )
|
|
|
6381 {
|
|
|
6382 case 0 : return "UNORM";
|
|
|
6383 case 1 : return "UNORM";
|
|
|
6384 case 2 : return "UNORM";
|
|
|
6385 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6386 }
|
|
|
6387 case Format::eG16B16G16R16422Unorm:
|
|
|
6388 switch ( component )
|
|
|
6389 {
|
|
|
6390 case 0 : return "UNORM";
|
|
|
6391 case 1 : return "UNORM";
|
|
|
6392 case 2 : return "UNORM";
|
|
|
6393 case 3 : return "UNORM";
|
|
|
6394 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6395 }
|
|
|
6396 case Format::eB16G16R16G16422Unorm:
|
|
|
6397 switch ( component )
|
|
|
6398 {
|
|
|
6399 case 0 : return "UNORM";
|
|
|
6400 case 1 : return "UNORM";
|
|
|
6401 case 2 : return "UNORM";
|
|
|
6402 case 3 : return "UNORM";
|
|
|
6403 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6404 }
|
|
|
6405 case Format::eG16B16R163Plane420Unorm:
|
|
|
6406 switch ( component )
|
|
|
6407 {
|
|
|
6408 case 0 : return "UNORM";
|
|
|
6409 case 1 : return "UNORM";
|
|
|
6410 case 2 : return "UNORM";
|
|
|
6411 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6412 }
|
|
|
6413 case Format::eG16B16R162Plane420Unorm:
|
|
|
6414 switch ( component )
|
|
|
6415 {
|
|
|
6416 case 0 : return "UNORM";
|
|
|
6417 case 1 : return "UNORM";
|
|
|
6418 case 2 : return "UNORM";
|
|
|
6419 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6420 }
|
|
|
6421 case Format::eG16B16R163Plane422Unorm:
|
|
|
6422 switch ( component )
|
|
|
6423 {
|
|
|
6424 case 0 : return "UNORM";
|
|
|
6425 case 1 : return "UNORM";
|
|
|
6426 case 2 : return "UNORM";
|
|
|
6427 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6428 }
|
|
|
6429 case Format::eG16B16R162Plane422Unorm:
|
|
|
6430 switch ( component )
|
|
|
6431 {
|
|
|
6432 case 0 : return "UNORM";
|
|
|
6433 case 1 : return "UNORM";
|
|
|
6434 case 2 : return "UNORM";
|
|
|
6435 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6436 }
|
|
|
6437 case Format::eG16B16R163Plane444Unorm:
|
|
|
6438 switch ( component )
|
|
|
6439 {
|
|
|
6440 case 0 : return "UNORM";
|
|
|
6441 case 1 : return "UNORM";
|
|
|
6442 case 2 : return "UNORM";
|
|
|
6443 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6444 }
|
|
|
6445 case Format::eG8B8R82Plane444Unorm:
|
|
|
6446 switch ( component )
|
|
|
6447 {
|
|
|
6448 case 0 : return "UNORM";
|
|
|
6449 case 1 : return "UNORM";
|
|
|
6450 case 2 : return "UNORM";
|
|
|
6451 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6452 }
|
|
|
6453 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
6454 switch ( component )
|
|
|
6455 {
|
|
|
6456 case 0 : return "UNORM";
|
|
|
6457 case 1 : return "UNORM";
|
|
|
6458 case 2 : return "UNORM";
|
|
|
6459 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6460 }
|
|
|
6461 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
6462 switch ( component )
|
|
|
6463 {
|
|
|
6464 case 0 : return "UNORM";
|
|
|
6465 case 1 : return "UNORM";
|
|
|
6466 case 2 : return "UNORM";
|
|
|
6467 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6468 }
|
|
|
6469 case Format::eG16B16R162Plane444Unorm:
|
|
|
6470 switch ( component )
|
|
|
6471 {
|
|
|
6472 case 0 : return "UNORM";
|
|
|
6473 case 1 : return "UNORM";
|
|
|
6474 case 2 : return "UNORM";
|
|
|
6475 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6476 }
|
|
|
6477 case Format::eA4R4G4B4UnormPack16:
|
|
|
6478 switch ( component )
|
|
|
6479 {
|
|
|
6480 case 0 : return "UNORM";
|
|
|
6481 case 1 : return "UNORM";
|
|
|
6482 case 2 : return "UNORM";
|
|
|
6483 case 3 : return "UNORM";
|
|
|
6484 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6485 }
|
|
|
6486 case Format::eA4B4G4R4UnormPack16:
|
|
|
6487 switch ( component )
|
|
|
6488 {
|
|
|
6489 case 0 : return "UNORM";
|
|
|
6490 case 1 : return "UNORM";
|
|
|
6491 case 2 : return "UNORM";
|
|
|
6492 case 3 : return "UNORM";
|
|
|
6493 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6494 }
|
|
|
6495 case Format::eAstc4x4SfloatBlock:
|
|
|
6496 switch ( component )
|
|
|
6497 {
|
|
|
6498 case 0 : return "SFLOAT";
|
|
|
6499 case 1 : return "SFLOAT";
|
|
|
6500 case 2 : return "SFLOAT";
|
|
|
6501 case 3 : return "SFLOAT";
|
|
|
6502 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6503 }
|
|
|
6504 case Format::eAstc5x4SfloatBlock:
|
|
|
6505 switch ( component )
|
|
|
6506 {
|
|
|
6507 case 0 : return "SFLOAT";
|
|
|
6508 case 1 : return "SFLOAT";
|
|
|
6509 case 2 : return "SFLOAT";
|
|
|
6510 case 3 : return "SFLOAT";
|
|
|
6511 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6512 }
|
|
|
6513 case Format::eAstc5x5SfloatBlock:
|
|
|
6514 switch ( component )
|
|
|
6515 {
|
|
|
6516 case 0 : return "SFLOAT";
|
|
|
6517 case 1 : return "SFLOAT";
|
|
|
6518 case 2 : return "SFLOAT";
|
|
|
6519 case 3 : return "SFLOAT";
|
|
|
6520 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6521 }
|
|
|
6522 case Format::eAstc6x5SfloatBlock:
|
|
|
6523 switch ( component )
|
|
|
6524 {
|
|
|
6525 case 0 : return "SFLOAT";
|
|
|
6526 case 1 : return "SFLOAT";
|
|
|
6527 case 2 : return "SFLOAT";
|
|
|
6528 case 3 : return "SFLOAT";
|
|
|
6529 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6530 }
|
|
|
6531 case Format::eAstc6x6SfloatBlock:
|
|
|
6532 switch ( component )
|
|
|
6533 {
|
|
|
6534 case 0 : return "SFLOAT";
|
|
|
6535 case 1 : return "SFLOAT";
|
|
|
6536 case 2 : return "SFLOAT";
|
|
|
6537 case 3 : return "SFLOAT";
|
|
|
6538 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6539 }
|
|
|
6540 case Format::eAstc8x5SfloatBlock:
|
|
|
6541 switch ( component )
|
|
|
6542 {
|
|
|
6543 case 0 : return "SFLOAT";
|
|
|
6544 case 1 : return "SFLOAT";
|
|
|
6545 case 2 : return "SFLOAT";
|
|
|
6546 case 3 : return "SFLOAT";
|
|
|
6547 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6548 }
|
|
|
6549 case Format::eAstc8x6SfloatBlock:
|
|
|
6550 switch ( component )
|
|
|
6551 {
|
|
|
6552 case 0 : return "SFLOAT";
|
|
|
6553 case 1 : return "SFLOAT";
|
|
|
6554 case 2 : return "SFLOAT";
|
|
|
6555 case 3 : return "SFLOAT";
|
|
|
6556 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6557 }
|
|
|
6558 case Format::eAstc8x8SfloatBlock:
|
|
|
6559 switch ( component )
|
|
|
6560 {
|
|
|
6561 case 0 : return "SFLOAT";
|
|
|
6562 case 1 : return "SFLOAT";
|
|
|
6563 case 2 : return "SFLOAT";
|
|
|
6564 case 3 : return "SFLOAT";
|
|
|
6565 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6566 }
|
|
|
6567 case Format::eAstc10x5SfloatBlock:
|
|
|
6568 switch ( component )
|
|
|
6569 {
|
|
|
6570 case 0 : return "SFLOAT";
|
|
|
6571 case 1 : return "SFLOAT";
|
|
|
6572 case 2 : return "SFLOAT";
|
|
|
6573 case 3 : return "SFLOAT";
|
|
|
6574 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6575 }
|
|
|
6576 case Format::eAstc10x6SfloatBlock:
|
|
|
6577 switch ( component )
|
|
|
6578 {
|
|
|
6579 case 0 : return "SFLOAT";
|
|
|
6580 case 1 : return "SFLOAT";
|
|
|
6581 case 2 : return "SFLOAT";
|
|
|
6582 case 3 : return "SFLOAT";
|
|
|
6583 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6584 }
|
|
|
6585 case Format::eAstc10x8SfloatBlock:
|
|
|
6586 switch ( component )
|
|
|
6587 {
|
|
|
6588 case 0 : return "SFLOAT";
|
|
|
6589 case 1 : return "SFLOAT";
|
|
|
6590 case 2 : return "SFLOAT";
|
|
|
6591 case 3 : return "SFLOAT";
|
|
|
6592 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6593 }
|
|
|
6594 case Format::eAstc10x10SfloatBlock:
|
|
|
6595 switch ( component )
|
|
|
6596 {
|
|
|
6597 case 0 : return "SFLOAT";
|
|
|
6598 case 1 : return "SFLOAT";
|
|
|
6599 case 2 : return "SFLOAT";
|
|
|
6600 case 3 : return "SFLOAT";
|
|
|
6601 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6602 }
|
|
|
6603 case Format::eAstc12x10SfloatBlock:
|
|
|
6604 switch ( component )
|
|
|
6605 {
|
|
|
6606 case 0 : return "SFLOAT";
|
|
|
6607 case 1 : return "SFLOAT";
|
|
|
6608 case 2 : return "SFLOAT";
|
|
|
6609 case 3 : return "SFLOAT";
|
|
|
6610 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6611 }
|
|
|
6612 case Format::eAstc12x12SfloatBlock:
|
|
|
6613 switch ( component )
|
|
|
6614 {
|
|
|
6615 case 0 : return "SFLOAT";
|
|
|
6616 case 1 : return "SFLOAT";
|
|
|
6617 case 2 : return "SFLOAT";
|
|
|
6618 case 3 : return "SFLOAT";
|
|
|
6619 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6620 }
|
|
|
6621 case Format::eA1B5G5R5UnormPack16:
|
|
|
6622 switch ( component )
|
|
|
6623 {
|
|
|
6624 case 0 : return "UNORM";
|
|
|
6625 case 1 : return "UNORM";
|
|
|
6626 case 2 : return "UNORM";
|
|
|
6627 case 3 : return "UNORM";
|
|
|
6628 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6629 }
|
|
|
6630 case Format::eA8Unorm:
|
|
|
6631 switch ( component )
|
|
|
6632 {
|
|
|
6633 case 0 : return "UNORM";
|
|
|
6634 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6635 }
|
|
|
6636 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
6637 switch ( component )
|
|
|
6638 {
|
|
|
6639 case 0 : return "UNORM";
|
|
|
6640 case 1 : return "UNORM";
|
|
|
6641 case 2 : return "UNORM";
|
|
|
6642 case 3 : return "UNORM";
|
|
|
6643 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6644 }
|
|
|
6645 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
6646 switch ( component )
|
|
|
6647 {
|
|
|
6648 case 0 : return "UNORM";
|
|
|
6649 case 1 : return "UNORM";
|
|
|
6650 case 2 : return "UNORM";
|
|
|
6651 case 3 : return "UNORM";
|
|
|
6652 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6653 }
|
|
|
6654 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
6655 switch ( component )
|
|
|
6656 {
|
|
|
6657 case 0 : return "UNORM";
|
|
|
6658 case 1 : return "UNORM";
|
|
|
6659 case 2 : return "UNORM";
|
|
|
6660 case 3 : return "UNORM";
|
|
|
6661 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6662 }
|
|
|
6663 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
6664 switch ( component )
|
|
|
6665 {
|
|
|
6666 case 0 : return "UNORM";
|
|
|
6667 case 1 : return "UNORM";
|
|
|
6668 case 2 : return "UNORM";
|
|
|
6669 case 3 : return "UNORM";
|
|
|
6670 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6671 }
|
|
|
6672 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
6673 switch ( component )
|
|
|
6674 {
|
|
|
6675 case 0 : return "SRGB";
|
|
|
6676 case 1 : return "SRGB";
|
|
|
6677 case 2 : return "SRGB";
|
|
|
6678 case 3 : return "UNORM";
|
|
|
6679 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6680 }
|
|
|
6681 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
6682 switch ( component )
|
|
|
6683 {
|
|
|
6684 case 0 : return "SRGB";
|
|
|
6685 case 1 : return "SRGB";
|
|
|
6686 case 2 : return "SRGB";
|
|
|
6687 case 3 : return "UNORM";
|
|
|
6688 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6689 }
|
|
|
6690 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
6691 switch ( component )
|
|
|
6692 {
|
|
|
6693 case 0 : return "SRGB";
|
|
|
6694 case 1 : return "SRGB";
|
|
|
6695 case 2 : return "SRGB";
|
|
|
6696 case 3 : return "UNORM";
|
|
|
6697 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6698 }
|
|
|
6699 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
6700 switch ( component )
|
|
|
6701 {
|
|
|
6702 case 0 : return "SRGB";
|
|
|
6703 case 1 : return "SRGB";
|
|
|
6704 case 2 : return "SRGB";
|
|
|
6705 case 3 : return "UNORM";
|
|
|
6706 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6707 }
|
|
|
6708 case Format::eR8BoolARM:
|
|
|
6709 switch ( component )
|
|
|
6710 {
|
|
|
6711 case 0 : return "BOOL";
|
|
|
6712 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6713 }
|
|
|
6714 case Format::eR16G16Sfixed5NV:
|
|
|
6715 switch ( component )
|
|
|
6716 {
|
|
|
6717 case 0 : return "SFIXED5";
|
|
|
6718 case 1 : return "SFIXED5";
|
|
|
6719 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6720 }
|
|
|
6721 case Format::eR10X6UintPack16ARM:
|
|
|
6722 switch ( component )
|
|
|
6723 {
|
|
|
6724 case 0 : return "UINT";
|
|
|
6725 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6726 }
|
|
|
6727 case Format::eR10X6G10X6Uint2Pack16ARM:
|
|
|
6728 switch ( component )
|
|
|
6729 {
|
|
|
6730 case 0 : return "UINT";
|
|
|
6731 case 1 : return "UINT";
|
|
|
6732 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6733 }
|
|
|
6734 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
6735 switch ( component )
|
|
|
6736 {
|
|
|
6737 case 0 : return "UINT";
|
|
|
6738 case 1 : return "UINT";
|
|
|
6739 case 2 : return "UINT";
|
|
|
6740 case 3 : return "UINT";
|
|
|
6741 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6742 }
|
|
|
6743 case Format::eR12X4UintPack16ARM:
|
|
|
6744 switch ( component )
|
|
|
6745 {
|
|
|
6746 case 0 : return "UINT";
|
|
|
6747 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6748 }
|
|
|
6749 case Format::eR12X4G12X4Uint2Pack16ARM:
|
|
|
6750 switch ( component )
|
|
|
6751 {
|
|
|
6752 case 0 : return "UINT";
|
|
|
6753 case 1 : return "UINT";
|
|
|
6754 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6755 }
|
|
|
6756 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
6757 switch ( component )
|
|
|
6758 {
|
|
|
6759 case 0 : return "UINT";
|
|
|
6760 case 1 : return "UINT";
|
|
|
6761 case 2 : return "UINT";
|
|
|
6762 case 3 : return "UINT";
|
|
|
6763 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6764 }
|
|
|
6765 case Format::eR14X2UintPack16ARM:
|
|
|
6766 switch ( component )
|
|
|
6767 {
|
|
|
6768 case 0 : return "UINT";
|
|
|
6769 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6770 }
|
|
|
6771 case Format::eR14X2G14X2Uint2Pack16ARM:
|
|
|
6772 switch ( component )
|
|
|
6773 {
|
|
|
6774 case 0 : return "UINT";
|
|
|
6775 case 1 : return "UINT";
|
|
|
6776 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6777 }
|
|
|
6778 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
6779 switch ( component )
|
|
|
6780 {
|
|
|
6781 case 0 : return "UINT";
|
|
|
6782 case 1 : return "UINT";
|
|
|
6783 case 2 : return "UINT";
|
|
|
6784 case 3 : return "UINT";
|
|
|
6785 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6786 }
|
|
|
6787 case Format::eR14X2UnormPack16ARM:
|
|
|
6788 switch ( component )
|
|
|
6789 {
|
|
|
6790 case 0 : return "UNORM";
|
|
|
6791 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6792 }
|
|
|
6793 case Format::eR14X2G14X2Unorm2Pack16ARM:
|
|
|
6794 switch ( component )
|
|
|
6795 {
|
|
|
6796 case 0 : return "UNORM";
|
|
|
6797 case 1 : return "UNORM";
|
|
|
6798 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6799 }
|
|
|
6800 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
6801 switch ( component )
|
|
|
6802 {
|
|
|
6803 case 0 : return "UNORM";
|
|
|
6804 case 1 : return "UNORM";
|
|
|
6805 case 2 : return "UNORM";
|
|
|
6806 case 3 : return "UNORM";
|
|
|
6807 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6808 }
|
|
|
6809 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
6810 switch ( component )
|
|
|
6811 {
|
|
|
6812 case 0 : return "UNORM";
|
|
|
6813 case 1 : return "UNORM";
|
|
|
6814 case 2 : return "UNORM";
|
|
|
6815 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6816 }
|
|
|
6817 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
6818 switch ( component )
|
|
|
6819 {
|
|
|
6820 case 0 : return "UNORM";
|
|
|
6821 case 1 : return "UNORM";
|
|
|
6822 case 2 : return "UNORM";
|
|
|
6823 default: VULKAN_HPP_ASSERT( false ); return "";
|
|
|
6824 }
|
|
|
6825
|
|
|
6826 default: return "";
|
|
|
6827 }
|
|
|
6828 }
|
|
|
6829
|
|
|
6830 // The plane this component lies in.
|
|
|
6831 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t componentPlaneIndex( Format format, uint8_t component )
|
|
|
6832 {
|
|
|
6833 switch ( format )
|
|
|
6834 {
|
|
|
6835 case Format::eG8B8R83Plane420Unorm:
|
|
|
6836 switch ( component )
|
|
|
6837 {
|
|
|
6838 case 0 : return 0;
|
|
|
6839 case 1 : return 1;
|
|
|
6840 case 2 : return 2;
|
|
|
6841 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6842 }
|
|
|
6843 case Format::eG8B8R82Plane420Unorm:
|
|
|
6844 switch ( component )
|
|
|
6845 {
|
|
|
6846 case 0 : return 0;
|
|
|
6847 case 1 : return 1;
|
|
|
6848 case 2 : return 1;
|
|
|
6849 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6850 }
|
|
|
6851 case Format::eG8B8R83Plane422Unorm:
|
|
|
6852 switch ( component )
|
|
|
6853 {
|
|
|
6854 case 0 : return 0;
|
|
|
6855 case 1 : return 1;
|
|
|
6856 case 2 : return 2;
|
|
|
6857 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6858 }
|
|
|
6859 case Format::eG8B8R82Plane422Unorm:
|
|
|
6860 switch ( component )
|
|
|
6861 {
|
|
|
6862 case 0 : return 0;
|
|
|
6863 case 1 : return 1;
|
|
|
6864 case 2 : return 1;
|
|
|
6865 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6866 }
|
|
|
6867 case Format::eG8B8R83Plane444Unorm:
|
|
|
6868 switch ( component )
|
|
|
6869 {
|
|
|
6870 case 0 : return 0;
|
|
|
6871 case 1 : return 1;
|
|
|
6872 case 2 : return 2;
|
|
|
6873 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6874 }
|
|
|
6875 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
6876 switch ( component )
|
|
|
6877 {
|
|
|
6878 case 0 : return 0;
|
|
|
6879 case 1 : return 1;
|
|
|
6880 case 2 : return 2;
|
|
|
6881 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6882 }
|
|
|
6883 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
6884 switch ( component )
|
|
|
6885 {
|
|
|
6886 case 0 : return 0;
|
|
|
6887 case 1 : return 1;
|
|
|
6888 case 2 : return 1;
|
|
|
6889 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6890 }
|
|
|
6891 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
6892 switch ( component )
|
|
|
6893 {
|
|
|
6894 case 0 : return 0;
|
|
|
6895 case 1 : return 1;
|
|
|
6896 case 2 : return 2;
|
|
|
6897 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6898 }
|
|
|
6899 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
6900 switch ( component )
|
|
|
6901 {
|
|
|
6902 case 0 : return 0;
|
|
|
6903 case 1 : return 1;
|
|
|
6904 case 2 : return 1;
|
|
|
6905 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6906 }
|
|
|
6907 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
6908 switch ( component )
|
|
|
6909 {
|
|
|
6910 case 0 : return 0;
|
|
|
6911 case 1 : return 1;
|
|
|
6912 case 2 : return 2;
|
|
|
6913 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6914 }
|
|
|
6915 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
6916 switch ( component )
|
|
|
6917 {
|
|
|
6918 case 0 : return 0;
|
|
|
6919 case 1 : return 1;
|
|
|
6920 case 2 : return 2;
|
|
|
6921 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6922 }
|
|
|
6923 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
6924 switch ( component )
|
|
|
6925 {
|
|
|
6926 case 0 : return 0;
|
|
|
6927 case 1 : return 1;
|
|
|
6928 case 2 : return 1;
|
|
|
6929 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6930 }
|
|
|
6931 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
6932 switch ( component )
|
|
|
6933 {
|
|
|
6934 case 0 : return 0;
|
|
|
6935 case 1 : return 1;
|
|
|
6936 case 2 : return 2;
|
|
|
6937 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6938 }
|
|
|
6939 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
6940 switch ( component )
|
|
|
6941 {
|
|
|
6942 case 0 : return 0;
|
|
|
6943 case 1 : return 1;
|
|
|
6944 case 2 : return 1;
|
|
|
6945 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6946 }
|
|
|
6947 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
6948 switch ( component )
|
|
|
6949 {
|
|
|
6950 case 0 : return 0;
|
|
|
6951 case 1 : return 1;
|
|
|
6952 case 2 : return 2;
|
|
|
6953 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6954 }
|
|
|
6955 case Format::eG16B16R163Plane420Unorm:
|
|
|
6956 switch ( component )
|
|
|
6957 {
|
|
|
6958 case 0 : return 0;
|
|
|
6959 case 1 : return 1;
|
|
|
6960 case 2 : return 2;
|
|
|
6961 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6962 }
|
|
|
6963 case Format::eG16B16R162Plane420Unorm:
|
|
|
6964 switch ( component )
|
|
|
6965 {
|
|
|
6966 case 0 : return 0;
|
|
|
6967 case 1 : return 1;
|
|
|
6968 case 2 : return 1;
|
|
|
6969 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6970 }
|
|
|
6971 case Format::eG16B16R163Plane422Unorm:
|
|
|
6972 switch ( component )
|
|
|
6973 {
|
|
|
6974 case 0 : return 0;
|
|
|
6975 case 1 : return 1;
|
|
|
6976 case 2 : return 2;
|
|
|
6977 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6978 }
|
|
|
6979 case Format::eG16B16R162Plane422Unorm:
|
|
|
6980 switch ( component )
|
|
|
6981 {
|
|
|
6982 case 0 : return 0;
|
|
|
6983 case 1 : return 1;
|
|
|
6984 case 2 : return 1;
|
|
|
6985 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6986 }
|
|
|
6987 case Format::eG16B16R163Plane444Unorm:
|
|
|
6988 switch ( component )
|
|
|
6989 {
|
|
|
6990 case 0 : return 0;
|
|
|
6991 case 1 : return 1;
|
|
|
6992 case 2 : return 2;
|
|
|
6993 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
6994 }
|
|
|
6995 case Format::eG8B8R82Plane444Unorm:
|
|
|
6996 switch ( component )
|
|
|
6997 {
|
|
|
6998 case 0 : return 0;
|
|
|
6999 case 1 : return 1;
|
|
|
7000 case 2 : return 1;
|
|
|
7001 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7002 }
|
|
|
7003 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
7004 switch ( component )
|
|
|
7005 {
|
|
|
7006 case 0 : return 0;
|
|
|
7007 case 1 : return 1;
|
|
|
7008 case 2 : return 1;
|
|
|
7009 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7010 }
|
|
|
7011 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
7012 switch ( component )
|
|
|
7013 {
|
|
|
7014 case 0 : return 0;
|
|
|
7015 case 1 : return 1;
|
|
|
7016 case 2 : return 1;
|
|
|
7017 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7018 }
|
|
|
7019 case Format::eG16B16R162Plane444Unorm:
|
|
|
7020 switch ( component )
|
|
|
7021 {
|
|
|
7022 case 0 : return 0;
|
|
|
7023 case 1 : return 1;
|
|
|
7024 case 2 : return 1;
|
|
|
7025 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7026 }
|
|
|
7027 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
7028 switch ( component )
|
|
|
7029 {
|
|
|
7030 case 0 : return 0;
|
|
|
7031 case 1 : return 1;
|
|
|
7032 case 2 : return 1;
|
|
|
7033 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7034 }
|
|
|
7035 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
7036 switch ( component )
|
|
|
7037 {
|
|
|
7038 case 0 : return 0;
|
|
|
7039 case 1 : return 1;
|
|
|
7040 case 2 : return 1;
|
|
|
7041 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
7042 }
|
|
|
7043
|
|
|
7044 default: return 0;
|
|
|
7045 }
|
|
|
7046 }
|
|
|
7047
|
|
|
7048 // True, if the components of this format are compressed, otherwise false.
|
|
|
7049 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool componentsAreCompressed( Format format )
|
|
|
7050 {
|
|
|
7051 switch ( format )
|
|
|
7052 {
|
|
|
7053 case Format::eBc1RgbUnormBlock:
|
|
|
7054 case Format::eBc1RgbSrgbBlock:
|
|
|
7055 case Format::eBc1RgbaUnormBlock:
|
|
|
7056 case Format::eBc1RgbaSrgbBlock:
|
|
|
7057 case Format::eBc2UnormBlock:
|
|
|
7058 case Format::eBc2SrgbBlock:
|
|
|
7059 case Format::eBc3UnormBlock:
|
|
|
7060 case Format::eBc3SrgbBlock:
|
|
|
7061 case Format::eBc4UnormBlock:
|
|
|
7062 case Format::eBc4SnormBlock:
|
|
|
7063 case Format::eBc5UnormBlock:
|
|
|
7064 case Format::eBc5SnormBlock:
|
|
|
7065 case Format::eBc6HUfloatBlock:
|
|
|
7066 case Format::eBc6HSfloatBlock:
|
|
|
7067 case Format::eBc7UnormBlock:
|
|
|
7068 case Format::eBc7SrgbBlock:
|
|
|
7069 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
7070 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
7071 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
7072 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
7073 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
7074 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
7075 case Format::eAstc4x4UnormBlock:
|
|
|
7076 case Format::eAstc4x4SrgbBlock:
|
|
|
7077 case Format::eAstc5x4UnormBlock:
|
|
|
7078 case Format::eAstc5x4SrgbBlock:
|
|
|
7079 case Format::eAstc5x5UnormBlock:
|
|
|
7080 case Format::eAstc5x5SrgbBlock:
|
|
|
7081 case Format::eAstc6x5UnormBlock:
|
|
|
7082 case Format::eAstc6x5SrgbBlock:
|
|
|
7083 case Format::eAstc6x6UnormBlock:
|
|
|
7084 case Format::eAstc6x6SrgbBlock:
|
|
|
7085 case Format::eAstc8x5UnormBlock:
|
|
|
7086 case Format::eAstc8x5SrgbBlock:
|
|
|
7087 case Format::eAstc8x6UnormBlock:
|
|
|
7088 case Format::eAstc8x6SrgbBlock:
|
|
|
7089 case Format::eAstc8x8UnormBlock:
|
|
|
7090 case Format::eAstc8x8SrgbBlock:
|
|
|
7091 case Format::eAstc10x5UnormBlock:
|
|
|
7092 case Format::eAstc10x5SrgbBlock:
|
|
|
7093 case Format::eAstc10x6UnormBlock:
|
|
|
7094 case Format::eAstc10x6SrgbBlock:
|
|
|
7095 case Format::eAstc10x8UnormBlock:
|
|
|
7096 case Format::eAstc10x8SrgbBlock:
|
|
|
7097 case Format::eAstc10x10UnormBlock:
|
|
|
7098 case Format::eAstc10x10SrgbBlock:
|
|
|
7099 case Format::eAstc12x10UnormBlock:
|
|
|
7100 case Format::eAstc12x10SrgbBlock:
|
|
|
7101 case Format::eAstc12x12UnormBlock:
|
|
|
7102 case Format::eAstc12x12SrgbBlock:
|
|
|
7103 case Format::eAstc4x4SfloatBlock:
|
|
|
7104 case Format::eAstc5x4SfloatBlock:
|
|
|
7105 case Format::eAstc5x5SfloatBlock:
|
|
|
7106 case Format::eAstc6x5SfloatBlock:
|
|
|
7107 case Format::eAstc6x6SfloatBlock:
|
|
|
7108 case Format::eAstc8x5SfloatBlock:
|
|
|
7109 case Format::eAstc8x6SfloatBlock:
|
|
|
7110 case Format::eAstc8x8SfloatBlock:
|
|
|
7111 case Format::eAstc10x5SfloatBlock:
|
|
|
7112 case Format::eAstc10x6SfloatBlock:
|
|
|
7113 case Format::eAstc10x8SfloatBlock:
|
|
|
7114 case Format::eAstc10x10SfloatBlock:
|
|
|
7115 case Format::eAstc12x10SfloatBlock:
|
|
|
7116 case Format::eAstc12x12SfloatBlock:
|
|
|
7117 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
7118 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
7119 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
7120 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
7121 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
7122 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
7123 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
7124 case Format::ePvrtc24BppSrgbBlockIMG : return true;
|
|
|
7125 default : return false;
|
|
|
7126 }
|
|
|
7127 }
|
|
|
7128
|
|
|
7129 // A textual description of the compression scheme, or an empty string if it is not compressed
|
|
|
7130 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 char const * compressionScheme( Format format )
|
|
|
7131 {
|
|
|
7132 switch ( format )
|
|
|
7133 {
|
|
|
7134 case Format::eBc1RgbUnormBlock : return "BC";
|
|
|
7135 case Format::eBc1RgbSrgbBlock : return "BC";
|
|
|
7136 case Format::eBc1RgbaUnormBlock : return "BC";
|
|
|
7137 case Format::eBc1RgbaSrgbBlock : return "BC";
|
|
|
7138 case Format::eBc2UnormBlock : return "BC";
|
|
|
7139 case Format::eBc2SrgbBlock : return "BC";
|
|
|
7140 case Format::eBc3UnormBlock : return "BC";
|
|
|
7141 case Format::eBc3SrgbBlock : return "BC";
|
|
|
7142 case Format::eBc4UnormBlock : return "BC";
|
|
|
7143 case Format::eBc4SnormBlock : return "BC";
|
|
|
7144 case Format::eBc5UnormBlock : return "BC";
|
|
|
7145 case Format::eBc5SnormBlock : return "BC";
|
|
|
7146 case Format::eBc6HUfloatBlock : return "BC";
|
|
|
7147 case Format::eBc6HSfloatBlock : return "BC";
|
|
|
7148 case Format::eBc7UnormBlock : return "BC";
|
|
|
7149 case Format::eBc7SrgbBlock : return "BC";
|
|
|
7150 case Format::eEtc2R8G8B8UnormBlock : return "ETC2";
|
|
|
7151 case Format::eEtc2R8G8B8SrgbBlock : return "ETC2";
|
|
|
7152 case Format::eEtc2R8G8B8A1UnormBlock : return "ETC2";
|
|
|
7153 case Format::eEtc2R8G8B8A1SrgbBlock : return "ETC2";
|
|
|
7154 case Format::eEtc2R8G8B8A8UnormBlock : return "ETC2";
|
|
|
7155 case Format::eEtc2R8G8B8A8SrgbBlock : return "ETC2";
|
|
|
7156 case Format::eEacR11UnormBlock : return "EAC";
|
|
|
7157 case Format::eEacR11SnormBlock : return "EAC";
|
|
|
7158 case Format::eEacR11G11UnormBlock : return "EAC";
|
|
|
7159 case Format::eEacR11G11SnormBlock : return "EAC";
|
|
|
7160 case Format::eAstc4x4UnormBlock : return "ASTC LDR";
|
|
|
7161 case Format::eAstc4x4SrgbBlock : return "ASTC LDR";
|
|
|
7162 case Format::eAstc5x4UnormBlock : return "ASTC LDR";
|
|
|
7163 case Format::eAstc5x4SrgbBlock : return "ASTC LDR";
|
|
|
7164 case Format::eAstc5x5UnormBlock : return "ASTC LDR";
|
|
|
7165 case Format::eAstc5x5SrgbBlock : return "ASTC LDR";
|
|
|
7166 case Format::eAstc6x5UnormBlock : return "ASTC LDR";
|
|
|
7167 case Format::eAstc6x5SrgbBlock : return "ASTC LDR";
|
|
|
7168 case Format::eAstc6x6UnormBlock : return "ASTC LDR";
|
|
|
7169 case Format::eAstc6x6SrgbBlock : return "ASTC LDR";
|
|
|
7170 case Format::eAstc8x5UnormBlock : return "ASTC LDR";
|
|
|
7171 case Format::eAstc8x5SrgbBlock : return "ASTC LDR";
|
|
|
7172 case Format::eAstc8x6UnormBlock : return "ASTC LDR";
|
|
|
7173 case Format::eAstc8x6SrgbBlock : return "ASTC LDR";
|
|
|
7174 case Format::eAstc8x8UnormBlock : return "ASTC LDR";
|
|
|
7175 case Format::eAstc8x8SrgbBlock : return "ASTC LDR";
|
|
|
7176 case Format::eAstc10x5UnormBlock : return "ASTC LDR";
|
|
|
7177 case Format::eAstc10x5SrgbBlock : return "ASTC LDR";
|
|
|
7178 case Format::eAstc10x6UnormBlock : return "ASTC LDR";
|
|
|
7179 case Format::eAstc10x6SrgbBlock : return "ASTC LDR";
|
|
|
7180 case Format::eAstc10x8UnormBlock : return "ASTC LDR";
|
|
|
7181 case Format::eAstc10x8SrgbBlock : return "ASTC LDR";
|
|
|
7182 case Format::eAstc10x10UnormBlock : return "ASTC LDR";
|
|
|
7183 case Format::eAstc10x10SrgbBlock : return "ASTC LDR";
|
|
|
7184 case Format::eAstc12x10UnormBlock : return "ASTC LDR";
|
|
|
7185 case Format::eAstc12x10SrgbBlock : return "ASTC LDR";
|
|
|
7186 case Format::eAstc12x12UnormBlock : return "ASTC LDR";
|
|
|
7187 case Format::eAstc12x12SrgbBlock : return "ASTC LDR";
|
|
|
7188 case Format::eAstc4x4SfloatBlock : return "ASTC HDR";
|
|
|
7189 case Format::eAstc5x4SfloatBlock : return "ASTC HDR";
|
|
|
7190 case Format::eAstc5x5SfloatBlock : return "ASTC HDR";
|
|
|
7191 case Format::eAstc6x5SfloatBlock : return "ASTC HDR";
|
|
|
7192 case Format::eAstc6x6SfloatBlock : return "ASTC HDR";
|
|
|
7193 case Format::eAstc8x5SfloatBlock : return "ASTC HDR";
|
|
|
7194 case Format::eAstc8x6SfloatBlock : return "ASTC HDR";
|
|
|
7195 case Format::eAstc8x8SfloatBlock : return "ASTC HDR";
|
|
|
7196 case Format::eAstc10x5SfloatBlock : return "ASTC HDR";
|
|
|
7197 case Format::eAstc10x6SfloatBlock : return "ASTC HDR";
|
|
|
7198 case Format::eAstc10x8SfloatBlock : return "ASTC HDR";
|
|
|
7199 case Format::eAstc10x10SfloatBlock : return "ASTC HDR";
|
|
|
7200 case Format::eAstc12x10SfloatBlock : return "ASTC HDR";
|
|
|
7201 case Format::eAstc12x12SfloatBlock : return "ASTC HDR";
|
|
|
7202 case Format::ePvrtc12BppUnormBlockIMG: return "PVRTC";
|
|
|
7203 case Format::ePvrtc14BppUnormBlockIMG: return "PVRTC";
|
|
|
7204 case Format::ePvrtc22BppUnormBlockIMG: return "PVRTC";
|
|
|
7205 case Format::ePvrtc24BppUnormBlockIMG: return "PVRTC";
|
|
|
7206 case Format::ePvrtc12BppSrgbBlockIMG : return "PVRTC";
|
|
|
7207 case Format::ePvrtc14BppSrgbBlockIMG : return "PVRTC";
|
|
|
7208 case Format::ePvrtc22BppSrgbBlockIMG : return "PVRTC";
|
|
|
7209 case Format::ePvrtc24BppSrgbBlockIMG : return "PVRTC";
|
|
|
7210
|
|
|
7211 default: return "";
|
|
|
7212 }
|
|
|
7213 }
|
|
|
7214
|
|
|
7215 // Get all formats
|
|
|
7216 VULKAN_HPP_INLINE std::vector<Format> const & getAllFormats()
|
|
|
7217 {
|
|
|
7218 static std::vector<Format> allFormats = { Format::eR4G4UnormPack8,
|
|
|
7219 Format::eR4G4B4A4UnormPack16,
|
|
|
7220 Format::eB4G4R4A4UnormPack16,
|
|
|
7221 Format::eR5G6B5UnormPack16,
|
|
|
7222 Format::eB5G6R5UnormPack16,
|
|
|
7223 Format::eR5G5B5A1UnormPack16,
|
|
|
7224 Format::eB5G5R5A1UnormPack16,
|
|
|
7225 Format::eA1R5G5B5UnormPack16,
|
|
|
7226 Format::eR8Unorm,
|
|
|
7227 Format::eR8Snorm,
|
|
|
7228 Format::eR8Uscaled,
|
|
|
7229 Format::eR8Sscaled,
|
|
|
7230 Format::eR8Uint,
|
|
|
7231 Format::eR8Sint,
|
|
|
7232 Format::eR8Srgb,
|
|
|
7233 Format::eR8G8Unorm,
|
|
|
7234 Format::eR8G8Snorm,
|
|
|
7235 Format::eR8G8Uscaled,
|
|
|
7236 Format::eR8G8Sscaled,
|
|
|
7237 Format::eR8G8Uint,
|
|
|
7238 Format::eR8G8Sint,
|
|
|
7239 Format::eR8G8Srgb,
|
|
|
7240 Format::eR8G8B8Unorm,
|
|
|
7241 Format::eR8G8B8Snorm,
|
|
|
7242 Format::eR8G8B8Uscaled,
|
|
|
7243 Format::eR8G8B8Sscaled,
|
|
|
7244 Format::eR8G8B8Uint,
|
|
|
7245 Format::eR8G8B8Sint,
|
|
|
7246 Format::eR8G8B8Srgb,
|
|
|
7247 Format::eB8G8R8Unorm,
|
|
|
7248 Format::eB8G8R8Snorm,
|
|
|
7249 Format::eB8G8R8Uscaled,
|
|
|
7250 Format::eB8G8R8Sscaled,
|
|
|
7251 Format::eB8G8R8Uint,
|
|
|
7252 Format::eB8G8R8Sint,
|
|
|
7253 Format::eB8G8R8Srgb,
|
|
|
7254 Format::eR8G8B8A8Unorm,
|
|
|
7255 Format::eR8G8B8A8Snorm,
|
|
|
7256 Format::eR8G8B8A8Uscaled,
|
|
|
7257 Format::eR8G8B8A8Sscaled,
|
|
|
7258 Format::eR8G8B8A8Uint,
|
|
|
7259 Format::eR8G8B8A8Sint,
|
|
|
7260 Format::eR8G8B8A8Srgb,
|
|
|
7261 Format::eB8G8R8A8Unorm,
|
|
|
7262 Format::eB8G8R8A8Snorm,
|
|
|
7263 Format::eB8G8R8A8Uscaled,
|
|
|
7264 Format::eB8G8R8A8Sscaled,
|
|
|
7265 Format::eB8G8R8A8Uint,
|
|
|
7266 Format::eB8G8R8A8Sint,
|
|
|
7267 Format::eB8G8R8A8Srgb,
|
|
|
7268 Format::eA8B8G8R8UnormPack32,
|
|
|
7269 Format::eA8B8G8R8SnormPack32,
|
|
|
7270 Format::eA8B8G8R8UscaledPack32,
|
|
|
7271 Format::eA8B8G8R8SscaledPack32,
|
|
|
7272 Format::eA8B8G8R8UintPack32,
|
|
|
7273 Format::eA8B8G8R8SintPack32,
|
|
|
7274 Format::eA8B8G8R8SrgbPack32,
|
|
|
7275 Format::eA2R10G10B10UnormPack32,
|
|
|
7276 Format::eA2R10G10B10SnormPack32,
|
|
|
7277 Format::eA2R10G10B10UscaledPack32,
|
|
|
7278 Format::eA2R10G10B10SscaledPack32,
|
|
|
7279 Format::eA2R10G10B10UintPack32,
|
|
|
7280 Format::eA2R10G10B10SintPack32,
|
|
|
7281 Format::eA2B10G10R10UnormPack32,
|
|
|
7282 Format::eA2B10G10R10SnormPack32,
|
|
|
7283 Format::eA2B10G10R10UscaledPack32,
|
|
|
7284 Format::eA2B10G10R10SscaledPack32,
|
|
|
7285 Format::eA2B10G10R10UintPack32,
|
|
|
7286 Format::eA2B10G10R10SintPack32,
|
|
|
7287 Format::eR16Unorm,
|
|
|
7288 Format::eR16Snorm,
|
|
|
7289 Format::eR16Uscaled,
|
|
|
7290 Format::eR16Sscaled,
|
|
|
7291 Format::eR16Uint,
|
|
|
7292 Format::eR16Sint,
|
|
|
7293 Format::eR16Sfloat,
|
|
|
7294 Format::eR16G16Unorm,
|
|
|
7295 Format::eR16G16Snorm,
|
|
|
7296 Format::eR16G16Uscaled,
|
|
|
7297 Format::eR16G16Sscaled,
|
|
|
7298 Format::eR16G16Uint,
|
|
|
7299 Format::eR16G16Sint,
|
|
|
7300 Format::eR16G16Sfloat,
|
|
|
7301 Format::eR16G16B16Unorm,
|
|
|
7302 Format::eR16G16B16Snorm,
|
|
|
7303 Format::eR16G16B16Uscaled,
|
|
|
7304 Format::eR16G16B16Sscaled,
|
|
|
7305 Format::eR16G16B16Uint,
|
|
|
7306 Format::eR16G16B16Sint,
|
|
|
7307 Format::eR16G16B16Sfloat,
|
|
|
7308 Format::eR16G16B16A16Unorm,
|
|
|
7309 Format::eR16G16B16A16Snorm,
|
|
|
7310 Format::eR16G16B16A16Uscaled,
|
|
|
7311 Format::eR16G16B16A16Sscaled,
|
|
|
7312 Format::eR16G16B16A16Uint,
|
|
|
7313 Format::eR16G16B16A16Sint,
|
|
|
7314 Format::eR16G16B16A16Sfloat,
|
|
|
7315 Format::eR32Uint,
|
|
|
7316 Format::eR32Sint,
|
|
|
7317 Format::eR32Sfloat,
|
|
|
7318 Format::eR32G32Uint,
|
|
|
7319 Format::eR32G32Sint,
|
|
|
7320 Format::eR32G32Sfloat,
|
|
|
7321 Format::eR32G32B32Uint,
|
|
|
7322 Format::eR32G32B32Sint,
|
|
|
7323 Format::eR32G32B32Sfloat,
|
|
|
7324 Format::eR32G32B32A32Uint,
|
|
|
7325 Format::eR32G32B32A32Sint,
|
|
|
7326 Format::eR32G32B32A32Sfloat,
|
|
|
7327 Format::eR64Uint,
|
|
|
7328 Format::eR64Sint,
|
|
|
7329 Format::eR64Sfloat,
|
|
|
7330 Format::eR64G64Uint,
|
|
|
7331 Format::eR64G64Sint,
|
|
|
7332 Format::eR64G64Sfloat,
|
|
|
7333 Format::eR64G64B64Uint,
|
|
|
7334 Format::eR64G64B64Sint,
|
|
|
7335 Format::eR64G64B64Sfloat,
|
|
|
7336 Format::eR64G64B64A64Uint,
|
|
|
7337 Format::eR64G64B64A64Sint,
|
|
|
7338 Format::eR64G64B64A64Sfloat,
|
|
|
7339 Format::eB10G11R11UfloatPack32,
|
|
|
7340 Format::eE5B9G9R9UfloatPack32,
|
|
|
7341 Format::eD16Unorm,
|
|
|
7342 Format::eX8D24UnormPack32,
|
|
|
7343 Format::eD32Sfloat,
|
|
|
7344 Format::eS8Uint,
|
|
|
7345 Format::eD16UnormS8Uint,
|
|
|
7346 Format::eD24UnormS8Uint,
|
|
|
7347 Format::eD32SfloatS8Uint,
|
|
|
7348 Format::eBc1RgbUnormBlock,
|
|
|
7349 Format::eBc1RgbSrgbBlock,
|
|
|
7350 Format::eBc1RgbaUnormBlock,
|
|
|
7351 Format::eBc1RgbaSrgbBlock,
|
|
|
7352 Format::eBc2UnormBlock,
|
|
|
7353 Format::eBc2SrgbBlock,
|
|
|
7354 Format::eBc3UnormBlock,
|
|
|
7355 Format::eBc3SrgbBlock,
|
|
|
7356 Format::eBc4UnormBlock,
|
|
|
7357 Format::eBc4SnormBlock,
|
|
|
7358 Format::eBc5UnormBlock,
|
|
|
7359 Format::eBc5SnormBlock,
|
|
|
7360 Format::eBc6HUfloatBlock,
|
|
|
7361 Format::eBc6HSfloatBlock,
|
|
|
7362 Format::eBc7UnormBlock,
|
|
|
7363 Format::eBc7SrgbBlock,
|
|
|
7364 Format::eEtc2R8G8B8UnormBlock,
|
|
|
7365 Format::eEtc2R8G8B8SrgbBlock,
|
|
|
7366 Format::eEtc2R8G8B8A1UnormBlock,
|
|
|
7367 Format::eEtc2R8G8B8A1SrgbBlock,
|
|
|
7368 Format::eEtc2R8G8B8A8UnormBlock,
|
|
|
7369 Format::eEtc2R8G8B8A8SrgbBlock,
|
|
|
7370 Format::eEacR11UnormBlock,
|
|
|
7371 Format::eEacR11SnormBlock,
|
|
|
7372 Format::eEacR11G11UnormBlock,
|
|
|
7373 Format::eEacR11G11SnormBlock,
|
|
|
7374 Format::eAstc4x4UnormBlock,
|
|
|
7375 Format::eAstc4x4SrgbBlock,
|
|
|
7376 Format::eAstc5x4UnormBlock,
|
|
|
7377 Format::eAstc5x4SrgbBlock,
|
|
|
7378 Format::eAstc5x5UnormBlock,
|
|
|
7379 Format::eAstc5x5SrgbBlock,
|
|
|
7380 Format::eAstc6x5UnormBlock,
|
|
|
7381 Format::eAstc6x5SrgbBlock,
|
|
|
7382 Format::eAstc6x6UnormBlock,
|
|
|
7383 Format::eAstc6x6SrgbBlock,
|
|
|
7384 Format::eAstc8x5UnormBlock,
|
|
|
7385 Format::eAstc8x5SrgbBlock,
|
|
|
7386 Format::eAstc8x6UnormBlock,
|
|
|
7387 Format::eAstc8x6SrgbBlock,
|
|
|
7388 Format::eAstc8x8UnormBlock,
|
|
|
7389 Format::eAstc8x8SrgbBlock,
|
|
|
7390 Format::eAstc10x5UnormBlock,
|
|
|
7391 Format::eAstc10x5SrgbBlock,
|
|
|
7392 Format::eAstc10x6UnormBlock,
|
|
|
7393 Format::eAstc10x6SrgbBlock,
|
|
|
7394 Format::eAstc10x8UnormBlock,
|
|
|
7395 Format::eAstc10x8SrgbBlock,
|
|
|
7396 Format::eAstc10x10UnormBlock,
|
|
|
7397 Format::eAstc10x10SrgbBlock,
|
|
|
7398 Format::eAstc12x10UnormBlock,
|
|
|
7399 Format::eAstc12x10SrgbBlock,
|
|
|
7400 Format::eAstc12x12UnormBlock,
|
|
|
7401 Format::eAstc12x12SrgbBlock,
|
|
|
7402 Format::eG8B8G8R8422Unorm,
|
|
|
7403 Format::eB8G8R8G8422Unorm,
|
|
|
7404 Format::eG8B8R83Plane420Unorm,
|
|
|
7405 Format::eG8B8R82Plane420Unorm,
|
|
|
7406 Format::eG8B8R83Plane422Unorm,
|
|
|
7407 Format::eG8B8R82Plane422Unorm,
|
|
|
7408 Format::eG8B8R83Plane444Unorm,
|
|
|
7409 Format::eR10X6UnormPack16,
|
|
|
7410 Format::eR10X6G10X6Unorm2Pack16,
|
|
|
7411 Format::eR10X6G10X6B10X6A10X6Unorm4Pack16,
|
|
|
7412 Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16,
|
|
|
7413 Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16,
|
|
|
7414 Format::eG10X6B10X6R10X63Plane420Unorm3Pack16,
|
|
|
7415 Format::eG10X6B10X6R10X62Plane420Unorm3Pack16,
|
|
|
7416 Format::eG10X6B10X6R10X63Plane422Unorm3Pack16,
|
|
|
7417 Format::eG10X6B10X6R10X62Plane422Unorm3Pack16,
|
|
|
7418 Format::eG10X6B10X6R10X63Plane444Unorm3Pack16,
|
|
|
7419 Format::eR12X4UnormPack16,
|
|
|
7420 Format::eR12X4G12X4Unorm2Pack16,
|
|
|
7421 Format::eR12X4G12X4B12X4A12X4Unorm4Pack16,
|
|
|
7422 Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16,
|
|
|
7423 Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16,
|
|
|
7424 Format::eG12X4B12X4R12X43Plane420Unorm3Pack16,
|
|
|
7425 Format::eG12X4B12X4R12X42Plane420Unorm3Pack16,
|
|
|
7426 Format::eG12X4B12X4R12X43Plane422Unorm3Pack16,
|
|
|
7427 Format::eG12X4B12X4R12X42Plane422Unorm3Pack16,
|
|
|
7428 Format::eG12X4B12X4R12X43Plane444Unorm3Pack16,
|
|
|
7429 Format::eG16B16G16R16422Unorm,
|
|
|
7430 Format::eB16G16R16G16422Unorm,
|
|
|
7431 Format::eG16B16R163Plane420Unorm,
|
|
|
7432 Format::eG16B16R162Plane420Unorm,
|
|
|
7433 Format::eG16B16R163Plane422Unorm,
|
|
|
7434 Format::eG16B16R162Plane422Unorm,
|
|
|
7435 Format::eG16B16R163Plane444Unorm,
|
|
|
7436 Format::eG8B8R82Plane444Unorm,
|
|
|
7437 Format::eG10X6B10X6R10X62Plane444Unorm3Pack16,
|
|
|
7438 Format::eG12X4B12X4R12X42Plane444Unorm3Pack16,
|
|
|
7439 Format::eG16B16R162Plane444Unorm,
|
|
|
7440 Format::eA4R4G4B4UnormPack16,
|
|
|
7441 Format::eA4B4G4R4UnormPack16,
|
|
|
7442 Format::eAstc4x4SfloatBlock,
|
|
|
7443 Format::eAstc5x4SfloatBlock,
|
|
|
7444 Format::eAstc5x5SfloatBlock,
|
|
|
7445 Format::eAstc6x5SfloatBlock,
|
|
|
7446 Format::eAstc6x6SfloatBlock,
|
|
|
7447 Format::eAstc8x5SfloatBlock,
|
|
|
7448 Format::eAstc8x6SfloatBlock,
|
|
|
7449 Format::eAstc8x8SfloatBlock,
|
|
|
7450 Format::eAstc10x5SfloatBlock,
|
|
|
7451 Format::eAstc10x6SfloatBlock,
|
|
|
7452 Format::eAstc10x8SfloatBlock,
|
|
|
7453 Format::eAstc10x10SfloatBlock,
|
|
|
7454 Format::eAstc12x10SfloatBlock,
|
|
|
7455 Format::eAstc12x12SfloatBlock,
|
|
|
7456 Format::eA1B5G5R5UnormPack16,
|
|
|
7457 Format::eA8Unorm,
|
|
|
7458 Format::ePvrtc12BppUnormBlockIMG,
|
|
|
7459 Format::ePvrtc14BppUnormBlockIMG,
|
|
|
7460 Format::ePvrtc22BppUnormBlockIMG,
|
|
|
7461 Format::ePvrtc24BppUnormBlockIMG,
|
|
|
7462 Format::ePvrtc12BppSrgbBlockIMG,
|
|
|
7463 Format::ePvrtc14BppSrgbBlockIMG,
|
|
|
7464 Format::ePvrtc22BppSrgbBlockIMG,
|
|
|
7465 Format::ePvrtc24BppSrgbBlockIMG,
|
|
|
7466 Format::eR8BoolARM,
|
|
|
7467 Format::eR16G16Sfixed5NV,
|
|
|
7468 Format::eR10X6UintPack16ARM,
|
|
|
7469 Format::eR10X6G10X6Uint2Pack16ARM,
|
|
|
7470 Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM,
|
|
|
7471 Format::eR12X4UintPack16ARM,
|
|
|
7472 Format::eR12X4G12X4Uint2Pack16ARM,
|
|
|
7473 Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM,
|
|
|
7474 Format::eR14X2UintPack16ARM,
|
|
|
7475 Format::eR14X2G14X2Uint2Pack16ARM,
|
|
|
7476 Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM,
|
|
|
7477 Format::eR14X2UnormPack16ARM,
|
|
|
7478 Format::eR14X2G14X2Unorm2Pack16ARM,
|
|
|
7479 Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM,
|
|
|
7480 Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM,
|
|
|
7481 Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM };
|
|
|
7482 return allFormats;
|
|
|
7483 }
|
|
|
7484
|
|
|
7485 // Get all formats with a color component
|
|
|
7486 VULKAN_HPP_INLINE std::vector<Format> const & getColorFormats()
|
|
|
7487 {
|
|
|
7488 static std::vector<Format> colorFormats = { Format::eR4G4UnormPack8,
|
|
|
7489 Format::eR4G4B4A4UnormPack16,
|
|
|
7490 Format::eB4G4R4A4UnormPack16,
|
|
|
7491 Format::eR5G6B5UnormPack16,
|
|
|
7492 Format::eB5G6R5UnormPack16,
|
|
|
7493 Format::eR5G5B5A1UnormPack16,
|
|
|
7494 Format::eB5G5R5A1UnormPack16,
|
|
|
7495 Format::eA1R5G5B5UnormPack16,
|
|
|
7496 Format::eR8Unorm,
|
|
|
7497 Format::eR8Snorm,
|
|
|
7498 Format::eR8Uscaled,
|
|
|
7499 Format::eR8Sscaled,
|
|
|
7500 Format::eR8Uint,
|
|
|
7501 Format::eR8Sint,
|
|
|
7502 Format::eR8Srgb,
|
|
|
7503 Format::eR8G8Unorm,
|
|
|
7504 Format::eR8G8Snorm,
|
|
|
7505 Format::eR8G8Uscaled,
|
|
|
7506 Format::eR8G8Sscaled,
|
|
|
7507 Format::eR8G8Uint,
|
|
|
7508 Format::eR8G8Sint,
|
|
|
7509 Format::eR8G8Srgb,
|
|
|
7510 Format::eR8G8B8Unorm,
|
|
|
7511 Format::eR8G8B8Snorm,
|
|
|
7512 Format::eR8G8B8Uscaled,
|
|
|
7513 Format::eR8G8B8Sscaled,
|
|
|
7514 Format::eR8G8B8Uint,
|
|
|
7515 Format::eR8G8B8Sint,
|
|
|
7516 Format::eR8G8B8Srgb,
|
|
|
7517 Format::eB8G8R8Unorm,
|
|
|
7518 Format::eB8G8R8Snorm,
|
|
|
7519 Format::eB8G8R8Uscaled,
|
|
|
7520 Format::eB8G8R8Sscaled,
|
|
|
7521 Format::eB8G8R8Uint,
|
|
|
7522 Format::eB8G8R8Sint,
|
|
|
7523 Format::eB8G8R8Srgb,
|
|
|
7524 Format::eR8G8B8A8Unorm,
|
|
|
7525 Format::eR8G8B8A8Snorm,
|
|
|
7526 Format::eR8G8B8A8Uscaled,
|
|
|
7527 Format::eR8G8B8A8Sscaled,
|
|
|
7528 Format::eR8G8B8A8Uint,
|
|
|
7529 Format::eR8G8B8A8Sint,
|
|
|
7530 Format::eR8G8B8A8Srgb,
|
|
|
7531 Format::eB8G8R8A8Unorm,
|
|
|
7532 Format::eB8G8R8A8Snorm,
|
|
|
7533 Format::eB8G8R8A8Uscaled,
|
|
|
7534 Format::eB8G8R8A8Sscaled,
|
|
|
7535 Format::eB8G8R8A8Uint,
|
|
|
7536 Format::eB8G8R8A8Sint,
|
|
|
7537 Format::eB8G8R8A8Srgb,
|
|
|
7538 Format::eA8B8G8R8UnormPack32,
|
|
|
7539 Format::eA8B8G8R8SnormPack32,
|
|
|
7540 Format::eA8B8G8R8UscaledPack32,
|
|
|
7541 Format::eA8B8G8R8SscaledPack32,
|
|
|
7542 Format::eA8B8G8R8UintPack32,
|
|
|
7543 Format::eA8B8G8R8SintPack32,
|
|
|
7544 Format::eA8B8G8R8SrgbPack32,
|
|
|
7545 Format::eA2R10G10B10UnormPack32,
|
|
|
7546 Format::eA2R10G10B10SnormPack32,
|
|
|
7547 Format::eA2R10G10B10UscaledPack32,
|
|
|
7548 Format::eA2R10G10B10SscaledPack32,
|
|
|
7549 Format::eA2R10G10B10UintPack32,
|
|
|
7550 Format::eA2R10G10B10SintPack32,
|
|
|
7551 Format::eA2B10G10R10UnormPack32,
|
|
|
7552 Format::eA2B10G10R10SnormPack32,
|
|
|
7553 Format::eA2B10G10R10UscaledPack32,
|
|
|
7554 Format::eA2B10G10R10SscaledPack32,
|
|
|
7555 Format::eA2B10G10R10UintPack32,
|
|
|
7556 Format::eA2B10G10R10SintPack32,
|
|
|
7557 Format::eR16Unorm,
|
|
|
7558 Format::eR16Snorm,
|
|
|
7559 Format::eR16Uscaled,
|
|
|
7560 Format::eR16Sscaled,
|
|
|
7561 Format::eR16Uint,
|
|
|
7562 Format::eR16Sint,
|
|
|
7563 Format::eR16Sfloat,
|
|
|
7564 Format::eR16G16Unorm,
|
|
|
7565 Format::eR16G16Snorm,
|
|
|
7566 Format::eR16G16Uscaled,
|
|
|
7567 Format::eR16G16Sscaled,
|
|
|
7568 Format::eR16G16Uint,
|
|
|
7569 Format::eR16G16Sint,
|
|
|
7570 Format::eR16G16Sfloat,
|
|
|
7571 Format::eR16G16B16Unorm,
|
|
|
7572 Format::eR16G16B16Snorm,
|
|
|
7573 Format::eR16G16B16Uscaled,
|
|
|
7574 Format::eR16G16B16Sscaled,
|
|
|
7575 Format::eR16G16B16Uint,
|
|
|
7576 Format::eR16G16B16Sint,
|
|
|
7577 Format::eR16G16B16Sfloat,
|
|
|
7578 Format::eR16G16B16A16Unorm,
|
|
|
7579 Format::eR16G16B16A16Snorm,
|
|
|
7580 Format::eR16G16B16A16Uscaled,
|
|
|
7581 Format::eR16G16B16A16Sscaled,
|
|
|
7582 Format::eR16G16B16A16Uint,
|
|
|
7583 Format::eR16G16B16A16Sint,
|
|
|
7584 Format::eR16G16B16A16Sfloat,
|
|
|
7585 Format::eR32Uint,
|
|
|
7586 Format::eR32Sint,
|
|
|
7587 Format::eR32Sfloat,
|
|
|
7588 Format::eR32G32Uint,
|
|
|
7589 Format::eR32G32Sint,
|
|
|
7590 Format::eR32G32Sfloat,
|
|
|
7591 Format::eR32G32B32Uint,
|
|
|
7592 Format::eR32G32B32Sint,
|
|
|
7593 Format::eR32G32B32Sfloat,
|
|
|
7594 Format::eR32G32B32A32Uint,
|
|
|
7595 Format::eR32G32B32A32Sint,
|
|
|
7596 Format::eR32G32B32A32Sfloat,
|
|
|
7597 Format::eR64Uint,
|
|
|
7598 Format::eR64Sint,
|
|
|
7599 Format::eR64Sfloat,
|
|
|
7600 Format::eR64G64Uint,
|
|
|
7601 Format::eR64G64Sint,
|
|
|
7602 Format::eR64G64Sfloat,
|
|
|
7603 Format::eR64G64B64Uint,
|
|
|
7604 Format::eR64G64B64Sint,
|
|
|
7605 Format::eR64G64B64Sfloat,
|
|
|
7606 Format::eR64G64B64A64Uint,
|
|
|
7607 Format::eR64G64B64A64Sint,
|
|
|
7608 Format::eR64G64B64A64Sfloat,
|
|
|
7609 Format::eB10G11R11UfloatPack32,
|
|
|
7610 Format::eE5B9G9R9UfloatPack32,
|
|
|
7611 Format::eBc1RgbUnormBlock,
|
|
|
7612 Format::eBc1RgbSrgbBlock,
|
|
|
7613 Format::eBc1RgbaUnormBlock,
|
|
|
7614 Format::eBc1RgbaSrgbBlock,
|
|
|
7615 Format::eBc2UnormBlock,
|
|
|
7616 Format::eBc2SrgbBlock,
|
|
|
7617 Format::eBc3UnormBlock,
|
|
|
7618 Format::eBc3SrgbBlock,
|
|
|
7619 Format::eBc4UnormBlock,
|
|
|
7620 Format::eBc4SnormBlock,
|
|
|
7621 Format::eBc5UnormBlock,
|
|
|
7622 Format::eBc5SnormBlock,
|
|
|
7623 Format::eBc6HUfloatBlock,
|
|
|
7624 Format::eBc6HSfloatBlock,
|
|
|
7625 Format::eBc7UnormBlock,
|
|
|
7626 Format::eBc7SrgbBlock,
|
|
|
7627 Format::eEtc2R8G8B8UnormBlock,
|
|
|
7628 Format::eEtc2R8G8B8SrgbBlock,
|
|
|
7629 Format::eEtc2R8G8B8A1UnormBlock,
|
|
|
7630 Format::eEtc2R8G8B8A1SrgbBlock,
|
|
|
7631 Format::eEtc2R8G8B8A8UnormBlock,
|
|
|
7632 Format::eEtc2R8G8B8A8SrgbBlock,
|
|
|
7633 Format::eEacR11UnormBlock,
|
|
|
7634 Format::eEacR11SnormBlock,
|
|
|
7635 Format::eEacR11G11UnormBlock,
|
|
|
7636 Format::eEacR11G11SnormBlock,
|
|
|
7637 Format::eAstc4x4UnormBlock,
|
|
|
7638 Format::eAstc4x4SrgbBlock,
|
|
|
7639 Format::eAstc5x4UnormBlock,
|
|
|
7640 Format::eAstc5x4SrgbBlock,
|
|
|
7641 Format::eAstc5x5UnormBlock,
|
|
|
7642 Format::eAstc5x5SrgbBlock,
|
|
|
7643 Format::eAstc6x5UnormBlock,
|
|
|
7644 Format::eAstc6x5SrgbBlock,
|
|
|
7645 Format::eAstc6x6UnormBlock,
|
|
|
7646 Format::eAstc6x6SrgbBlock,
|
|
|
7647 Format::eAstc8x5UnormBlock,
|
|
|
7648 Format::eAstc8x5SrgbBlock,
|
|
|
7649 Format::eAstc8x6UnormBlock,
|
|
|
7650 Format::eAstc8x6SrgbBlock,
|
|
|
7651 Format::eAstc8x8UnormBlock,
|
|
|
7652 Format::eAstc8x8SrgbBlock,
|
|
|
7653 Format::eAstc10x5UnormBlock,
|
|
|
7654 Format::eAstc10x5SrgbBlock,
|
|
|
7655 Format::eAstc10x6UnormBlock,
|
|
|
7656 Format::eAstc10x6SrgbBlock,
|
|
|
7657 Format::eAstc10x8UnormBlock,
|
|
|
7658 Format::eAstc10x8SrgbBlock,
|
|
|
7659 Format::eAstc10x10UnormBlock,
|
|
|
7660 Format::eAstc10x10SrgbBlock,
|
|
|
7661 Format::eAstc12x10UnormBlock,
|
|
|
7662 Format::eAstc12x10SrgbBlock,
|
|
|
7663 Format::eAstc12x12UnormBlock,
|
|
|
7664 Format::eAstc12x12SrgbBlock,
|
|
|
7665 Format::eG8B8G8R8422Unorm,
|
|
|
7666 Format::eB8G8R8G8422Unorm,
|
|
|
7667 Format::eG8B8R83Plane420Unorm,
|
|
|
7668 Format::eG8B8R82Plane420Unorm,
|
|
|
7669 Format::eG8B8R83Plane422Unorm,
|
|
|
7670 Format::eG8B8R82Plane422Unorm,
|
|
|
7671 Format::eG8B8R83Plane444Unorm,
|
|
|
7672 Format::eR10X6UnormPack16,
|
|
|
7673 Format::eR10X6G10X6Unorm2Pack16,
|
|
|
7674 Format::eR10X6G10X6B10X6A10X6Unorm4Pack16,
|
|
|
7675 Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16,
|
|
|
7676 Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16,
|
|
|
7677 Format::eG10X6B10X6R10X63Plane420Unorm3Pack16,
|
|
|
7678 Format::eG10X6B10X6R10X62Plane420Unorm3Pack16,
|
|
|
7679 Format::eG10X6B10X6R10X63Plane422Unorm3Pack16,
|
|
|
7680 Format::eG10X6B10X6R10X62Plane422Unorm3Pack16,
|
|
|
7681 Format::eG10X6B10X6R10X63Plane444Unorm3Pack16,
|
|
|
7682 Format::eR12X4UnormPack16,
|
|
|
7683 Format::eR12X4G12X4Unorm2Pack16,
|
|
|
7684 Format::eR12X4G12X4B12X4A12X4Unorm4Pack16,
|
|
|
7685 Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16,
|
|
|
7686 Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16,
|
|
|
7687 Format::eG12X4B12X4R12X43Plane420Unorm3Pack16,
|
|
|
7688 Format::eG12X4B12X4R12X42Plane420Unorm3Pack16,
|
|
|
7689 Format::eG12X4B12X4R12X43Plane422Unorm3Pack16,
|
|
|
7690 Format::eG12X4B12X4R12X42Plane422Unorm3Pack16,
|
|
|
7691 Format::eG12X4B12X4R12X43Plane444Unorm3Pack16,
|
|
|
7692 Format::eG16B16G16R16422Unorm,
|
|
|
7693 Format::eB16G16R16G16422Unorm,
|
|
|
7694 Format::eG16B16R163Plane420Unorm,
|
|
|
7695 Format::eG16B16R162Plane420Unorm,
|
|
|
7696 Format::eG16B16R163Plane422Unorm,
|
|
|
7697 Format::eG16B16R162Plane422Unorm,
|
|
|
7698 Format::eG16B16R163Plane444Unorm,
|
|
|
7699 Format::eG8B8R82Plane444Unorm,
|
|
|
7700 Format::eG10X6B10X6R10X62Plane444Unorm3Pack16,
|
|
|
7701 Format::eG12X4B12X4R12X42Plane444Unorm3Pack16,
|
|
|
7702 Format::eG16B16R162Plane444Unorm,
|
|
|
7703 Format::eA4R4G4B4UnormPack16,
|
|
|
7704 Format::eA4B4G4R4UnormPack16,
|
|
|
7705 Format::eAstc4x4SfloatBlock,
|
|
|
7706 Format::eAstc5x4SfloatBlock,
|
|
|
7707 Format::eAstc5x5SfloatBlock,
|
|
|
7708 Format::eAstc6x5SfloatBlock,
|
|
|
7709 Format::eAstc6x6SfloatBlock,
|
|
|
7710 Format::eAstc8x5SfloatBlock,
|
|
|
7711 Format::eAstc8x6SfloatBlock,
|
|
|
7712 Format::eAstc8x8SfloatBlock,
|
|
|
7713 Format::eAstc10x5SfloatBlock,
|
|
|
7714 Format::eAstc10x6SfloatBlock,
|
|
|
7715 Format::eAstc10x8SfloatBlock,
|
|
|
7716 Format::eAstc10x10SfloatBlock,
|
|
|
7717 Format::eAstc12x10SfloatBlock,
|
|
|
7718 Format::eAstc12x12SfloatBlock,
|
|
|
7719 Format::eA1B5G5R5UnormPack16,
|
|
|
7720 Format::eA8Unorm,
|
|
|
7721 Format::ePvrtc12BppUnormBlockIMG,
|
|
|
7722 Format::ePvrtc14BppUnormBlockIMG,
|
|
|
7723 Format::ePvrtc22BppUnormBlockIMG,
|
|
|
7724 Format::ePvrtc24BppUnormBlockIMG,
|
|
|
7725 Format::ePvrtc12BppSrgbBlockIMG,
|
|
|
7726 Format::ePvrtc14BppSrgbBlockIMG,
|
|
|
7727 Format::ePvrtc22BppSrgbBlockIMG,
|
|
|
7728 Format::ePvrtc24BppSrgbBlockIMG,
|
|
|
7729 Format::eR8BoolARM,
|
|
|
7730 Format::eR16G16Sfixed5NV,
|
|
|
7731 Format::eR10X6UintPack16ARM,
|
|
|
7732 Format::eR10X6G10X6Uint2Pack16ARM,
|
|
|
7733 Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM,
|
|
|
7734 Format::eR12X4UintPack16ARM,
|
|
|
7735 Format::eR12X4G12X4Uint2Pack16ARM,
|
|
|
7736 Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM,
|
|
|
7737 Format::eR14X2UintPack16ARM,
|
|
|
7738 Format::eR14X2G14X2Uint2Pack16ARM,
|
|
|
7739 Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM,
|
|
|
7740 Format::eR14X2UnormPack16ARM,
|
|
|
7741 Format::eR14X2G14X2Unorm2Pack16ARM,
|
|
|
7742 Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM,
|
|
|
7743 Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM,
|
|
|
7744 Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM };
|
|
|
7745 return colorFormats;
|
|
|
7746 }
|
|
|
7747
|
|
|
7748 // Get all formats with a depth component
|
|
|
7749 VULKAN_HPP_INLINE std::vector<Format> const & getDepthFormats()
|
|
|
7750 {
|
|
|
7751 static std::vector<Format> depthFormats = { Format::eD16Unorm, Format::eX8D24UnormPack32, Format::eD32Sfloat,
|
|
|
7752 Format::eD16UnormS8Uint, Format::eD24UnormS8Uint, Format::eD32SfloatS8Uint };
|
|
|
7753 return depthFormats;
|
|
|
7754 }
|
|
|
7755
|
|
|
7756 // Get all formats with a depth and a stencil component
|
|
|
7757 VULKAN_HPP_INLINE std::vector<Format> const & getDepthStencilFormats()
|
|
|
7758 {
|
|
|
7759 static std::vector<Format> depthStencilFormats = { Format::eD16UnormS8Uint, Format::eD24UnormS8Uint, Format::eD32SfloatS8Uint };
|
|
|
7760 return depthStencilFormats;
|
|
|
7761 }
|
|
|
7762
|
|
|
7763 // Get all formats with a stencil component
|
|
|
7764 VULKAN_HPP_INLINE std::vector<Format> const & getStencilFormats()
|
|
|
7765 {
|
|
|
7766 static std::vector<Format> stencilFormats = { Format::eS8Uint, Format::eD16UnormS8Uint, Format::eD24UnormS8Uint, Format::eD32SfloatS8Uint };
|
|
|
7767 return stencilFormats;
|
|
|
7768 }
|
|
|
7769
|
|
|
7770 // True, if this format has an alpha component
|
|
|
7771 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool hasAlphaComponent( Format format )
|
|
|
7772 {
|
|
|
7773 switch ( format )
|
|
|
7774 {
|
|
|
7775 case Format::eR4G4B4A4UnormPack16:
|
|
|
7776 case Format::eB4G4R4A4UnormPack16:
|
|
|
7777 case Format::eR5G5B5A1UnormPack16:
|
|
|
7778 case Format::eB5G5R5A1UnormPack16:
|
|
|
7779 case Format::eA1R5G5B5UnormPack16:
|
|
|
7780 case Format::eR8G8B8A8Unorm:
|
|
|
7781 case Format::eR8G8B8A8Snorm:
|
|
|
7782 case Format::eR8G8B8A8Uscaled:
|
|
|
7783 case Format::eR8G8B8A8Sscaled:
|
|
|
7784 case Format::eR8G8B8A8Uint:
|
|
|
7785 case Format::eR8G8B8A8Sint:
|
|
|
7786 case Format::eR8G8B8A8Srgb:
|
|
|
7787 case Format::eB8G8R8A8Unorm:
|
|
|
7788 case Format::eB8G8R8A8Snorm:
|
|
|
7789 case Format::eB8G8R8A8Uscaled:
|
|
|
7790 case Format::eB8G8R8A8Sscaled:
|
|
|
7791 case Format::eB8G8R8A8Uint:
|
|
|
7792 case Format::eB8G8R8A8Sint:
|
|
|
7793 case Format::eB8G8R8A8Srgb:
|
|
|
7794 case Format::eA8B8G8R8UnormPack32:
|
|
|
7795 case Format::eA8B8G8R8SnormPack32:
|
|
|
7796 case Format::eA8B8G8R8UscaledPack32:
|
|
|
7797 case Format::eA8B8G8R8SscaledPack32:
|
|
|
7798 case Format::eA8B8G8R8UintPack32:
|
|
|
7799 case Format::eA8B8G8R8SintPack32:
|
|
|
7800 case Format::eA8B8G8R8SrgbPack32:
|
|
|
7801 case Format::eA2R10G10B10UnormPack32:
|
|
|
7802 case Format::eA2R10G10B10SnormPack32:
|
|
|
7803 case Format::eA2R10G10B10UscaledPack32:
|
|
|
7804 case Format::eA2R10G10B10SscaledPack32:
|
|
|
7805 case Format::eA2R10G10B10UintPack32:
|
|
|
7806 case Format::eA2R10G10B10SintPack32:
|
|
|
7807 case Format::eA2B10G10R10UnormPack32:
|
|
|
7808 case Format::eA2B10G10R10SnormPack32:
|
|
|
7809 case Format::eA2B10G10R10UscaledPack32:
|
|
|
7810 case Format::eA2B10G10R10SscaledPack32:
|
|
|
7811 case Format::eA2B10G10R10UintPack32:
|
|
|
7812 case Format::eA2B10G10R10SintPack32:
|
|
|
7813 case Format::eR16G16B16A16Unorm:
|
|
|
7814 case Format::eR16G16B16A16Snorm:
|
|
|
7815 case Format::eR16G16B16A16Uscaled:
|
|
|
7816 case Format::eR16G16B16A16Sscaled:
|
|
|
7817 case Format::eR16G16B16A16Uint:
|
|
|
7818 case Format::eR16G16B16A16Sint:
|
|
|
7819 case Format::eR16G16B16A16Sfloat:
|
|
|
7820 case Format::eR32G32B32A32Uint:
|
|
|
7821 case Format::eR32G32B32A32Sint:
|
|
|
7822 case Format::eR32G32B32A32Sfloat:
|
|
|
7823 case Format::eR64G64B64A64Uint:
|
|
|
7824 case Format::eR64G64B64A64Sint:
|
|
|
7825 case Format::eR64G64B64A64Sfloat:
|
|
|
7826 case Format::eBc1RgbaUnormBlock:
|
|
|
7827 case Format::eBc1RgbaSrgbBlock:
|
|
|
7828 case Format::eBc2UnormBlock:
|
|
|
7829 case Format::eBc2SrgbBlock:
|
|
|
7830 case Format::eBc3UnormBlock:
|
|
|
7831 case Format::eBc3SrgbBlock:
|
|
|
7832 case Format::eBc7UnormBlock:
|
|
|
7833 case Format::eBc7SrgbBlock:
|
|
|
7834 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
7835 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
7836 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
7837 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
7838 case Format::eAstc4x4UnormBlock:
|
|
|
7839 case Format::eAstc4x4SrgbBlock:
|
|
|
7840 case Format::eAstc5x4UnormBlock:
|
|
|
7841 case Format::eAstc5x4SrgbBlock:
|
|
|
7842 case Format::eAstc5x5UnormBlock:
|
|
|
7843 case Format::eAstc5x5SrgbBlock:
|
|
|
7844 case Format::eAstc6x5UnormBlock:
|
|
|
7845 case Format::eAstc6x5SrgbBlock:
|
|
|
7846 case Format::eAstc6x6UnormBlock:
|
|
|
7847 case Format::eAstc6x6SrgbBlock:
|
|
|
7848 case Format::eAstc8x5UnormBlock:
|
|
|
7849 case Format::eAstc8x5SrgbBlock:
|
|
|
7850 case Format::eAstc8x6UnormBlock:
|
|
|
7851 case Format::eAstc8x6SrgbBlock:
|
|
|
7852 case Format::eAstc8x8UnormBlock:
|
|
|
7853 case Format::eAstc8x8SrgbBlock:
|
|
|
7854 case Format::eAstc10x5UnormBlock:
|
|
|
7855 case Format::eAstc10x5SrgbBlock:
|
|
|
7856 case Format::eAstc10x6UnormBlock:
|
|
|
7857 case Format::eAstc10x6SrgbBlock:
|
|
|
7858 case Format::eAstc10x8UnormBlock:
|
|
|
7859 case Format::eAstc10x8SrgbBlock:
|
|
|
7860 case Format::eAstc10x10UnormBlock:
|
|
|
7861 case Format::eAstc10x10SrgbBlock:
|
|
|
7862 case Format::eAstc12x10UnormBlock:
|
|
|
7863 case Format::eAstc12x10SrgbBlock:
|
|
|
7864 case Format::eAstc12x12UnormBlock:
|
|
|
7865 case Format::eAstc12x12SrgbBlock:
|
|
|
7866 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
7867 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
7868 case Format::eA4R4G4B4UnormPack16:
|
|
|
7869 case Format::eA4B4G4R4UnormPack16:
|
|
|
7870 case Format::eAstc4x4SfloatBlock:
|
|
|
7871 case Format::eAstc5x4SfloatBlock:
|
|
|
7872 case Format::eAstc5x5SfloatBlock:
|
|
|
7873 case Format::eAstc6x5SfloatBlock:
|
|
|
7874 case Format::eAstc6x6SfloatBlock:
|
|
|
7875 case Format::eAstc8x5SfloatBlock:
|
|
|
7876 case Format::eAstc8x6SfloatBlock:
|
|
|
7877 case Format::eAstc8x8SfloatBlock:
|
|
|
7878 case Format::eAstc10x5SfloatBlock:
|
|
|
7879 case Format::eAstc10x6SfloatBlock:
|
|
|
7880 case Format::eAstc10x8SfloatBlock:
|
|
|
7881 case Format::eAstc10x10SfloatBlock:
|
|
|
7882 case Format::eAstc12x10SfloatBlock:
|
|
|
7883 case Format::eAstc12x12SfloatBlock:
|
|
|
7884 case Format::eA1B5G5R5UnormPack16:
|
|
|
7885 case Format::eA8Unorm:
|
|
|
7886 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
7887 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
7888 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
7889 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
7890 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
7891 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
7892 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
7893 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
7894 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
7895 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
7896 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
7897 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM: return true;
|
|
|
7898 default : return false;
|
|
|
7899 }
|
|
|
7900 }
|
|
|
7901
|
|
|
7902 // True, if this format has a blue component
|
|
|
7903 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool hasBlueComponent( Format format )
|
|
|
7904 {
|
|
|
7905 switch ( format )
|
|
|
7906 {
|
|
|
7907 case Format::eR4G4B4A4UnormPack16:
|
|
|
7908 case Format::eB4G4R4A4UnormPack16:
|
|
|
7909 case Format::eR5G6B5UnormPack16:
|
|
|
7910 case Format::eB5G6R5UnormPack16:
|
|
|
7911 case Format::eR5G5B5A1UnormPack16:
|
|
|
7912 case Format::eB5G5R5A1UnormPack16:
|
|
|
7913 case Format::eA1R5G5B5UnormPack16:
|
|
|
7914 case Format::eR8G8B8Unorm:
|
|
|
7915 case Format::eR8G8B8Snorm:
|
|
|
7916 case Format::eR8G8B8Uscaled:
|
|
|
7917 case Format::eR8G8B8Sscaled:
|
|
|
7918 case Format::eR8G8B8Uint:
|
|
|
7919 case Format::eR8G8B8Sint:
|
|
|
7920 case Format::eR8G8B8Srgb:
|
|
|
7921 case Format::eB8G8R8Unorm:
|
|
|
7922 case Format::eB8G8R8Snorm:
|
|
|
7923 case Format::eB8G8R8Uscaled:
|
|
|
7924 case Format::eB8G8R8Sscaled:
|
|
|
7925 case Format::eB8G8R8Uint:
|
|
|
7926 case Format::eB8G8R8Sint:
|
|
|
7927 case Format::eB8G8R8Srgb:
|
|
|
7928 case Format::eR8G8B8A8Unorm:
|
|
|
7929 case Format::eR8G8B8A8Snorm:
|
|
|
7930 case Format::eR8G8B8A8Uscaled:
|
|
|
7931 case Format::eR8G8B8A8Sscaled:
|
|
|
7932 case Format::eR8G8B8A8Uint:
|
|
|
7933 case Format::eR8G8B8A8Sint:
|
|
|
7934 case Format::eR8G8B8A8Srgb:
|
|
|
7935 case Format::eB8G8R8A8Unorm:
|
|
|
7936 case Format::eB8G8R8A8Snorm:
|
|
|
7937 case Format::eB8G8R8A8Uscaled:
|
|
|
7938 case Format::eB8G8R8A8Sscaled:
|
|
|
7939 case Format::eB8G8R8A8Uint:
|
|
|
7940 case Format::eB8G8R8A8Sint:
|
|
|
7941 case Format::eB8G8R8A8Srgb:
|
|
|
7942 case Format::eA8B8G8R8UnormPack32:
|
|
|
7943 case Format::eA8B8G8R8SnormPack32:
|
|
|
7944 case Format::eA8B8G8R8UscaledPack32:
|
|
|
7945 case Format::eA8B8G8R8SscaledPack32:
|
|
|
7946 case Format::eA8B8G8R8UintPack32:
|
|
|
7947 case Format::eA8B8G8R8SintPack32:
|
|
|
7948 case Format::eA8B8G8R8SrgbPack32:
|
|
|
7949 case Format::eA2R10G10B10UnormPack32:
|
|
|
7950 case Format::eA2R10G10B10SnormPack32:
|
|
|
7951 case Format::eA2R10G10B10UscaledPack32:
|
|
|
7952 case Format::eA2R10G10B10SscaledPack32:
|
|
|
7953 case Format::eA2R10G10B10UintPack32:
|
|
|
7954 case Format::eA2R10G10B10SintPack32:
|
|
|
7955 case Format::eA2B10G10R10UnormPack32:
|
|
|
7956 case Format::eA2B10G10R10SnormPack32:
|
|
|
7957 case Format::eA2B10G10R10UscaledPack32:
|
|
|
7958 case Format::eA2B10G10R10SscaledPack32:
|
|
|
7959 case Format::eA2B10G10R10UintPack32:
|
|
|
7960 case Format::eA2B10G10R10SintPack32:
|
|
|
7961 case Format::eR16G16B16Unorm:
|
|
|
7962 case Format::eR16G16B16Snorm:
|
|
|
7963 case Format::eR16G16B16Uscaled:
|
|
|
7964 case Format::eR16G16B16Sscaled:
|
|
|
7965 case Format::eR16G16B16Uint:
|
|
|
7966 case Format::eR16G16B16Sint:
|
|
|
7967 case Format::eR16G16B16Sfloat:
|
|
|
7968 case Format::eR16G16B16A16Unorm:
|
|
|
7969 case Format::eR16G16B16A16Snorm:
|
|
|
7970 case Format::eR16G16B16A16Uscaled:
|
|
|
7971 case Format::eR16G16B16A16Sscaled:
|
|
|
7972 case Format::eR16G16B16A16Uint:
|
|
|
7973 case Format::eR16G16B16A16Sint:
|
|
|
7974 case Format::eR16G16B16A16Sfloat:
|
|
|
7975 case Format::eR32G32B32Uint:
|
|
|
7976 case Format::eR32G32B32Sint:
|
|
|
7977 case Format::eR32G32B32Sfloat:
|
|
|
7978 case Format::eR32G32B32A32Uint:
|
|
|
7979 case Format::eR32G32B32A32Sint:
|
|
|
7980 case Format::eR32G32B32A32Sfloat:
|
|
|
7981 case Format::eR64G64B64Uint:
|
|
|
7982 case Format::eR64G64B64Sint:
|
|
|
7983 case Format::eR64G64B64Sfloat:
|
|
|
7984 case Format::eR64G64B64A64Uint:
|
|
|
7985 case Format::eR64G64B64A64Sint:
|
|
|
7986 case Format::eR64G64B64A64Sfloat:
|
|
|
7987 case Format::eB10G11R11UfloatPack32:
|
|
|
7988 case Format::eE5B9G9R9UfloatPack32:
|
|
|
7989 case Format::eBc1RgbUnormBlock:
|
|
|
7990 case Format::eBc1RgbSrgbBlock:
|
|
|
7991 case Format::eBc1RgbaUnormBlock:
|
|
|
7992 case Format::eBc1RgbaSrgbBlock:
|
|
|
7993 case Format::eBc2UnormBlock:
|
|
|
7994 case Format::eBc2SrgbBlock:
|
|
|
7995 case Format::eBc3UnormBlock:
|
|
|
7996 case Format::eBc3SrgbBlock:
|
|
|
7997 case Format::eBc6HUfloatBlock:
|
|
|
7998 case Format::eBc6HSfloatBlock:
|
|
|
7999 case Format::eBc7UnormBlock:
|
|
|
8000 case Format::eBc7SrgbBlock:
|
|
|
8001 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
8002 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
8003 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
8004 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
8005 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
8006 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
8007 case Format::eAstc4x4UnormBlock:
|
|
|
8008 case Format::eAstc4x4SrgbBlock:
|
|
|
8009 case Format::eAstc5x4UnormBlock:
|
|
|
8010 case Format::eAstc5x4SrgbBlock:
|
|
|
8011 case Format::eAstc5x5UnormBlock:
|
|
|
8012 case Format::eAstc5x5SrgbBlock:
|
|
|
8013 case Format::eAstc6x5UnormBlock:
|
|
|
8014 case Format::eAstc6x5SrgbBlock:
|
|
|
8015 case Format::eAstc6x6UnormBlock:
|
|
|
8016 case Format::eAstc6x6SrgbBlock:
|
|
|
8017 case Format::eAstc8x5UnormBlock:
|
|
|
8018 case Format::eAstc8x5SrgbBlock:
|
|
|
8019 case Format::eAstc8x6UnormBlock:
|
|
|
8020 case Format::eAstc8x6SrgbBlock:
|
|
|
8021 case Format::eAstc8x8UnormBlock:
|
|
|
8022 case Format::eAstc8x8SrgbBlock:
|
|
|
8023 case Format::eAstc10x5UnormBlock:
|
|
|
8024 case Format::eAstc10x5SrgbBlock:
|
|
|
8025 case Format::eAstc10x6UnormBlock:
|
|
|
8026 case Format::eAstc10x6SrgbBlock:
|
|
|
8027 case Format::eAstc10x8UnormBlock:
|
|
|
8028 case Format::eAstc10x8SrgbBlock:
|
|
|
8029 case Format::eAstc10x10UnormBlock:
|
|
|
8030 case Format::eAstc10x10SrgbBlock:
|
|
|
8031 case Format::eAstc12x10UnormBlock:
|
|
|
8032 case Format::eAstc12x10SrgbBlock:
|
|
|
8033 case Format::eAstc12x12UnormBlock:
|
|
|
8034 case Format::eAstc12x12SrgbBlock:
|
|
|
8035 case Format::eG8B8G8R8422Unorm:
|
|
|
8036 case Format::eB8G8R8G8422Unorm:
|
|
|
8037 case Format::eG8B8R83Plane420Unorm:
|
|
|
8038 case Format::eG8B8R82Plane420Unorm:
|
|
|
8039 case Format::eG8B8R83Plane422Unorm:
|
|
|
8040 case Format::eG8B8R82Plane422Unorm:
|
|
|
8041 case Format::eG8B8R83Plane444Unorm:
|
|
|
8042 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
8043 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
8044 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
8045 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
8046 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
8047 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
8048 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
8049 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
8050 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
8051 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
8052 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
8053 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
8054 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
8055 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
8056 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
8057 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
8058 case Format::eG16B16G16R16422Unorm:
|
|
|
8059 case Format::eB16G16R16G16422Unorm:
|
|
|
8060 case Format::eG16B16R163Plane420Unorm:
|
|
|
8061 case Format::eG16B16R162Plane420Unorm:
|
|
|
8062 case Format::eG16B16R163Plane422Unorm:
|
|
|
8063 case Format::eG16B16R162Plane422Unorm:
|
|
|
8064 case Format::eG16B16R163Plane444Unorm:
|
|
|
8065 case Format::eG8B8R82Plane444Unorm:
|
|
|
8066 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
8067 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
8068 case Format::eG16B16R162Plane444Unorm:
|
|
|
8069 case Format::eA4R4G4B4UnormPack16:
|
|
|
8070 case Format::eA4B4G4R4UnormPack16:
|
|
|
8071 case Format::eAstc4x4SfloatBlock:
|
|
|
8072 case Format::eAstc5x4SfloatBlock:
|
|
|
8073 case Format::eAstc5x5SfloatBlock:
|
|
|
8074 case Format::eAstc6x5SfloatBlock:
|
|
|
8075 case Format::eAstc6x6SfloatBlock:
|
|
|
8076 case Format::eAstc8x5SfloatBlock:
|
|
|
8077 case Format::eAstc8x6SfloatBlock:
|
|
|
8078 case Format::eAstc8x8SfloatBlock:
|
|
|
8079 case Format::eAstc10x5SfloatBlock:
|
|
|
8080 case Format::eAstc10x6SfloatBlock:
|
|
|
8081 case Format::eAstc10x8SfloatBlock:
|
|
|
8082 case Format::eAstc10x10SfloatBlock:
|
|
|
8083 case Format::eAstc12x10SfloatBlock:
|
|
|
8084 case Format::eAstc12x12SfloatBlock:
|
|
|
8085 case Format::eA1B5G5R5UnormPack16:
|
|
|
8086 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
8087 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
8088 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
8089 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
8090 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
8091 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
8092 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
8093 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
8094 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
8095 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
8096 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
8097 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
8098 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
8099 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return true;
|
|
|
8100 default : return false;
|
|
|
8101 }
|
|
|
8102 }
|
|
|
8103
|
|
|
8104 // True, if this format has a depth component
|
|
|
8105 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool hasDepthComponent( Format format )
|
|
|
8106 {
|
|
|
8107 switch ( format )
|
|
|
8108 {
|
|
|
8109 case Format::eD16Unorm:
|
|
|
8110 case Format::eX8D24UnormPack32:
|
|
|
8111 case Format::eD32Sfloat:
|
|
|
8112 case Format::eD16UnormS8Uint:
|
|
|
8113 case Format::eD24UnormS8Uint:
|
|
|
8114 case Format::eD32SfloatS8Uint : return true;
|
|
|
8115 default : return false;
|
|
|
8116 }
|
|
|
8117 }
|
|
|
8118
|
|
|
8119 // True, if this format has a green component
|
|
|
8120 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool hasGreenComponent( Format format )
|
|
|
8121 {
|
|
|
8122 switch ( format )
|
|
|
8123 {
|
|
|
8124 case Format::eR4G4UnormPack8:
|
|
|
8125 case Format::eR4G4B4A4UnormPack16:
|
|
|
8126 case Format::eB4G4R4A4UnormPack16:
|
|
|
8127 case Format::eR5G6B5UnormPack16:
|
|
|
8128 case Format::eB5G6R5UnormPack16:
|
|
|
8129 case Format::eR5G5B5A1UnormPack16:
|
|
|
8130 case Format::eB5G5R5A1UnormPack16:
|
|
|
8131 case Format::eA1R5G5B5UnormPack16:
|
|
|
8132 case Format::eR8G8Unorm:
|
|
|
8133 case Format::eR8G8Snorm:
|
|
|
8134 case Format::eR8G8Uscaled:
|
|
|
8135 case Format::eR8G8Sscaled:
|
|
|
8136 case Format::eR8G8Uint:
|
|
|
8137 case Format::eR8G8Sint:
|
|
|
8138 case Format::eR8G8Srgb:
|
|
|
8139 case Format::eR8G8B8Unorm:
|
|
|
8140 case Format::eR8G8B8Snorm:
|
|
|
8141 case Format::eR8G8B8Uscaled:
|
|
|
8142 case Format::eR8G8B8Sscaled:
|
|
|
8143 case Format::eR8G8B8Uint:
|
|
|
8144 case Format::eR8G8B8Sint:
|
|
|
8145 case Format::eR8G8B8Srgb:
|
|
|
8146 case Format::eB8G8R8Unorm:
|
|
|
8147 case Format::eB8G8R8Snorm:
|
|
|
8148 case Format::eB8G8R8Uscaled:
|
|
|
8149 case Format::eB8G8R8Sscaled:
|
|
|
8150 case Format::eB8G8R8Uint:
|
|
|
8151 case Format::eB8G8R8Sint:
|
|
|
8152 case Format::eB8G8R8Srgb:
|
|
|
8153 case Format::eR8G8B8A8Unorm:
|
|
|
8154 case Format::eR8G8B8A8Snorm:
|
|
|
8155 case Format::eR8G8B8A8Uscaled:
|
|
|
8156 case Format::eR8G8B8A8Sscaled:
|
|
|
8157 case Format::eR8G8B8A8Uint:
|
|
|
8158 case Format::eR8G8B8A8Sint:
|
|
|
8159 case Format::eR8G8B8A8Srgb:
|
|
|
8160 case Format::eB8G8R8A8Unorm:
|
|
|
8161 case Format::eB8G8R8A8Snorm:
|
|
|
8162 case Format::eB8G8R8A8Uscaled:
|
|
|
8163 case Format::eB8G8R8A8Sscaled:
|
|
|
8164 case Format::eB8G8R8A8Uint:
|
|
|
8165 case Format::eB8G8R8A8Sint:
|
|
|
8166 case Format::eB8G8R8A8Srgb:
|
|
|
8167 case Format::eA8B8G8R8UnormPack32:
|
|
|
8168 case Format::eA8B8G8R8SnormPack32:
|
|
|
8169 case Format::eA8B8G8R8UscaledPack32:
|
|
|
8170 case Format::eA8B8G8R8SscaledPack32:
|
|
|
8171 case Format::eA8B8G8R8UintPack32:
|
|
|
8172 case Format::eA8B8G8R8SintPack32:
|
|
|
8173 case Format::eA8B8G8R8SrgbPack32:
|
|
|
8174 case Format::eA2R10G10B10UnormPack32:
|
|
|
8175 case Format::eA2R10G10B10SnormPack32:
|
|
|
8176 case Format::eA2R10G10B10UscaledPack32:
|
|
|
8177 case Format::eA2R10G10B10SscaledPack32:
|
|
|
8178 case Format::eA2R10G10B10UintPack32:
|
|
|
8179 case Format::eA2R10G10B10SintPack32:
|
|
|
8180 case Format::eA2B10G10R10UnormPack32:
|
|
|
8181 case Format::eA2B10G10R10SnormPack32:
|
|
|
8182 case Format::eA2B10G10R10UscaledPack32:
|
|
|
8183 case Format::eA2B10G10R10SscaledPack32:
|
|
|
8184 case Format::eA2B10G10R10UintPack32:
|
|
|
8185 case Format::eA2B10G10R10SintPack32:
|
|
|
8186 case Format::eR16G16Unorm:
|
|
|
8187 case Format::eR16G16Snorm:
|
|
|
8188 case Format::eR16G16Uscaled:
|
|
|
8189 case Format::eR16G16Sscaled:
|
|
|
8190 case Format::eR16G16Uint:
|
|
|
8191 case Format::eR16G16Sint:
|
|
|
8192 case Format::eR16G16Sfloat:
|
|
|
8193 case Format::eR16G16B16Unorm:
|
|
|
8194 case Format::eR16G16B16Snorm:
|
|
|
8195 case Format::eR16G16B16Uscaled:
|
|
|
8196 case Format::eR16G16B16Sscaled:
|
|
|
8197 case Format::eR16G16B16Uint:
|
|
|
8198 case Format::eR16G16B16Sint:
|
|
|
8199 case Format::eR16G16B16Sfloat:
|
|
|
8200 case Format::eR16G16B16A16Unorm:
|
|
|
8201 case Format::eR16G16B16A16Snorm:
|
|
|
8202 case Format::eR16G16B16A16Uscaled:
|
|
|
8203 case Format::eR16G16B16A16Sscaled:
|
|
|
8204 case Format::eR16G16B16A16Uint:
|
|
|
8205 case Format::eR16G16B16A16Sint:
|
|
|
8206 case Format::eR16G16B16A16Sfloat:
|
|
|
8207 case Format::eR32G32Uint:
|
|
|
8208 case Format::eR32G32Sint:
|
|
|
8209 case Format::eR32G32Sfloat:
|
|
|
8210 case Format::eR32G32B32Uint:
|
|
|
8211 case Format::eR32G32B32Sint:
|
|
|
8212 case Format::eR32G32B32Sfloat:
|
|
|
8213 case Format::eR32G32B32A32Uint:
|
|
|
8214 case Format::eR32G32B32A32Sint:
|
|
|
8215 case Format::eR32G32B32A32Sfloat:
|
|
|
8216 case Format::eR64G64Uint:
|
|
|
8217 case Format::eR64G64Sint:
|
|
|
8218 case Format::eR64G64Sfloat:
|
|
|
8219 case Format::eR64G64B64Uint:
|
|
|
8220 case Format::eR64G64B64Sint:
|
|
|
8221 case Format::eR64G64B64Sfloat:
|
|
|
8222 case Format::eR64G64B64A64Uint:
|
|
|
8223 case Format::eR64G64B64A64Sint:
|
|
|
8224 case Format::eR64G64B64A64Sfloat:
|
|
|
8225 case Format::eB10G11R11UfloatPack32:
|
|
|
8226 case Format::eE5B9G9R9UfloatPack32:
|
|
|
8227 case Format::eBc1RgbUnormBlock:
|
|
|
8228 case Format::eBc1RgbSrgbBlock:
|
|
|
8229 case Format::eBc1RgbaUnormBlock:
|
|
|
8230 case Format::eBc1RgbaSrgbBlock:
|
|
|
8231 case Format::eBc2UnormBlock:
|
|
|
8232 case Format::eBc2SrgbBlock:
|
|
|
8233 case Format::eBc3UnormBlock:
|
|
|
8234 case Format::eBc3SrgbBlock:
|
|
|
8235 case Format::eBc5UnormBlock:
|
|
|
8236 case Format::eBc5SnormBlock:
|
|
|
8237 case Format::eBc6HUfloatBlock:
|
|
|
8238 case Format::eBc6HSfloatBlock:
|
|
|
8239 case Format::eBc7UnormBlock:
|
|
|
8240 case Format::eBc7SrgbBlock:
|
|
|
8241 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
8242 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
8243 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
8244 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
8245 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
8246 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
8247 case Format::eEacR11G11UnormBlock:
|
|
|
8248 case Format::eEacR11G11SnormBlock:
|
|
|
8249 case Format::eAstc4x4UnormBlock:
|
|
|
8250 case Format::eAstc4x4SrgbBlock:
|
|
|
8251 case Format::eAstc5x4UnormBlock:
|
|
|
8252 case Format::eAstc5x4SrgbBlock:
|
|
|
8253 case Format::eAstc5x5UnormBlock:
|
|
|
8254 case Format::eAstc5x5SrgbBlock:
|
|
|
8255 case Format::eAstc6x5UnormBlock:
|
|
|
8256 case Format::eAstc6x5SrgbBlock:
|
|
|
8257 case Format::eAstc6x6UnormBlock:
|
|
|
8258 case Format::eAstc6x6SrgbBlock:
|
|
|
8259 case Format::eAstc8x5UnormBlock:
|
|
|
8260 case Format::eAstc8x5SrgbBlock:
|
|
|
8261 case Format::eAstc8x6UnormBlock:
|
|
|
8262 case Format::eAstc8x6SrgbBlock:
|
|
|
8263 case Format::eAstc8x8UnormBlock:
|
|
|
8264 case Format::eAstc8x8SrgbBlock:
|
|
|
8265 case Format::eAstc10x5UnormBlock:
|
|
|
8266 case Format::eAstc10x5SrgbBlock:
|
|
|
8267 case Format::eAstc10x6UnormBlock:
|
|
|
8268 case Format::eAstc10x6SrgbBlock:
|
|
|
8269 case Format::eAstc10x8UnormBlock:
|
|
|
8270 case Format::eAstc10x8SrgbBlock:
|
|
|
8271 case Format::eAstc10x10UnormBlock:
|
|
|
8272 case Format::eAstc10x10SrgbBlock:
|
|
|
8273 case Format::eAstc12x10UnormBlock:
|
|
|
8274 case Format::eAstc12x10SrgbBlock:
|
|
|
8275 case Format::eAstc12x12UnormBlock:
|
|
|
8276 case Format::eAstc12x12SrgbBlock:
|
|
|
8277 case Format::eG8B8G8R8422Unorm:
|
|
|
8278 case Format::eB8G8R8G8422Unorm:
|
|
|
8279 case Format::eG8B8R83Plane420Unorm:
|
|
|
8280 case Format::eG8B8R82Plane420Unorm:
|
|
|
8281 case Format::eG8B8R83Plane422Unorm:
|
|
|
8282 case Format::eG8B8R82Plane422Unorm:
|
|
|
8283 case Format::eG8B8R83Plane444Unorm:
|
|
|
8284 case Format::eR10X6G10X6Unorm2Pack16:
|
|
|
8285 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
8286 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
8287 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
8288 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
8289 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
8290 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
8291 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
8292 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
8293 case Format::eR12X4G12X4Unorm2Pack16:
|
|
|
8294 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
8295 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
8296 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
8297 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
8298 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
8299 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
8300 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
8301 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
8302 case Format::eG16B16G16R16422Unorm:
|
|
|
8303 case Format::eB16G16R16G16422Unorm:
|
|
|
8304 case Format::eG16B16R163Plane420Unorm:
|
|
|
8305 case Format::eG16B16R162Plane420Unorm:
|
|
|
8306 case Format::eG16B16R163Plane422Unorm:
|
|
|
8307 case Format::eG16B16R162Plane422Unorm:
|
|
|
8308 case Format::eG16B16R163Plane444Unorm:
|
|
|
8309 case Format::eG8B8R82Plane444Unorm:
|
|
|
8310 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
8311 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
8312 case Format::eG16B16R162Plane444Unorm:
|
|
|
8313 case Format::eA4R4G4B4UnormPack16:
|
|
|
8314 case Format::eA4B4G4R4UnormPack16:
|
|
|
8315 case Format::eAstc4x4SfloatBlock:
|
|
|
8316 case Format::eAstc5x4SfloatBlock:
|
|
|
8317 case Format::eAstc5x5SfloatBlock:
|
|
|
8318 case Format::eAstc6x5SfloatBlock:
|
|
|
8319 case Format::eAstc6x6SfloatBlock:
|
|
|
8320 case Format::eAstc8x5SfloatBlock:
|
|
|
8321 case Format::eAstc8x6SfloatBlock:
|
|
|
8322 case Format::eAstc8x8SfloatBlock:
|
|
|
8323 case Format::eAstc10x5SfloatBlock:
|
|
|
8324 case Format::eAstc10x6SfloatBlock:
|
|
|
8325 case Format::eAstc10x8SfloatBlock:
|
|
|
8326 case Format::eAstc10x10SfloatBlock:
|
|
|
8327 case Format::eAstc12x10SfloatBlock:
|
|
|
8328 case Format::eAstc12x12SfloatBlock:
|
|
|
8329 case Format::eA1B5G5R5UnormPack16:
|
|
|
8330 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
8331 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
8332 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
8333 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
8334 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
8335 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
8336 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
8337 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
8338 case Format::eR16G16Sfixed5NV:
|
|
|
8339 case Format::eR10X6G10X6Uint2Pack16ARM:
|
|
|
8340 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
8341 case Format::eR12X4G12X4Uint2Pack16ARM:
|
|
|
8342 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
8343 case Format::eR14X2G14X2Uint2Pack16ARM:
|
|
|
8344 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
8345 case Format::eR14X2G14X2Unorm2Pack16ARM:
|
|
|
8346 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
8347 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
8348 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return true;
|
|
|
8349 default : return false;
|
|
|
8350 }
|
|
|
8351 }
|
|
|
8352
|
|
|
8353 // True, if this format has a red component
|
|
|
8354 VULKAN_HPP_CONSTEXPR_14 bool hasRedComponent( Format format )
|
|
|
8355 {
|
|
|
8356 switch ( format )
|
|
|
8357 {
|
|
|
8358 case Format::eR4G4UnormPack8:
|
|
|
8359 case Format::eR4G4B4A4UnormPack16:
|
|
|
8360 case Format::eB4G4R4A4UnormPack16:
|
|
|
8361 case Format::eR5G6B5UnormPack16:
|
|
|
8362 case Format::eB5G6R5UnormPack16:
|
|
|
8363 case Format::eR5G5B5A1UnormPack16:
|
|
|
8364 case Format::eB5G5R5A1UnormPack16:
|
|
|
8365 case Format::eA1R5G5B5UnormPack16:
|
|
|
8366 case Format::eR8Unorm:
|
|
|
8367 case Format::eR8Snorm:
|
|
|
8368 case Format::eR8Uscaled:
|
|
|
8369 case Format::eR8Sscaled:
|
|
|
8370 case Format::eR8Uint:
|
|
|
8371 case Format::eR8Sint:
|
|
|
8372 case Format::eR8Srgb:
|
|
|
8373 case Format::eR8G8Unorm:
|
|
|
8374 case Format::eR8G8Snorm:
|
|
|
8375 case Format::eR8G8Uscaled:
|
|
|
8376 case Format::eR8G8Sscaled:
|
|
|
8377 case Format::eR8G8Uint:
|
|
|
8378 case Format::eR8G8Sint:
|
|
|
8379 case Format::eR8G8Srgb:
|
|
|
8380 case Format::eR8G8B8Unorm:
|
|
|
8381 case Format::eR8G8B8Snorm:
|
|
|
8382 case Format::eR8G8B8Uscaled:
|
|
|
8383 case Format::eR8G8B8Sscaled:
|
|
|
8384 case Format::eR8G8B8Uint:
|
|
|
8385 case Format::eR8G8B8Sint:
|
|
|
8386 case Format::eR8G8B8Srgb:
|
|
|
8387 case Format::eB8G8R8Unorm:
|
|
|
8388 case Format::eB8G8R8Snorm:
|
|
|
8389 case Format::eB8G8R8Uscaled:
|
|
|
8390 case Format::eB8G8R8Sscaled:
|
|
|
8391 case Format::eB8G8R8Uint:
|
|
|
8392 case Format::eB8G8R8Sint:
|
|
|
8393 case Format::eB8G8R8Srgb:
|
|
|
8394 case Format::eR8G8B8A8Unorm:
|
|
|
8395 case Format::eR8G8B8A8Snorm:
|
|
|
8396 case Format::eR8G8B8A8Uscaled:
|
|
|
8397 case Format::eR8G8B8A8Sscaled:
|
|
|
8398 case Format::eR8G8B8A8Uint:
|
|
|
8399 case Format::eR8G8B8A8Sint:
|
|
|
8400 case Format::eR8G8B8A8Srgb:
|
|
|
8401 case Format::eB8G8R8A8Unorm:
|
|
|
8402 case Format::eB8G8R8A8Snorm:
|
|
|
8403 case Format::eB8G8R8A8Uscaled:
|
|
|
8404 case Format::eB8G8R8A8Sscaled:
|
|
|
8405 case Format::eB8G8R8A8Uint:
|
|
|
8406 case Format::eB8G8R8A8Sint:
|
|
|
8407 case Format::eB8G8R8A8Srgb:
|
|
|
8408 case Format::eA8B8G8R8UnormPack32:
|
|
|
8409 case Format::eA8B8G8R8SnormPack32:
|
|
|
8410 case Format::eA8B8G8R8UscaledPack32:
|
|
|
8411 case Format::eA8B8G8R8SscaledPack32:
|
|
|
8412 case Format::eA8B8G8R8UintPack32:
|
|
|
8413 case Format::eA8B8G8R8SintPack32:
|
|
|
8414 case Format::eA8B8G8R8SrgbPack32:
|
|
|
8415 case Format::eA2R10G10B10UnormPack32:
|
|
|
8416 case Format::eA2R10G10B10SnormPack32:
|
|
|
8417 case Format::eA2R10G10B10UscaledPack32:
|
|
|
8418 case Format::eA2R10G10B10SscaledPack32:
|
|
|
8419 case Format::eA2R10G10B10UintPack32:
|
|
|
8420 case Format::eA2R10G10B10SintPack32:
|
|
|
8421 case Format::eA2B10G10R10UnormPack32:
|
|
|
8422 case Format::eA2B10G10R10SnormPack32:
|
|
|
8423 case Format::eA2B10G10R10UscaledPack32:
|
|
|
8424 case Format::eA2B10G10R10SscaledPack32:
|
|
|
8425 case Format::eA2B10G10R10UintPack32:
|
|
|
8426 case Format::eA2B10G10R10SintPack32:
|
|
|
8427 case Format::eR16Unorm:
|
|
|
8428 case Format::eR16Snorm:
|
|
|
8429 case Format::eR16Uscaled:
|
|
|
8430 case Format::eR16Sscaled:
|
|
|
8431 case Format::eR16Uint:
|
|
|
8432 case Format::eR16Sint:
|
|
|
8433 case Format::eR16Sfloat:
|
|
|
8434 case Format::eR16G16Unorm:
|
|
|
8435 case Format::eR16G16Snorm:
|
|
|
8436 case Format::eR16G16Uscaled:
|
|
|
8437 case Format::eR16G16Sscaled:
|
|
|
8438 case Format::eR16G16Uint:
|
|
|
8439 case Format::eR16G16Sint:
|
|
|
8440 case Format::eR16G16Sfloat:
|
|
|
8441 case Format::eR16G16B16Unorm:
|
|
|
8442 case Format::eR16G16B16Snorm:
|
|
|
8443 case Format::eR16G16B16Uscaled:
|
|
|
8444 case Format::eR16G16B16Sscaled:
|
|
|
8445 case Format::eR16G16B16Uint:
|
|
|
8446 case Format::eR16G16B16Sint:
|
|
|
8447 case Format::eR16G16B16Sfloat:
|
|
|
8448 case Format::eR16G16B16A16Unorm:
|
|
|
8449 case Format::eR16G16B16A16Snorm:
|
|
|
8450 case Format::eR16G16B16A16Uscaled:
|
|
|
8451 case Format::eR16G16B16A16Sscaled:
|
|
|
8452 case Format::eR16G16B16A16Uint:
|
|
|
8453 case Format::eR16G16B16A16Sint:
|
|
|
8454 case Format::eR16G16B16A16Sfloat:
|
|
|
8455 case Format::eR32Uint:
|
|
|
8456 case Format::eR32Sint:
|
|
|
8457 case Format::eR32Sfloat:
|
|
|
8458 case Format::eR32G32Uint:
|
|
|
8459 case Format::eR32G32Sint:
|
|
|
8460 case Format::eR32G32Sfloat:
|
|
|
8461 case Format::eR32G32B32Uint:
|
|
|
8462 case Format::eR32G32B32Sint:
|
|
|
8463 case Format::eR32G32B32Sfloat:
|
|
|
8464 case Format::eR32G32B32A32Uint:
|
|
|
8465 case Format::eR32G32B32A32Sint:
|
|
|
8466 case Format::eR32G32B32A32Sfloat:
|
|
|
8467 case Format::eR64Uint:
|
|
|
8468 case Format::eR64Sint:
|
|
|
8469 case Format::eR64Sfloat:
|
|
|
8470 case Format::eR64G64Uint:
|
|
|
8471 case Format::eR64G64Sint:
|
|
|
8472 case Format::eR64G64Sfloat:
|
|
|
8473 case Format::eR64G64B64Uint:
|
|
|
8474 case Format::eR64G64B64Sint:
|
|
|
8475 case Format::eR64G64B64Sfloat:
|
|
|
8476 case Format::eR64G64B64A64Uint:
|
|
|
8477 case Format::eR64G64B64A64Sint:
|
|
|
8478 case Format::eR64G64B64A64Sfloat:
|
|
|
8479 case Format::eB10G11R11UfloatPack32:
|
|
|
8480 case Format::eE5B9G9R9UfloatPack32:
|
|
|
8481 case Format::eBc1RgbUnormBlock:
|
|
|
8482 case Format::eBc1RgbSrgbBlock:
|
|
|
8483 case Format::eBc1RgbaUnormBlock:
|
|
|
8484 case Format::eBc1RgbaSrgbBlock:
|
|
|
8485 case Format::eBc2UnormBlock:
|
|
|
8486 case Format::eBc2SrgbBlock:
|
|
|
8487 case Format::eBc3UnormBlock:
|
|
|
8488 case Format::eBc3SrgbBlock:
|
|
|
8489 case Format::eBc4UnormBlock:
|
|
|
8490 case Format::eBc4SnormBlock:
|
|
|
8491 case Format::eBc5UnormBlock:
|
|
|
8492 case Format::eBc5SnormBlock:
|
|
|
8493 case Format::eBc6HUfloatBlock:
|
|
|
8494 case Format::eBc6HSfloatBlock:
|
|
|
8495 case Format::eBc7UnormBlock:
|
|
|
8496 case Format::eBc7SrgbBlock:
|
|
|
8497 case Format::eEtc2R8G8B8UnormBlock:
|
|
|
8498 case Format::eEtc2R8G8B8SrgbBlock:
|
|
|
8499 case Format::eEtc2R8G8B8A1UnormBlock:
|
|
|
8500 case Format::eEtc2R8G8B8A1SrgbBlock:
|
|
|
8501 case Format::eEtc2R8G8B8A8UnormBlock:
|
|
|
8502 case Format::eEtc2R8G8B8A8SrgbBlock:
|
|
|
8503 case Format::eEacR11UnormBlock:
|
|
|
8504 case Format::eEacR11SnormBlock:
|
|
|
8505 case Format::eEacR11G11UnormBlock:
|
|
|
8506 case Format::eEacR11G11SnormBlock:
|
|
|
8507 case Format::eAstc4x4UnormBlock:
|
|
|
8508 case Format::eAstc4x4SrgbBlock:
|
|
|
8509 case Format::eAstc5x4UnormBlock:
|
|
|
8510 case Format::eAstc5x4SrgbBlock:
|
|
|
8511 case Format::eAstc5x5UnormBlock:
|
|
|
8512 case Format::eAstc5x5SrgbBlock:
|
|
|
8513 case Format::eAstc6x5UnormBlock:
|
|
|
8514 case Format::eAstc6x5SrgbBlock:
|
|
|
8515 case Format::eAstc6x6UnormBlock:
|
|
|
8516 case Format::eAstc6x6SrgbBlock:
|
|
|
8517 case Format::eAstc8x5UnormBlock:
|
|
|
8518 case Format::eAstc8x5SrgbBlock:
|
|
|
8519 case Format::eAstc8x6UnormBlock:
|
|
|
8520 case Format::eAstc8x6SrgbBlock:
|
|
|
8521 case Format::eAstc8x8UnormBlock:
|
|
|
8522 case Format::eAstc8x8SrgbBlock:
|
|
|
8523 case Format::eAstc10x5UnormBlock:
|
|
|
8524 case Format::eAstc10x5SrgbBlock:
|
|
|
8525 case Format::eAstc10x6UnormBlock:
|
|
|
8526 case Format::eAstc10x6SrgbBlock:
|
|
|
8527 case Format::eAstc10x8UnormBlock:
|
|
|
8528 case Format::eAstc10x8SrgbBlock:
|
|
|
8529 case Format::eAstc10x10UnormBlock:
|
|
|
8530 case Format::eAstc10x10SrgbBlock:
|
|
|
8531 case Format::eAstc12x10UnormBlock:
|
|
|
8532 case Format::eAstc12x10SrgbBlock:
|
|
|
8533 case Format::eAstc12x12UnormBlock:
|
|
|
8534 case Format::eAstc12x12SrgbBlock:
|
|
|
8535 case Format::eG8B8G8R8422Unorm:
|
|
|
8536 case Format::eB8G8R8G8422Unorm:
|
|
|
8537 case Format::eG8B8R83Plane420Unorm:
|
|
|
8538 case Format::eG8B8R82Plane420Unorm:
|
|
|
8539 case Format::eG8B8R83Plane422Unorm:
|
|
|
8540 case Format::eG8B8R82Plane422Unorm:
|
|
|
8541 case Format::eG8B8R83Plane444Unorm:
|
|
|
8542 case Format::eR10X6UnormPack16:
|
|
|
8543 case Format::eR10X6G10X6Unorm2Pack16:
|
|
|
8544 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16:
|
|
|
8545 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16:
|
|
|
8546 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16:
|
|
|
8547 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
8548 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
8549 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
8550 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
8551 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
8552 case Format::eR12X4UnormPack16:
|
|
|
8553 case Format::eR12X4G12X4Unorm2Pack16:
|
|
|
8554 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16:
|
|
|
8555 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16:
|
|
|
8556 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16:
|
|
|
8557 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
8558 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
8559 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
8560 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
8561 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
8562 case Format::eG16B16G16R16422Unorm:
|
|
|
8563 case Format::eB16G16R16G16422Unorm:
|
|
|
8564 case Format::eG16B16R163Plane420Unorm:
|
|
|
8565 case Format::eG16B16R162Plane420Unorm:
|
|
|
8566 case Format::eG16B16R163Plane422Unorm:
|
|
|
8567 case Format::eG16B16R162Plane422Unorm:
|
|
|
8568 case Format::eG16B16R163Plane444Unorm:
|
|
|
8569 case Format::eG8B8R82Plane444Unorm:
|
|
|
8570 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
8571 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
8572 case Format::eG16B16R162Plane444Unorm:
|
|
|
8573 case Format::eA4R4G4B4UnormPack16:
|
|
|
8574 case Format::eA4B4G4R4UnormPack16:
|
|
|
8575 case Format::eAstc4x4SfloatBlock:
|
|
|
8576 case Format::eAstc5x4SfloatBlock:
|
|
|
8577 case Format::eAstc5x5SfloatBlock:
|
|
|
8578 case Format::eAstc6x5SfloatBlock:
|
|
|
8579 case Format::eAstc6x6SfloatBlock:
|
|
|
8580 case Format::eAstc8x5SfloatBlock:
|
|
|
8581 case Format::eAstc8x6SfloatBlock:
|
|
|
8582 case Format::eAstc8x8SfloatBlock:
|
|
|
8583 case Format::eAstc10x5SfloatBlock:
|
|
|
8584 case Format::eAstc10x6SfloatBlock:
|
|
|
8585 case Format::eAstc10x8SfloatBlock:
|
|
|
8586 case Format::eAstc10x10SfloatBlock:
|
|
|
8587 case Format::eAstc12x10SfloatBlock:
|
|
|
8588 case Format::eAstc12x12SfloatBlock:
|
|
|
8589 case Format::eA1B5G5R5UnormPack16:
|
|
|
8590 case Format::ePvrtc12BppUnormBlockIMG:
|
|
|
8591 case Format::ePvrtc14BppUnormBlockIMG:
|
|
|
8592 case Format::ePvrtc22BppUnormBlockIMG:
|
|
|
8593 case Format::ePvrtc24BppUnormBlockIMG:
|
|
|
8594 case Format::ePvrtc12BppSrgbBlockIMG:
|
|
|
8595 case Format::ePvrtc14BppSrgbBlockIMG:
|
|
|
8596 case Format::ePvrtc22BppSrgbBlockIMG:
|
|
|
8597 case Format::ePvrtc24BppSrgbBlockIMG:
|
|
|
8598 case Format::eR8BoolARM:
|
|
|
8599 case Format::eR16G16Sfixed5NV:
|
|
|
8600 case Format::eR10X6UintPack16ARM:
|
|
|
8601 case Format::eR10X6G10X6Uint2Pack16ARM:
|
|
|
8602 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM:
|
|
|
8603 case Format::eR12X4UintPack16ARM:
|
|
|
8604 case Format::eR12X4G12X4Uint2Pack16ARM:
|
|
|
8605 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM:
|
|
|
8606 case Format::eR14X2UintPack16ARM:
|
|
|
8607 case Format::eR14X2G14X2Uint2Pack16ARM:
|
|
|
8608 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM:
|
|
|
8609 case Format::eR14X2UnormPack16ARM:
|
|
|
8610 case Format::eR14X2G14X2Unorm2Pack16ARM:
|
|
|
8611 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM:
|
|
|
8612 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
8613 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return true;
|
|
|
8614 default : return false;
|
|
|
8615 }
|
|
|
8616 }
|
|
|
8617
|
|
|
8618 // True, if this format has a stencil component
|
|
|
8619 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool hasStencilComponent( Format format )
|
|
|
8620 {
|
|
|
8621 switch ( format )
|
|
|
8622 {
|
|
|
8623 case Format::eS8Uint:
|
|
|
8624 case Format::eD16UnormS8Uint:
|
|
|
8625 case Format::eD24UnormS8Uint:
|
|
|
8626 case Format::eD32SfloatS8Uint: return true;
|
|
|
8627 default : return false;
|
|
|
8628 }
|
|
|
8629 }
|
|
|
8630
|
|
|
8631 // True, if this format is a color.
|
|
|
8632 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool isColor( Format format )
|
|
|
8633 {
|
|
|
8634 return hasRedComponent( format ) || hasGreenComponent( format ) || hasBlueComponent( format ) || hasAlphaComponent( format );
|
|
|
8635 }
|
|
|
8636
|
|
|
8637 // True, if this format is a compressed one.
|
|
|
8638 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 bool isCompressed( Format format )
|
|
|
8639 {
|
|
|
8640 return ( *compressionScheme( format ) != 0 );
|
|
|
8641 }
|
|
|
8642
|
|
|
8643 // The number of bits into which the format is packed. A single image element in this format
|
|
|
8644 // can be stored in the same space as a scalar type of this bit width.
|
|
|
8645 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t packed( Format format )
|
|
|
8646 {
|
|
|
8647 switch ( format )
|
|
|
8648 {
|
|
|
8649 case Format::eR4G4UnormPack8 : return 8;
|
|
|
8650 case Format::eR4G4B4A4UnormPack16 : return 16;
|
|
|
8651 case Format::eB4G4R4A4UnormPack16 : return 16;
|
|
|
8652 case Format::eR5G6B5UnormPack16 : return 16;
|
|
|
8653 case Format::eB5G6R5UnormPack16 : return 16;
|
|
|
8654 case Format::eR5G5B5A1UnormPack16 : return 16;
|
|
|
8655 case Format::eB5G5R5A1UnormPack16 : return 16;
|
|
|
8656 case Format::eA1R5G5B5UnormPack16 : return 16;
|
|
|
8657 case Format::eA8B8G8R8UnormPack32 : return 32;
|
|
|
8658 case Format::eA8B8G8R8SnormPack32 : return 32;
|
|
|
8659 case Format::eA8B8G8R8UscaledPack32 : return 32;
|
|
|
8660 case Format::eA8B8G8R8SscaledPack32 : return 32;
|
|
|
8661 case Format::eA8B8G8R8UintPack32 : return 32;
|
|
|
8662 case Format::eA8B8G8R8SintPack32 : return 32;
|
|
|
8663 case Format::eA8B8G8R8SrgbPack32 : return 32;
|
|
|
8664 case Format::eA2R10G10B10UnormPack32 : return 32;
|
|
|
8665 case Format::eA2R10G10B10SnormPack32 : return 32;
|
|
|
8666 case Format::eA2R10G10B10UscaledPack32 : return 32;
|
|
|
8667 case Format::eA2R10G10B10SscaledPack32 : return 32;
|
|
|
8668 case Format::eA2R10G10B10UintPack32 : return 32;
|
|
|
8669 case Format::eA2R10G10B10SintPack32 : return 32;
|
|
|
8670 case Format::eA2B10G10R10UnormPack32 : return 32;
|
|
|
8671 case Format::eA2B10G10R10SnormPack32 : return 32;
|
|
|
8672 case Format::eA2B10G10R10UscaledPack32 : return 32;
|
|
|
8673 case Format::eA2B10G10R10SscaledPack32 : return 32;
|
|
|
8674 case Format::eA2B10G10R10UintPack32 : return 32;
|
|
|
8675 case Format::eA2B10G10R10SintPack32 : return 32;
|
|
|
8676 case Format::eB10G11R11UfloatPack32 : return 32;
|
|
|
8677 case Format::eE5B9G9R9UfloatPack32 : return 32;
|
|
|
8678 case Format::eX8D24UnormPack32 : return 32;
|
|
|
8679 case Format::eR10X6UnormPack16 : return 16;
|
|
|
8680 case Format::eR10X6G10X6Unorm2Pack16 : return 16;
|
|
|
8681 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16 : return 16;
|
|
|
8682 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16 : return 16;
|
|
|
8683 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16 : return 16;
|
|
|
8684 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return 16;
|
|
|
8685 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return 16;
|
|
|
8686 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return 16;
|
|
|
8687 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return 16;
|
|
|
8688 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return 16;
|
|
|
8689 case Format::eR12X4UnormPack16 : return 16;
|
|
|
8690 case Format::eR12X4G12X4Unorm2Pack16 : return 16;
|
|
|
8691 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16 : return 16;
|
|
|
8692 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16 : return 16;
|
|
|
8693 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16 : return 16;
|
|
|
8694 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return 16;
|
|
|
8695 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return 16;
|
|
|
8696 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return 16;
|
|
|
8697 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return 16;
|
|
|
8698 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return 16;
|
|
|
8699 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return 16;
|
|
|
8700 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return 16;
|
|
|
8701 case Format::eA4R4G4B4UnormPack16 : return 16;
|
|
|
8702 case Format::eA4B4G4R4UnormPack16 : return 16;
|
|
|
8703 case Format::eA1B5G5R5UnormPack16 : return 16;
|
|
|
8704 case Format::eR10X6UintPack16ARM : return 16;
|
|
|
8705 case Format::eR10X6G10X6Uint2Pack16ARM : return 16;
|
|
|
8706 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM : return 16;
|
|
|
8707 case Format::eR12X4UintPack16ARM : return 16;
|
|
|
8708 case Format::eR12X4G12X4Uint2Pack16ARM : return 16;
|
|
|
8709 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM : return 16;
|
|
|
8710 case Format::eR14X2UintPack16ARM : return 16;
|
|
|
8711 case Format::eR14X2G14X2Uint2Pack16ARM : return 16;
|
|
|
8712 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM : return 16;
|
|
|
8713 case Format::eR14X2UnormPack16ARM : return 16;
|
|
|
8714 case Format::eR14X2G14X2Unorm2Pack16ARM : return 16;
|
|
|
8715 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM : return 16;
|
|
|
8716 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return 16;
|
|
|
8717 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return 16;
|
|
|
8718
|
|
|
8719 default: return 0;
|
|
|
8720 }
|
|
|
8721 }
|
|
|
8722
|
|
|
8723 // The single-plane format that this plane is compatible with.
|
|
|
8724 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 Format planeCompatibleFormat( Format format, uint8_t plane )
|
|
|
8725 {
|
|
|
8726 switch ( format )
|
|
|
8727 {
|
|
|
8728 case Format::eG8B8R83Plane420Unorm:
|
|
|
8729 switch ( plane )
|
|
|
8730 {
|
|
|
8731 case 0 : return Format::eR8Unorm;
|
|
|
8732 case 1 : return Format::eR8Unorm;
|
|
|
8733 case 2 : return Format::eR8Unorm;
|
|
|
8734 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8735 }
|
|
|
8736 case Format::eG8B8R82Plane420Unorm:
|
|
|
8737 switch ( plane )
|
|
|
8738 {
|
|
|
8739 case 0 : return Format::eR8Unorm;
|
|
|
8740 case 1 : return Format::eR8G8Unorm;
|
|
|
8741 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8742 }
|
|
|
8743 case Format::eG8B8R83Plane422Unorm:
|
|
|
8744 switch ( plane )
|
|
|
8745 {
|
|
|
8746 case 0 : return Format::eR8Unorm;
|
|
|
8747 case 1 : return Format::eR8Unorm;
|
|
|
8748 case 2 : return Format::eR8Unorm;
|
|
|
8749 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8750 }
|
|
|
8751 case Format::eG8B8R82Plane422Unorm:
|
|
|
8752 switch ( plane )
|
|
|
8753 {
|
|
|
8754 case 0 : return Format::eR8Unorm;
|
|
|
8755 case 1 : return Format::eR8G8Unorm;
|
|
|
8756 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8757 }
|
|
|
8758 case Format::eG8B8R83Plane444Unorm:
|
|
|
8759 switch ( plane )
|
|
|
8760 {
|
|
|
8761 case 0 : return Format::eR8Unorm;
|
|
|
8762 case 1 : return Format::eR8Unorm;
|
|
|
8763 case 2 : return Format::eR8Unorm;
|
|
|
8764 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8765 }
|
|
|
8766 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
8767 switch ( plane )
|
|
|
8768 {
|
|
|
8769 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8770 case 1 : return Format::eR10X6UnormPack16;
|
|
|
8771 case 2 : return Format::eR10X6UnormPack16;
|
|
|
8772 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8773 }
|
|
|
8774 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
8775 switch ( plane )
|
|
|
8776 {
|
|
|
8777 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8778 case 1 : return Format::eR10X6G10X6Unorm2Pack16;
|
|
|
8779 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8780 }
|
|
|
8781 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
8782 switch ( plane )
|
|
|
8783 {
|
|
|
8784 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8785 case 1 : return Format::eR10X6UnormPack16;
|
|
|
8786 case 2 : return Format::eR10X6UnormPack16;
|
|
|
8787 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8788 }
|
|
|
8789 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
8790 switch ( plane )
|
|
|
8791 {
|
|
|
8792 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8793 case 1 : return Format::eR10X6G10X6Unorm2Pack16;
|
|
|
8794 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8795 }
|
|
|
8796 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
8797 switch ( plane )
|
|
|
8798 {
|
|
|
8799 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8800 case 1 : return Format::eR10X6UnormPack16;
|
|
|
8801 case 2 : return Format::eR10X6UnormPack16;
|
|
|
8802 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8803 }
|
|
|
8804 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
8805 switch ( plane )
|
|
|
8806 {
|
|
|
8807 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8808 case 1 : return Format::eR12X4UnormPack16;
|
|
|
8809 case 2 : return Format::eR12X4UnormPack16;
|
|
|
8810 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8811 }
|
|
|
8812 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
8813 switch ( plane )
|
|
|
8814 {
|
|
|
8815 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8816 case 1 : return Format::eR12X4G12X4Unorm2Pack16;
|
|
|
8817 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8818 }
|
|
|
8819 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
8820 switch ( plane )
|
|
|
8821 {
|
|
|
8822 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8823 case 1 : return Format::eR12X4UnormPack16;
|
|
|
8824 case 2 : return Format::eR12X4UnormPack16;
|
|
|
8825 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8826 }
|
|
|
8827 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
8828 switch ( plane )
|
|
|
8829 {
|
|
|
8830 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8831 case 1 : return Format::eR12X4G12X4Unorm2Pack16;
|
|
|
8832 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8833 }
|
|
|
8834 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
8835 switch ( plane )
|
|
|
8836 {
|
|
|
8837 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8838 case 1 : return Format::eR12X4UnormPack16;
|
|
|
8839 case 2 : return Format::eR12X4UnormPack16;
|
|
|
8840 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8841 }
|
|
|
8842 case Format::eG16B16R163Plane420Unorm:
|
|
|
8843 switch ( plane )
|
|
|
8844 {
|
|
|
8845 case 0 : return Format::eR16Unorm;
|
|
|
8846 case 1 : return Format::eR16Unorm;
|
|
|
8847 case 2 : return Format::eR16Unorm;
|
|
|
8848 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8849 }
|
|
|
8850 case Format::eG16B16R162Plane420Unorm:
|
|
|
8851 switch ( plane )
|
|
|
8852 {
|
|
|
8853 case 0 : return Format::eR16Unorm;
|
|
|
8854 case 1 : return Format::eR16G16Unorm;
|
|
|
8855 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8856 }
|
|
|
8857 case Format::eG16B16R163Plane422Unorm:
|
|
|
8858 switch ( plane )
|
|
|
8859 {
|
|
|
8860 case 0 : return Format::eR16Unorm;
|
|
|
8861 case 1 : return Format::eR16Unorm;
|
|
|
8862 case 2 : return Format::eR16Unorm;
|
|
|
8863 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8864 }
|
|
|
8865 case Format::eG16B16R162Plane422Unorm:
|
|
|
8866 switch ( plane )
|
|
|
8867 {
|
|
|
8868 case 0 : return Format::eR16Unorm;
|
|
|
8869 case 1 : return Format::eR16G16Unorm;
|
|
|
8870 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8871 }
|
|
|
8872 case Format::eG16B16R163Plane444Unorm:
|
|
|
8873 switch ( plane )
|
|
|
8874 {
|
|
|
8875 case 0 : return Format::eR16Unorm;
|
|
|
8876 case 1 : return Format::eR16Unorm;
|
|
|
8877 case 2 : return Format::eR16Unorm;
|
|
|
8878 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8879 }
|
|
|
8880 case Format::eG8B8R82Plane444Unorm:
|
|
|
8881 switch ( plane )
|
|
|
8882 {
|
|
|
8883 case 0 : return Format::eR8Unorm;
|
|
|
8884 case 1 : return Format::eR8G8Unorm;
|
|
|
8885 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8886 }
|
|
|
8887 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
8888 switch ( plane )
|
|
|
8889 {
|
|
|
8890 case 0 : return Format::eR10X6UnormPack16;
|
|
|
8891 case 1 : return Format::eR10X6G10X6Unorm2Pack16;
|
|
|
8892 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8893 }
|
|
|
8894 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
8895 switch ( plane )
|
|
|
8896 {
|
|
|
8897 case 0 : return Format::eR12X4UnormPack16;
|
|
|
8898 case 1 : return Format::eR12X4G12X4Unorm2Pack16;
|
|
|
8899 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8900 }
|
|
|
8901 case Format::eG16B16R162Plane444Unorm:
|
|
|
8902 switch ( plane )
|
|
|
8903 {
|
|
|
8904 case 0 : return Format::eR16Unorm;
|
|
|
8905 case 1 : return Format::eR16G16Unorm;
|
|
|
8906 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8907 }
|
|
|
8908 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
8909 switch ( plane )
|
|
|
8910 {
|
|
|
8911 case 0 : return Format::eR14X2UnormPack16ARM;
|
|
|
8912 case 1 : return Format::eR14X2G14X2Unorm2Pack16ARM;
|
|
|
8913 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8914 }
|
|
|
8915 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
8916 switch ( plane )
|
|
|
8917 {
|
|
|
8918 case 0 : return Format::eR14X2UnormPack16ARM;
|
|
|
8919 case 1 : return Format::eR14X2G14X2Unorm2Pack16ARM;
|
|
|
8920 default: VULKAN_HPP_ASSERT( false ); return Format::eUndefined;
|
|
|
8921 }
|
|
|
8922
|
|
|
8923 default: VULKAN_HPP_ASSERT( plane == 0 ); return format;
|
|
|
8924 }
|
|
|
8925 }
|
|
|
8926
|
|
|
8927 // The number of image planes of this format.
|
|
|
8928 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t planeCount( Format format )
|
|
|
8929 {
|
|
|
8930 switch ( format )
|
|
|
8931 {
|
|
|
8932 case Format::eG8B8R83Plane420Unorm : return 3;
|
|
|
8933 case Format::eG8B8R82Plane420Unorm : return 2;
|
|
|
8934 case Format::eG8B8R83Plane422Unorm : return 3;
|
|
|
8935 case Format::eG8B8R82Plane422Unorm : return 2;
|
|
|
8936 case Format::eG8B8R83Plane444Unorm : return 3;
|
|
|
8937 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return 3;
|
|
|
8938 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return 2;
|
|
|
8939 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return 3;
|
|
|
8940 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return 2;
|
|
|
8941 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return 3;
|
|
|
8942 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return 3;
|
|
|
8943 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return 2;
|
|
|
8944 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return 3;
|
|
|
8945 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return 2;
|
|
|
8946 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return 3;
|
|
|
8947 case Format::eG16B16R163Plane420Unorm : return 3;
|
|
|
8948 case Format::eG16B16R162Plane420Unorm : return 2;
|
|
|
8949 case Format::eG16B16R163Plane422Unorm : return 3;
|
|
|
8950 case Format::eG16B16R162Plane422Unorm : return 2;
|
|
|
8951 case Format::eG16B16R163Plane444Unorm : return 3;
|
|
|
8952 case Format::eG8B8R82Plane444Unorm : return 2;
|
|
|
8953 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return 2;
|
|
|
8954 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return 2;
|
|
|
8955 case Format::eG16B16R162Plane444Unorm : return 2;
|
|
|
8956 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return 2;
|
|
|
8957 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return 2;
|
|
|
8958
|
|
|
8959 default: return 1;
|
|
|
8960 }
|
|
|
8961 }
|
|
|
8962
|
|
|
8963 // The relative height of this plane. A value of k means that this plane is 1/k the height of the overall format.
|
|
|
8964 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t planeHeightDivisor( Format format, uint8_t plane )
|
|
|
8965 {
|
|
|
8966 switch ( format )
|
|
|
8967 {
|
|
|
8968 case Format::eG8B8R83Plane420Unorm:
|
|
|
8969 switch ( plane )
|
|
|
8970 {
|
|
|
8971 case 0 : return 1;
|
|
|
8972 case 1 : return 2;
|
|
|
8973 case 2 : return 2;
|
|
|
8974 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
8975 }
|
|
|
8976 case Format::eG8B8R82Plane420Unorm:
|
|
|
8977 switch ( plane )
|
|
|
8978 {
|
|
|
8979 case 0 : return 1;
|
|
|
8980 case 1 : return 2;
|
|
|
8981 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
8982 }
|
|
|
8983 case Format::eG8B8R83Plane422Unorm:
|
|
|
8984 switch ( plane )
|
|
|
8985 {
|
|
|
8986 case 0 : return 1;
|
|
|
8987 case 1 : return 1;
|
|
|
8988 case 2 : return 1;
|
|
|
8989 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
8990 }
|
|
|
8991 case Format::eG8B8R82Plane422Unorm:
|
|
|
8992 switch ( plane )
|
|
|
8993 {
|
|
|
8994 case 0 : return 1;
|
|
|
8995 case 1 : return 1;
|
|
|
8996 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
8997 }
|
|
|
8998 case Format::eG8B8R83Plane444Unorm:
|
|
|
8999 switch ( plane )
|
|
|
9000 {
|
|
|
9001 case 0 : return 1;
|
|
|
9002 case 1 : return 1;
|
|
|
9003 case 2 : return 1;
|
|
|
9004 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9005 }
|
|
|
9006 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
9007 switch ( plane )
|
|
|
9008 {
|
|
|
9009 case 0 : return 1;
|
|
|
9010 case 1 : return 2;
|
|
|
9011 case 2 : return 2;
|
|
|
9012 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9013 }
|
|
|
9014 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
9015 switch ( plane )
|
|
|
9016 {
|
|
|
9017 case 0 : return 1;
|
|
|
9018 case 1 : return 2;
|
|
|
9019 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9020 }
|
|
|
9021 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
9022 switch ( plane )
|
|
|
9023 {
|
|
|
9024 case 0 : return 1;
|
|
|
9025 case 1 : return 1;
|
|
|
9026 case 2 : return 1;
|
|
|
9027 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9028 }
|
|
|
9029 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
9030 switch ( plane )
|
|
|
9031 {
|
|
|
9032 case 0 : return 1;
|
|
|
9033 case 1 : return 1;
|
|
|
9034 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9035 }
|
|
|
9036 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
9037 switch ( plane )
|
|
|
9038 {
|
|
|
9039 case 0 : return 1;
|
|
|
9040 case 1 : return 1;
|
|
|
9041 case 2 : return 1;
|
|
|
9042 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9043 }
|
|
|
9044 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
9045 switch ( plane )
|
|
|
9046 {
|
|
|
9047 case 0 : return 1;
|
|
|
9048 case 1 : return 2;
|
|
|
9049 case 2 : return 2;
|
|
|
9050 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9051 }
|
|
|
9052 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
9053 switch ( plane )
|
|
|
9054 {
|
|
|
9055 case 0 : return 1;
|
|
|
9056 case 1 : return 2;
|
|
|
9057 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9058 }
|
|
|
9059 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
9060 switch ( plane )
|
|
|
9061 {
|
|
|
9062 case 0 : return 1;
|
|
|
9063 case 1 : return 1;
|
|
|
9064 case 2 : return 1;
|
|
|
9065 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9066 }
|
|
|
9067 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
9068 switch ( plane )
|
|
|
9069 {
|
|
|
9070 case 0 : return 1;
|
|
|
9071 case 1 : return 1;
|
|
|
9072 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9073 }
|
|
|
9074 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
9075 switch ( plane )
|
|
|
9076 {
|
|
|
9077 case 0 : return 1;
|
|
|
9078 case 1 : return 1;
|
|
|
9079 case 2 : return 1;
|
|
|
9080 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9081 }
|
|
|
9082 case Format::eG16B16R163Plane420Unorm:
|
|
|
9083 switch ( plane )
|
|
|
9084 {
|
|
|
9085 case 0 : return 1;
|
|
|
9086 case 1 : return 2;
|
|
|
9087 case 2 : return 2;
|
|
|
9088 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9089 }
|
|
|
9090 case Format::eG16B16R162Plane420Unorm:
|
|
|
9091 switch ( plane )
|
|
|
9092 {
|
|
|
9093 case 0 : return 1;
|
|
|
9094 case 1 : return 2;
|
|
|
9095 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9096 }
|
|
|
9097 case Format::eG16B16R163Plane422Unorm:
|
|
|
9098 switch ( plane )
|
|
|
9099 {
|
|
|
9100 case 0 : return 1;
|
|
|
9101 case 1 : return 1;
|
|
|
9102 case 2 : return 1;
|
|
|
9103 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9104 }
|
|
|
9105 case Format::eG16B16R162Plane422Unorm:
|
|
|
9106 switch ( plane )
|
|
|
9107 {
|
|
|
9108 case 0 : return 1;
|
|
|
9109 case 1 : return 1;
|
|
|
9110 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9111 }
|
|
|
9112 case Format::eG16B16R163Plane444Unorm:
|
|
|
9113 switch ( plane )
|
|
|
9114 {
|
|
|
9115 case 0 : return 1;
|
|
|
9116 case 1 : return 1;
|
|
|
9117 case 2 : return 1;
|
|
|
9118 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9119 }
|
|
|
9120 case Format::eG8B8R82Plane444Unorm:
|
|
|
9121 switch ( plane )
|
|
|
9122 {
|
|
|
9123 case 0 : return 1;
|
|
|
9124 case 1 : return 1;
|
|
|
9125 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9126 }
|
|
|
9127 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
9128 switch ( plane )
|
|
|
9129 {
|
|
|
9130 case 0 : return 1;
|
|
|
9131 case 1 : return 1;
|
|
|
9132 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9133 }
|
|
|
9134 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
9135 switch ( plane )
|
|
|
9136 {
|
|
|
9137 case 0 : return 1;
|
|
|
9138 case 1 : return 1;
|
|
|
9139 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9140 }
|
|
|
9141 case Format::eG16B16R162Plane444Unorm:
|
|
|
9142 switch ( plane )
|
|
|
9143 {
|
|
|
9144 case 0 : return 1;
|
|
|
9145 case 1 : return 1;
|
|
|
9146 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9147 }
|
|
|
9148 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
9149 switch ( plane )
|
|
|
9150 {
|
|
|
9151 case 0 : return 1;
|
|
|
9152 case 1 : return 2;
|
|
|
9153 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9154 }
|
|
|
9155 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
9156 switch ( plane )
|
|
|
9157 {
|
|
|
9158 case 0 : return 1;
|
|
|
9159 case 1 : return 1;
|
|
|
9160 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9161 }
|
|
|
9162
|
|
|
9163 default: VULKAN_HPP_ASSERT( plane == 0 ); return 1;
|
|
|
9164 }
|
|
|
9165 }
|
|
|
9166
|
|
|
9167 // The relative width of this plane. A value of k means that this plane is 1/k the width of the overall format.
|
|
|
9168 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t planeWidthDivisor( Format format, uint8_t plane )
|
|
|
9169 {
|
|
|
9170 switch ( format )
|
|
|
9171 {
|
|
|
9172 case Format::eG8B8R83Plane420Unorm:
|
|
|
9173 switch ( plane )
|
|
|
9174 {
|
|
|
9175 case 0 : return 1;
|
|
|
9176 case 1 : return 2;
|
|
|
9177 case 2 : return 2;
|
|
|
9178 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9179 }
|
|
|
9180 case Format::eG8B8R82Plane420Unorm:
|
|
|
9181 switch ( plane )
|
|
|
9182 {
|
|
|
9183 case 0 : return 1;
|
|
|
9184 case 1 : return 2;
|
|
|
9185 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9186 }
|
|
|
9187 case Format::eG8B8R83Plane422Unorm:
|
|
|
9188 switch ( plane )
|
|
|
9189 {
|
|
|
9190 case 0 : return 1;
|
|
|
9191 case 1 : return 2;
|
|
|
9192 case 2 : return 2;
|
|
|
9193 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9194 }
|
|
|
9195 case Format::eG8B8R82Plane422Unorm:
|
|
|
9196 switch ( plane )
|
|
|
9197 {
|
|
|
9198 case 0 : return 1;
|
|
|
9199 case 1 : return 2;
|
|
|
9200 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9201 }
|
|
|
9202 case Format::eG8B8R83Plane444Unorm:
|
|
|
9203 switch ( plane )
|
|
|
9204 {
|
|
|
9205 case 0 : return 1;
|
|
|
9206 case 1 : return 1;
|
|
|
9207 case 2 : return 1;
|
|
|
9208 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9209 }
|
|
|
9210 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16:
|
|
|
9211 switch ( plane )
|
|
|
9212 {
|
|
|
9213 case 0 : return 1;
|
|
|
9214 case 1 : return 2;
|
|
|
9215 case 2 : return 2;
|
|
|
9216 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9217 }
|
|
|
9218 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16:
|
|
|
9219 switch ( plane )
|
|
|
9220 {
|
|
|
9221 case 0 : return 1;
|
|
|
9222 case 1 : return 2;
|
|
|
9223 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9224 }
|
|
|
9225 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16:
|
|
|
9226 switch ( plane )
|
|
|
9227 {
|
|
|
9228 case 0 : return 1;
|
|
|
9229 case 1 : return 2;
|
|
|
9230 case 2 : return 2;
|
|
|
9231 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9232 }
|
|
|
9233 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16:
|
|
|
9234 switch ( plane )
|
|
|
9235 {
|
|
|
9236 case 0 : return 1;
|
|
|
9237 case 1 : return 2;
|
|
|
9238 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9239 }
|
|
|
9240 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16:
|
|
|
9241 switch ( plane )
|
|
|
9242 {
|
|
|
9243 case 0 : return 1;
|
|
|
9244 case 1 : return 1;
|
|
|
9245 case 2 : return 1;
|
|
|
9246 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9247 }
|
|
|
9248 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16:
|
|
|
9249 switch ( plane )
|
|
|
9250 {
|
|
|
9251 case 0 : return 1;
|
|
|
9252 case 1 : return 2;
|
|
|
9253 case 2 : return 2;
|
|
|
9254 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9255 }
|
|
|
9256 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16:
|
|
|
9257 switch ( plane )
|
|
|
9258 {
|
|
|
9259 case 0 : return 1;
|
|
|
9260 case 1 : return 2;
|
|
|
9261 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9262 }
|
|
|
9263 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16:
|
|
|
9264 switch ( plane )
|
|
|
9265 {
|
|
|
9266 case 0 : return 1;
|
|
|
9267 case 1 : return 2;
|
|
|
9268 case 2 : return 2;
|
|
|
9269 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9270 }
|
|
|
9271 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16:
|
|
|
9272 switch ( plane )
|
|
|
9273 {
|
|
|
9274 case 0 : return 1;
|
|
|
9275 case 1 : return 2;
|
|
|
9276 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9277 }
|
|
|
9278 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16:
|
|
|
9279 switch ( plane )
|
|
|
9280 {
|
|
|
9281 case 0 : return 1;
|
|
|
9282 case 1 : return 1;
|
|
|
9283 case 2 : return 1;
|
|
|
9284 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9285 }
|
|
|
9286 case Format::eG16B16R163Plane420Unorm:
|
|
|
9287 switch ( plane )
|
|
|
9288 {
|
|
|
9289 case 0 : return 1;
|
|
|
9290 case 1 : return 2;
|
|
|
9291 case 2 : return 2;
|
|
|
9292 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9293 }
|
|
|
9294 case Format::eG16B16R162Plane420Unorm:
|
|
|
9295 switch ( plane )
|
|
|
9296 {
|
|
|
9297 case 0 : return 1;
|
|
|
9298 case 1 : return 2;
|
|
|
9299 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9300 }
|
|
|
9301 case Format::eG16B16R163Plane422Unorm:
|
|
|
9302 switch ( plane )
|
|
|
9303 {
|
|
|
9304 case 0 : return 1;
|
|
|
9305 case 1 : return 2;
|
|
|
9306 case 2 : return 2;
|
|
|
9307 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9308 }
|
|
|
9309 case Format::eG16B16R162Plane422Unorm:
|
|
|
9310 switch ( plane )
|
|
|
9311 {
|
|
|
9312 case 0 : return 1;
|
|
|
9313 case 1 : return 2;
|
|
|
9314 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9315 }
|
|
|
9316 case Format::eG16B16R163Plane444Unorm:
|
|
|
9317 switch ( plane )
|
|
|
9318 {
|
|
|
9319 case 0 : return 1;
|
|
|
9320 case 1 : return 1;
|
|
|
9321 case 2 : return 1;
|
|
|
9322 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9323 }
|
|
|
9324 case Format::eG8B8R82Plane444Unorm:
|
|
|
9325 switch ( plane )
|
|
|
9326 {
|
|
|
9327 case 0 : return 1;
|
|
|
9328 case 1 : return 1;
|
|
|
9329 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9330 }
|
|
|
9331 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16:
|
|
|
9332 switch ( plane )
|
|
|
9333 {
|
|
|
9334 case 0 : return 1;
|
|
|
9335 case 1 : return 1;
|
|
|
9336 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9337 }
|
|
|
9338 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16:
|
|
|
9339 switch ( plane )
|
|
|
9340 {
|
|
|
9341 case 0 : return 1;
|
|
|
9342 case 1 : return 1;
|
|
|
9343 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9344 }
|
|
|
9345 case Format::eG16B16R162Plane444Unorm:
|
|
|
9346 switch ( plane )
|
|
|
9347 {
|
|
|
9348 case 0 : return 1;
|
|
|
9349 case 1 : return 1;
|
|
|
9350 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9351 }
|
|
|
9352 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM:
|
|
|
9353 switch ( plane )
|
|
|
9354 {
|
|
|
9355 case 0 : return 1;
|
|
|
9356 case 1 : return 2;
|
|
|
9357 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9358 }
|
|
|
9359 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM:
|
|
|
9360 switch ( plane )
|
|
|
9361 {
|
|
|
9362 case 0 : return 1;
|
|
|
9363 case 1 : return 2;
|
|
|
9364 default: VULKAN_HPP_ASSERT( false ); return 1;
|
|
|
9365 }
|
|
|
9366
|
|
|
9367 default: VULKAN_HPP_ASSERT( plane == 0 ); return 1;
|
|
|
9368 }
|
|
|
9369 }
|
|
|
9370
|
|
|
9371 // The number of texels in a texel block.
|
|
|
9372 VULKAN_HPP_INLINE VULKAN_HPP_CONSTEXPR_14 uint8_t texelsPerBlock( Format format )
|
|
|
9373 {
|
|
|
9374 switch ( format )
|
|
|
9375 {
|
|
|
9376 case Format::eR4G4UnormPack8 : return 1;
|
|
|
9377 case Format::eR4G4B4A4UnormPack16 : return 1;
|
|
|
9378 case Format::eB4G4R4A4UnormPack16 : return 1;
|
|
|
9379 case Format::eR5G6B5UnormPack16 : return 1;
|
|
|
9380 case Format::eB5G6R5UnormPack16 : return 1;
|
|
|
9381 case Format::eR5G5B5A1UnormPack16 : return 1;
|
|
|
9382 case Format::eB5G5R5A1UnormPack16 : return 1;
|
|
|
9383 case Format::eA1R5G5B5UnormPack16 : return 1;
|
|
|
9384 case Format::eR8Unorm : return 1;
|
|
|
9385 case Format::eR8Snorm : return 1;
|
|
|
9386 case Format::eR8Uscaled : return 1;
|
|
|
9387 case Format::eR8Sscaled : return 1;
|
|
|
9388 case Format::eR8Uint : return 1;
|
|
|
9389 case Format::eR8Sint : return 1;
|
|
|
9390 case Format::eR8Srgb : return 1;
|
|
|
9391 case Format::eR8G8Unorm : return 1;
|
|
|
9392 case Format::eR8G8Snorm : return 1;
|
|
|
9393 case Format::eR8G8Uscaled : return 1;
|
|
|
9394 case Format::eR8G8Sscaled : return 1;
|
|
|
9395 case Format::eR8G8Uint : return 1;
|
|
|
9396 case Format::eR8G8Sint : return 1;
|
|
|
9397 case Format::eR8G8Srgb : return 1;
|
|
|
9398 case Format::eR8G8B8Unorm : return 1;
|
|
|
9399 case Format::eR8G8B8Snorm : return 1;
|
|
|
9400 case Format::eR8G8B8Uscaled : return 1;
|
|
|
9401 case Format::eR8G8B8Sscaled : return 1;
|
|
|
9402 case Format::eR8G8B8Uint : return 1;
|
|
|
9403 case Format::eR8G8B8Sint : return 1;
|
|
|
9404 case Format::eR8G8B8Srgb : return 1;
|
|
|
9405 case Format::eB8G8R8Unorm : return 1;
|
|
|
9406 case Format::eB8G8R8Snorm : return 1;
|
|
|
9407 case Format::eB8G8R8Uscaled : return 1;
|
|
|
9408 case Format::eB8G8R8Sscaled : return 1;
|
|
|
9409 case Format::eB8G8R8Uint : return 1;
|
|
|
9410 case Format::eB8G8R8Sint : return 1;
|
|
|
9411 case Format::eB8G8R8Srgb : return 1;
|
|
|
9412 case Format::eR8G8B8A8Unorm : return 1;
|
|
|
9413 case Format::eR8G8B8A8Snorm : return 1;
|
|
|
9414 case Format::eR8G8B8A8Uscaled : return 1;
|
|
|
9415 case Format::eR8G8B8A8Sscaled : return 1;
|
|
|
9416 case Format::eR8G8B8A8Uint : return 1;
|
|
|
9417 case Format::eR8G8B8A8Sint : return 1;
|
|
|
9418 case Format::eR8G8B8A8Srgb : return 1;
|
|
|
9419 case Format::eB8G8R8A8Unorm : return 1;
|
|
|
9420 case Format::eB8G8R8A8Snorm : return 1;
|
|
|
9421 case Format::eB8G8R8A8Uscaled : return 1;
|
|
|
9422 case Format::eB8G8R8A8Sscaled : return 1;
|
|
|
9423 case Format::eB8G8R8A8Uint : return 1;
|
|
|
9424 case Format::eB8G8R8A8Sint : return 1;
|
|
|
9425 case Format::eB8G8R8A8Srgb : return 1;
|
|
|
9426 case Format::eA8B8G8R8UnormPack32 : return 1;
|
|
|
9427 case Format::eA8B8G8R8SnormPack32 : return 1;
|
|
|
9428 case Format::eA8B8G8R8UscaledPack32 : return 1;
|
|
|
9429 case Format::eA8B8G8R8SscaledPack32 : return 1;
|
|
|
9430 case Format::eA8B8G8R8UintPack32 : return 1;
|
|
|
9431 case Format::eA8B8G8R8SintPack32 : return 1;
|
|
|
9432 case Format::eA8B8G8R8SrgbPack32 : return 1;
|
|
|
9433 case Format::eA2R10G10B10UnormPack32 : return 1;
|
|
|
9434 case Format::eA2R10G10B10SnormPack32 : return 1;
|
|
|
9435 case Format::eA2R10G10B10UscaledPack32 : return 1;
|
|
|
9436 case Format::eA2R10G10B10SscaledPack32 : return 1;
|
|
|
9437 case Format::eA2R10G10B10UintPack32 : return 1;
|
|
|
9438 case Format::eA2R10G10B10SintPack32 : return 1;
|
|
|
9439 case Format::eA2B10G10R10UnormPack32 : return 1;
|
|
|
9440 case Format::eA2B10G10R10SnormPack32 : return 1;
|
|
|
9441 case Format::eA2B10G10R10UscaledPack32 : return 1;
|
|
|
9442 case Format::eA2B10G10R10SscaledPack32 : return 1;
|
|
|
9443 case Format::eA2B10G10R10UintPack32 : return 1;
|
|
|
9444 case Format::eA2B10G10R10SintPack32 : return 1;
|
|
|
9445 case Format::eR16Unorm : return 1;
|
|
|
9446 case Format::eR16Snorm : return 1;
|
|
|
9447 case Format::eR16Uscaled : return 1;
|
|
|
9448 case Format::eR16Sscaled : return 1;
|
|
|
9449 case Format::eR16Uint : return 1;
|
|
|
9450 case Format::eR16Sint : return 1;
|
|
|
9451 case Format::eR16Sfloat : return 1;
|
|
|
9452 case Format::eR16G16Unorm : return 1;
|
|
|
9453 case Format::eR16G16Snorm : return 1;
|
|
|
9454 case Format::eR16G16Uscaled : return 1;
|
|
|
9455 case Format::eR16G16Sscaled : return 1;
|
|
|
9456 case Format::eR16G16Uint : return 1;
|
|
|
9457 case Format::eR16G16Sint : return 1;
|
|
|
9458 case Format::eR16G16Sfloat : return 1;
|
|
|
9459 case Format::eR16G16B16Unorm : return 1;
|
|
|
9460 case Format::eR16G16B16Snorm : return 1;
|
|
|
9461 case Format::eR16G16B16Uscaled : return 1;
|
|
|
9462 case Format::eR16G16B16Sscaled : return 1;
|
|
|
9463 case Format::eR16G16B16Uint : return 1;
|
|
|
9464 case Format::eR16G16B16Sint : return 1;
|
|
|
9465 case Format::eR16G16B16Sfloat : return 1;
|
|
|
9466 case Format::eR16G16B16A16Unorm : return 1;
|
|
|
9467 case Format::eR16G16B16A16Snorm : return 1;
|
|
|
9468 case Format::eR16G16B16A16Uscaled : return 1;
|
|
|
9469 case Format::eR16G16B16A16Sscaled : return 1;
|
|
|
9470 case Format::eR16G16B16A16Uint : return 1;
|
|
|
9471 case Format::eR16G16B16A16Sint : return 1;
|
|
|
9472 case Format::eR16G16B16A16Sfloat : return 1;
|
|
|
9473 case Format::eR32Uint : return 1;
|
|
|
9474 case Format::eR32Sint : return 1;
|
|
|
9475 case Format::eR32Sfloat : return 1;
|
|
|
9476 case Format::eR32G32Uint : return 1;
|
|
|
9477 case Format::eR32G32Sint : return 1;
|
|
|
9478 case Format::eR32G32Sfloat : return 1;
|
|
|
9479 case Format::eR32G32B32Uint : return 1;
|
|
|
9480 case Format::eR32G32B32Sint : return 1;
|
|
|
9481 case Format::eR32G32B32Sfloat : return 1;
|
|
|
9482 case Format::eR32G32B32A32Uint : return 1;
|
|
|
9483 case Format::eR32G32B32A32Sint : return 1;
|
|
|
9484 case Format::eR32G32B32A32Sfloat : return 1;
|
|
|
9485 case Format::eR64Uint : return 1;
|
|
|
9486 case Format::eR64Sint : return 1;
|
|
|
9487 case Format::eR64Sfloat : return 1;
|
|
|
9488 case Format::eR64G64Uint : return 1;
|
|
|
9489 case Format::eR64G64Sint : return 1;
|
|
|
9490 case Format::eR64G64Sfloat : return 1;
|
|
|
9491 case Format::eR64G64B64Uint : return 1;
|
|
|
9492 case Format::eR64G64B64Sint : return 1;
|
|
|
9493 case Format::eR64G64B64Sfloat : return 1;
|
|
|
9494 case Format::eR64G64B64A64Uint : return 1;
|
|
|
9495 case Format::eR64G64B64A64Sint : return 1;
|
|
|
9496 case Format::eR64G64B64A64Sfloat : return 1;
|
|
|
9497 case Format::eB10G11R11UfloatPack32 : return 1;
|
|
|
9498 case Format::eE5B9G9R9UfloatPack32 : return 1;
|
|
|
9499 case Format::eD16Unorm : return 1;
|
|
|
9500 case Format::eX8D24UnormPack32 : return 1;
|
|
|
9501 case Format::eD32Sfloat : return 1;
|
|
|
9502 case Format::eS8Uint : return 1;
|
|
|
9503 case Format::eD16UnormS8Uint : return 1;
|
|
|
9504 case Format::eD24UnormS8Uint : return 1;
|
|
|
9505 case Format::eD32SfloatS8Uint : return 1;
|
|
|
9506 case Format::eBc1RgbUnormBlock : return 16;
|
|
|
9507 case Format::eBc1RgbSrgbBlock : return 16;
|
|
|
9508 case Format::eBc1RgbaUnormBlock : return 16;
|
|
|
9509 case Format::eBc1RgbaSrgbBlock : return 16;
|
|
|
9510 case Format::eBc2UnormBlock : return 16;
|
|
|
9511 case Format::eBc2SrgbBlock : return 16;
|
|
|
9512 case Format::eBc3UnormBlock : return 16;
|
|
|
9513 case Format::eBc3SrgbBlock : return 16;
|
|
|
9514 case Format::eBc4UnormBlock : return 16;
|
|
|
9515 case Format::eBc4SnormBlock : return 16;
|
|
|
9516 case Format::eBc5UnormBlock : return 16;
|
|
|
9517 case Format::eBc5SnormBlock : return 16;
|
|
|
9518 case Format::eBc6HUfloatBlock : return 16;
|
|
|
9519 case Format::eBc6HSfloatBlock : return 16;
|
|
|
9520 case Format::eBc7UnormBlock : return 16;
|
|
|
9521 case Format::eBc7SrgbBlock : return 16;
|
|
|
9522 case Format::eEtc2R8G8B8UnormBlock : return 16;
|
|
|
9523 case Format::eEtc2R8G8B8SrgbBlock : return 16;
|
|
|
9524 case Format::eEtc2R8G8B8A1UnormBlock : return 16;
|
|
|
9525 case Format::eEtc2R8G8B8A1SrgbBlock : return 16;
|
|
|
9526 case Format::eEtc2R8G8B8A8UnormBlock : return 16;
|
|
|
9527 case Format::eEtc2R8G8B8A8SrgbBlock : return 16;
|
|
|
9528 case Format::eEacR11UnormBlock : return 16;
|
|
|
9529 case Format::eEacR11SnormBlock : return 16;
|
|
|
9530 case Format::eEacR11G11UnormBlock : return 16;
|
|
|
9531 case Format::eEacR11G11SnormBlock : return 16;
|
|
|
9532 case Format::eAstc4x4UnormBlock : return 16;
|
|
|
9533 case Format::eAstc4x4SrgbBlock : return 16;
|
|
|
9534 case Format::eAstc5x4UnormBlock : return 20;
|
|
|
9535 case Format::eAstc5x4SrgbBlock : return 20;
|
|
|
9536 case Format::eAstc5x5UnormBlock : return 25;
|
|
|
9537 case Format::eAstc5x5SrgbBlock : return 25;
|
|
|
9538 case Format::eAstc6x5UnormBlock : return 30;
|
|
|
9539 case Format::eAstc6x5SrgbBlock : return 30;
|
|
|
9540 case Format::eAstc6x6UnormBlock : return 36;
|
|
|
9541 case Format::eAstc6x6SrgbBlock : return 36;
|
|
|
9542 case Format::eAstc8x5UnormBlock : return 40;
|
|
|
9543 case Format::eAstc8x5SrgbBlock : return 40;
|
|
|
9544 case Format::eAstc8x6UnormBlock : return 48;
|
|
|
9545 case Format::eAstc8x6SrgbBlock : return 48;
|
|
|
9546 case Format::eAstc8x8UnormBlock : return 64;
|
|
|
9547 case Format::eAstc8x8SrgbBlock : return 64;
|
|
|
9548 case Format::eAstc10x5UnormBlock : return 50;
|
|
|
9549 case Format::eAstc10x5SrgbBlock : return 50;
|
|
|
9550 case Format::eAstc10x6UnormBlock : return 60;
|
|
|
9551 case Format::eAstc10x6SrgbBlock : return 60;
|
|
|
9552 case Format::eAstc10x8UnormBlock : return 80;
|
|
|
9553 case Format::eAstc10x8SrgbBlock : return 80;
|
|
|
9554 case Format::eAstc10x10UnormBlock : return 100;
|
|
|
9555 case Format::eAstc10x10SrgbBlock : return 100;
|
|
|
9556 case Format::eAstc12x10UnormBlock : return 120;
|
|
|
9557 case Format::eAstc12x10SrgbBlock : return 120;
|
|
|
9558 case Format::eAstc12x12UnormBlock : return 144;
|
|
|
9559 case Format::eAstc12x12SrgbBlock : return 144;
|
|
|
9560 case Format::eG8B8G8R8422Unorm : return 1;
|
|
|
9561 case Format::eB8G8R8G8422Unorm : return 1;
|
|
|
9562 case Format::eG8B8R83Plane420Unorm : return 1;
|
|
|
9563 case Format::eG8B8R82Plane420Unorm : return 1;
|
|
|
9564 case Format::eG8B8R83Plane422Unorm : return 1;
|
|
|
9565 case Format::eG8B8R82Plane422Unorm : return 1;
|
|
|
9566 case Format::eG8B8R83Plane444Unorm : return 1;
|
|
|
9567 case Format::eR10X6UnormPack16 : return 1;
|
|
|
9568 case Format::eR10X6G10X6Unorm2Pack16 : return 1;
|
|
|
9569 case Format::eR10X6G10X6B10X6A10X6Unorm4Pack16 : return 1;
|
|
|
9570 case Format::eG10X6B10X6G10X6R10X6422Unorm4Pack16 : return 1;
|
|
|
9571 case Format::eB10X6G10X6R10X6G10X6422Unorm4Pack16 : return 1;
|
|
|
9572 case Format::eG10X6B10X6R10X63Plane420Unorm3Pack16 : return 1;
|
|
|
9573 case Format::eG10X6B10X6R10X62Plane420Unorm3Pack16 : return 1;
|
|
|
9574 case Format::eG10X6B10X6R10X63Plane422Unorm3Pack16 : return 1;
|
|
|
9575 case Format::eG10X6B10X6R10X62Plane422Unorm3Pack16 : return 1;
|
|
|
9576 case Format::eG10X6B10X6R10X63Plane444Unorm3Pack16 : return 1;
|
|
|
9577 case Format::eR12X4UnormPack16 : return 1;
|
|
|
9578 case Format::eR12X4G12X4Unorm2Pack16 : return 1;
|
|
|
9579 case Format::eR12X4G12X4B12X4A12X4Unorm4Pack16 : return 1;
|
|
|
9580 case Format::eG12X4B12X4G12X4R12X4422Unorm4Pack16 : return 1;
|
|
|
9581 case Format::eB12X4G12X4R12X4G12X4422Unorm4Pack16 : return 1;
|
|
|
9582 case Format::eG12X4B12X4R12X43Plane420Unorm3Pack16 : return 1;
|
|
|
9583 case Format::eG12X4B12X4R12X42Plane420Unorm3Pack16 : return 1;
|
|
|
9584 case Format::eG12X4B12X4R12X43Plane422Unorm3Pack16 : return 1;
|
|
|
9585 case Format::eG12X4B12X4R12X42Plane422Unorm3Pack16 : return 1;
|
|
|
9586 case Format::eG12X4B12X4R12X43Plane444Unorm3Pack16 : return 1;
|
|
|
9587 case Format::eG16B16G16R16422Unorm : return 1;
|
|
|
9588 case Format::eB16G16R16G16422Unorm : return 1;
|
|
|
9589 case Format::eG16B16R163Plane420Unorm : return 1;
|
|
|
9590 case Format::eG16B16R162Plane420Unorm : return 1;
|
|
|
9591 case Format::eG16B16R163Plane422Unorm : return 1;
|
|
|
9592 case Format::eG16B16R162Plane422Unorm : return 1;
|
|
|
9593 case Format::eG16B16R163Plane444Unorm : return 1;
|
|
|
9594 case Format::eG8B8R82Plane444Unorm : return 1;
|
|
|
9595 case Format::eG10X6B10X6R10X62Plane444Unorm3Pack16 : return 1;
|
|
|
9596 case Format::eG12X4B12X4R12X42Plane444Unorm3Pack16 : return 1;
|
|
|
9597 case Format::eG16B16R162Plane444Unorm : return 1;
|
|
|
9598 case Format::eA4R4G4B4UnormPack16 : return 1;
|
|
|
9599 case Format::eA4B4G4R4UnormPack16 : return 1;
|
|
|
9600 case Format::eAstc4x4SfloatBlock : return 16;
|
|
|
9601 case Format::eAstc5x4SfloatBlock : return 20;
|
|
|
9602 case Format::eAstc5x5SfloatBlock : return 25;
|
|
|
9603 case Format::eAstc6x5SfloatBlock : return 30;
|
|
|
9604 case Format::eAstc6x6SfloatBlock : return 36;
|
|
|
9605 case Format::eAstc8x5SfloatBlock : return 40;
|
|
|
9606 case Format::eAstc8x6SfloatBlock : return 48;
|
|
|
9607 case Format::eAstc8x8SfloatBlock : return 64;
|
|
|
9608 case Format::eAstc10x5SfloatBlock : return 50;
|
|
|
9609 case Format::eAstc10x6SfloatBlock : return 60;
|
|
|
9610 case Format::eAstc10x8SfloatBlock : return 80;
|
|
|
9611 case Format::eAstc10x10SfloatBlock : return 100;
|
|
|
9612 case Format::eAstc12x10SfloatBlock : return 120;
|
|
|
9613 case Format::eAstc12x12SfloatBlock : return 144;
|
|
|
9614 case Format::eA1B5G5R5UnormPack16 : return 1;
|
|
|
9615 case Format::eA8Unorm : return 1;
|
|
|
9616 case Format::ePvrtc12BppUnormBlockIMG : return 1;
|
|
|
9617 case Format::ePvrtc14BppUnormBlockIMG : return 1;
|
|
|
9618 case Format::ePvrtc22BppUnormBlockIMG : return 1;
|
|
|
9619 case Format::ePvrtc24BppUnormBlockIMG : return 1;
|
|
|
9620 case Format::ePvrtc12BppSrgbBlockIMG : return 1;
|
|
|
9621 case Format::ePvrtc14BppSrgbBlockIMG : return 1;
|
|
|
9622 case Format::ePvrtc22BppSrgbBlockIMG : return 1;
|
|
|
9623 case Format::ePvrtc24BppSrgbBlockIMG : return 1;
|
|
|
9624 case Format::eR8BoolARM : return 1;
|
|
|
9625 case Format::eR16G16Sfixed5NV : return 1;
|
|
|
9626 case Format::eR10X6UintPack16ARM : return 1;
|
|
|
9627 case Format::eR10X6G10X6Uint2Pack16ARM : return 1;
|
|
|
9628 case Format::eR10X6G10X6B10X6A10X6Uint4Pack16ARM : return 1;
|
|
|
9629 case Format::eR12X4UintPack16ARM : return 1;
|
|
|
9630 case Format::eR12X4G12X4Uint2Pack16ARM : return 1;
|
|
|
9631 case Format::eR12X4G12X4B12X4A12X4Uint4Pack16ARM : return 1;
|
|
|
9632 case Format::eR14X2UintPack16ARM : return 1;
|
|
|
9633 case Format::eR14X2G14X2Uint2Pack16ARM : return 1;
|
|
|
9634 case Format::eR14X2G14X2B14X2A14X2Uint4Pack16ARM : return 1;
|
|
|
9635 case Format::eR14X2UnormPack16ARM : return 1;
|
|
|
9636 case Format::eR14X2G14X2Unorm2Pack16ARM : return 1;
|
|
|
9637 case Format::eR14X2G14X2B14X2A14X2Unorm4Pack16ARM : return 1;
|
|
|
9638 case Format::eG14X2B14X2R14X22Plane420Unorm3Pack16ARM: return 1;
|
|
|
9639 case Format::eG14X2B14X2R14X22Plane422Unorm3Pack16ARM: return 1;
|
|
|
9640
|
|
|
9641 default: VULKAN_HPP_ASSERT( false ); return 0;
|
|
|
9642 }
|
|
|
9643 }
|
|
|
9644
|
|
|
9645 } // namespace VULKAN_HPP_NAMESPACE
|
|
|
9646 #endif
|
