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annotate fuhtark_test/include/ddk/ntddser.h @ 1501:f40d9d814c08 default tip main

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did: correct vulkan-api generator
author sam <sam@basx.dev>
date Wed, 26 Nov 2025 23:34:29 +0700
parents 91c8c3b7cbf0
children
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1 /*
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2 * ntddser.h
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3 *
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4 * Serial port driver interface
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5 *
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6 * This file is part of the w32api package.
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7 *
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8 * Contributors:
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9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
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10 *
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11 * THIS SOFTWARE IS NOT COPYRIGHTED
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12 *
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13 * This source code is offered for use in the public domain. You may
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14 * use, modify or distribute it freely.
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15 *
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16 * This code is distributed in the hope that it will be useful but
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17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
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18 * DISCLAIMED. This includes but is not limited to warranties of
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19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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20 *
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21 */
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22
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23 #ifndef __NTDDSER_H
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24 #define __NTDDSER_H
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25
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26 #ifdef __cplusplus
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27 extern "C" {
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28 #endif
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29
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30 /* GUIDs */
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31
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32 DEFINE_GUID(GUID_DEVINTERFACE_COMPORT,
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33 0x86e0d1e0L, 0x8089, 0x11d0, 0x9c, 0xe4, 0x08, 0x00, 0x3e, 0x30, 0x1f, 0x73);
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34
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35 #define GUID_CLASS_COMPORT GUID_DEVINTERFACE_COMPORT
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36
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37 DEFINE_GUID(GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR,
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38 0x4D36E978L, 0xE325, 0x11CE, 0xBF, 0xC1, 0x08, 0x00, 0x2B, 0xE1, 0x03, 0x18);
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39
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40 #define GUID_SERENUM_BUS_ENUMERATOR GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR
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41
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42 #define IOCTL_SERIAL_CLEAR_STATS \
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43 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS)
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44 #define IOCTL_SERIAL_CLR_DTR \
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45 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS)
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46 #define IOCTL_SERIAL_CLR_RTS \
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47 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
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48 #define IOCTL_SERIAL_CONFIG_SIZE \
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49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
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50 #define IOCTL_SERIAL_GET_BAUD_RATE \
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51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
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52 #define IOCTL_SERIAL_GET_CHARS \
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53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
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54 #define IOCTL_SERIAL_GET_COMMSTATUS \
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55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS)
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56 #define IOCTL_SERIAL_GET_DTRRTS \
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57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
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58 #define IOCTL_SERIAL_GET_HANDFLOW \
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59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
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60 #define IOCTL_SERIAL_GET_LINE_CONTROL \
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61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
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62 #define IOCTL_SERIAL_GET_MODEM_CONTROL \
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63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
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64 #define IOCTL_SERIAL_GET_MODEMSTATUS \
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65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS)
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66 #define IOCTL_SERIAL_GET_PROPERTIES \
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67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS)
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68 #define IOCTL_SERIAL_GET_STATS \
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69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS)
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70 #define IOCTL_SERIAL_GET_TIMEOUTS \
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71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS)
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72 #define IOCTL_SERIAL_GET_WAIT_MASK \
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73 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS)
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74 #define IOCTL_SERIAL_IMMEDIATE_CHAR \
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75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS)
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76 #define IOCTL_SERIAL_LSRMST_INSERT \
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77 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
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78 #define IOCTL_SERIAL_PURGE \
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79 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
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80 #define IOCTL_SERIAL_RESET_DEVICE \
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81 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
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82 #define IOCTL_SERIAL_SET_BAUD_RATE \
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83 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
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84 #define IOCTL_SERIAL_SET_BREAK_ON \
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85 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
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86 #define IOCTL_SERIAL_SET_BREAK_OFF \
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87 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS)
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88 #define IOCTL_SERIAL_SET_CHARS \
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89 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
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90 #define IOCTL_SERIAL_SET_DTR \
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91 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS)
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92 #define IOCTL_SERIAL_SET_FIFO_CONTROL \
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93 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS)
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94 #define IOCTL_SERIAL_SET_HANDFLOW \
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95 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS)
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96 #define IOCTL_SERIAL_SET_LINE_CONTROL \
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97 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
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98 #define IOCTL_SERIAL_SET_MODEM_CONTROL \
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99 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
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100 #define IOCTL_SERIAL_SET_QUEUE_SIZE \
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101 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
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102 #define IOCTL_SERIAL_SET_RTS \
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103 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
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104 #define IOCTL_SERIAL_SET_TIMEOUTS \
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105 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS)
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106 #define IOCTL_SERIAL_SET_WAIT_MASK \
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107 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
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108 #define IOCTL_SERIAL_SET_XOFF \
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109 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
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110 #define IOCTL_SERIAL_SET_XON \
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111 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
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112 #define IOCTL_SERIAL_WAIT_ON_MASK \
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113 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS)
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114 #define IOCTL_SERIAL_XOFF_COUNTER \
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115 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS)
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116
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117 #define IOCTL_SERIAL_INTERNAL_BASIC_SETTINGS \
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118 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
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119 #define IOCTL_SERIAL_INTERNAL_CANCEL_WAIT_WAKE \
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120 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
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121 #define IOCTL_SERIAL_INTERNAL_DO_WAIT_WAKE \
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122 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
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123 #define IOCTL_SERIAL_INTERNAL_RESTORE_SETTINGS \
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124 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
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125
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126 #define IOCTL_SERENUM_PORT_DESC \
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127 CTL_CODE (FILE_DEVICE_SERENUM, 130, METHOD_BUFFERED, FILE_ANY_ACCESS)
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128 #define IOCTL_SERENUM_GET_PORT_NAME \
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129 CTL_CODE (FILE_DEVICE_SERENUM, 131, METHOD_BUFFERED, FILE_ANY_ACCESS)
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130
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131 #define IOCTL_INTERNAL_SERENUM_REMOVE_SELF \
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132 CTL_CODE (FILE_DEVICE_SERENUM, 129, METHOD_NEITHER, FILE_ANY_ACCESS)
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133
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diff changeset
134
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diff changeset
135 typedef struct _SERIAL_BAUD_RATE {
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136 ULONG BaudRate;
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137 } SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE;
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138
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139 /* SERIAL_BAUD_RATE.BaudRate constants */
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diff changeset
140 #define SERIAL_BAUD_075 0x00000001
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141 #define SERIAL_BAUD_110 0x00000002
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142 #define SERIAL_BAUD_134_5 0x00000004
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143 #define SERIAL_BAUD_150 0x00000008
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144 #define SERIAL_BAUD_300 0x00000010
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145 #define SERIAL_BAUD_600 0x00000020
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146 #define SERIAL_BAUD_1200 0x00000040
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147 #define SERIAL_BAUD_1800 0x00000080
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148 #define SERIAL_BAUD_2400 0x00000100
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149 #define SERIAL_BAUD_4800 0x00000200
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150 #define SERIAL_BAUD_7200 0x00000400
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151 #define SERIAL_BAUD_9600 0x00000800
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152 #define SERIAL_BAUD_14400 0x00001000
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153 #define SERIAL_BAUD_19200 0x00002000
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154 #define SERIAL_BAUD_38400 0x00004000
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sam <sam@basx.dev>
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diff changeset
155 #define SERIAL_BAUD_56K 0x00008000
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sam <sam@basx.dev>
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156 #define SERIAL_BAUD_128K 0x00010000
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sam <sam@basx.dev>
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157 #define SERIAL_BAUD_115200 0x00020000
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158 #define SERIAL_BAUD_57600 0x00040000
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159 #define SERIAL_BAUD_USER 0x10000000
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160
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161 typedef struct _SERIAL_CHARS {
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162 UCHAR EofChar;
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163 UCHAR ErrorChar;
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sam <sam@basx.dev>
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164 UCHAR BreakChar;
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165 UCHAR EventChar;
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sam <sam@basx.dev>
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166 UCHAR XonChar;
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sam <sam@basx.dev>
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167 UCHAR XoffChar;
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168 } SERIAL_CHARS, *PSERIAL_CHARS;
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169
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170 typedef struct _SERIAL_STATUS {
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171 ULONG Errors;
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sam <sam@basx.dev>
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172 ULONG HoldReasons;
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sam <sam@basx.dev>
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173 ULONG AmountInInQueue;
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sam <sam@basx.dev>
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174 ULONG AmountInOutQueue;
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175 BOOLEAN EofReceived;
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sam <sam@basx.dev>
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176 BOOLEAN WaitForImmediate;
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177 } SERIAL_STATUS, *PSERIAL_STATUS;
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178
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179 typedef struct _SERIAL_HANDFLOW {
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180 ULONG ControlHandShake;
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181 ULONG FlowReplace;
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182 LONG XonLimit;
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diff changeset
183 LONG XoffLimit;
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184 } SERIAL_HANDFLOW, *PSERIAL_HANDFLOW;
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185
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diff changeset
186 #define SERIAL_DTR_MASK 0x00000003
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sam <sam@basx.dev>
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187 #define SERIAL_DTR_CONTROL 0x00000001
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sam <sam@basx.dev>
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188 #define SERIAL_DTR_HANDSHAKE 0x00000002
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sam <sam@basx.dev>
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189 #define SERIAL_CTS_HANDSHAKE 0x00000008
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sam <sam@basx.dev>
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diff changeset
190 #define SERIAL_DSR_HANDSHAKE 0x00000010
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sam <sam@basx.dev>
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diff changeset
191 #define SERIAL_DCD_HANDSHAKE 0x00000020
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sam <sam@basx.dev>
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192 #define SERIAL_OUT_HANDSHAKEMASK 0x00000038
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sam <sam@basx.dev>
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193 #define SERIAL_DSR_SENSITIVITY 0x00000040
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194 #define SERIAL_ERROR_ABORT 0x80000000
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sam <sam@basx.dev>
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diff changeset
195 #define SERIAL_CONTROL_INVALID 0x7fffff84
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sam <sam@basx.dev>
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diff changeset
196 #define SERIAL_AUTO_TRANSMIT 0x00000001
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sam <sam@basx.dev>
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diff changeset
197 #define SERIAL_AUTO_RECEIVE 0x00000002
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198 #define SERIAL_ERROR_CHAR 0x00000004
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diff changeset
199 #define SERIAL_NULL_STRIPPING 0x00000008
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diff changeset
200 #define SERIAL_BREAK_CHAR 0x00000010
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sam <sam@basx.dev>
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diff changeset
201 #define SERIAL_RTS_MASK 0x000000c0
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sam <sam@basx.dev>
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diff changeset
202 #define SERIAL_RTS_CONTROL 0x00000040
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sam <sam@basx.dev>
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diff changeset
203 #define SERIAL_RTS_HANDSHAKE 0x00000080
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sam <sam@basx.dev>
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diff changeset
204 #define SERIAL_TRANSMIT_TOGGLE 0x000000c0
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sam <sam@basx.dev>
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diff changeset
205 #define SERIAL_XOFF_CONTINUE 0x80000000
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206 #define SERIAL_FLOW_INVALID 0x7fffff20
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diff changeset
207
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208 typedef struct _SERIAL_LINE_CONTROL {
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209 UCHAR StopBits;
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210 UCHAR Parity;
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211 UCHAR WordLength;
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212 } SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL;
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diff changeset
213
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diff changeset
214 /* SERIAL_LINE_CONTROL.StopBits constants */
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diff changeset
215 #define STOP_BIT_1 0x00
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diff changeset
216 #define STOP_BITS_1_5 0x01
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diff changeset
217 #define STOP_BITS_2 0x02
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diff changeset
218
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diff changeset
219 /* SERIAL_LINE_CONTROL.Parity constants */
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diff changeset
220 #define NO_PARITY 0x00
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diff changeset
221 #define ODD_PARITY 0x01
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diff changeset
222 #define EVEN_PARITY 0x02
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sam <sam@basx.dev>
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diff changeset
223 #define MARK_PARITY 0x03
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sam <sam@basx.dev>
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diff changeset
224 #define SPACE_PARITY 0x04
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diff changeset
225
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diff changeset
226 /* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */
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diff changeset
227 #define SERIAL_IOC_MCR_DTR 0x00000001
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sam <sam@basx.dev>
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diff changeset
228 #define SERIAL_IOC_MCR_RTS 0x00000002
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sam <sam@basx.dev>
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diff changeset
229 #define SERIAL_IOC_MCR_OUT1 0x00000004
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diff changeset
230 #define SERIAL_IOC_MCR_OUT2 0x00000008
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sam <sam@basx.dev>
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diff changeset
231 #define SERIAL_IOC_MCR_LOOP 0x00000010
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diff changeset
232
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233 typedef struct _SERIAL_COMMPROP {
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234 USHORT PacketLength;
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235 USHORT PacketVersion;
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sam <sam@basx.dev>
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236 ULONG ServiceMask;
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sam <sam@basx.dev>
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diff changeset
237 ULONG Reserved1;
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sam <sam@basx.dev>
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diff changeset
238 ULONG MaxTxQueue;
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sam <sam@basx.dev>
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diff changeset
239 ULONG MaxRxQueue;
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sam <sam@basx.dev>
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diff changeset
240 ULONG MaxBaud;
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sam <sam@basx.dev>
parents:
diff changeset
241 ULONG ProvSubType;
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sam <sam@basx.dev>
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diff changeset
242 ULONG ProvCapabilities;
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sam <sam@basx.dev>
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diff changeset
243 ULONG SettableParams;
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sam <sam@basx.dev>
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diff changeset
244 ULONG SettableBaud;
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diff changeset
245 USHORT SettableData;
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246 USHORT SettableStopParity;
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diff changeset
247 ULONG CurrentTxQueue;
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sam <sam@basx.dev>
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diff changeset
248 ULONG CurrentRxQueue;
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sam <sam@basx.dev>
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diff changeset
249 ULONG ProvSpec1;
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sam <sam@basx.dev>
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diff changeset
250 ULONG ProvSpec2;
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sam <sam@basx.dev>
parents:
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251 WCHAR ProvChar[1];
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sam <sam@basx.dev>
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252 } SERIAL_COMMPROP, *PSERIAL_COMMPROP;
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diff changeset
253
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sam <sam@basx.dev>
parents:
diff changeset
254 /* SERIAL_COMMPROP.SettableParams flags */
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sam <sam@basx.dev>
parents:
diff changeset
255 #define SERIAL_SP_PARITY 0x0001
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sam <sam@basx.dev>
parents:
diff changeset
256 #define SERIAL_SP_BAUD 0x0002
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sam <sam@basx.dev>
parents:
diff changeset
257 #define SERIAL_SP_DATABITS 0x0004
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sam <sam@basx.dev>
parents:
diff changeset
258 #define SERIAL_SP_STOPBITS 0x0008
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sam <sam@basx.dev>
parents:
diff changeset
259 #define SERIAL_SP_HANDSHAKING 0x0010
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sam <sam@basx.dev>
parents:
diff changeset
260 #define SERIAL_SP_PARITY_CHECK 0x0020
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sam <sam@basx.dev>
parents:
diff changeset
261 #define SERIAL_SP_CARRIER_DETECT 0x0040
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sam <sam@basx.dev>
parents:
diff changeset
262
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sam <sam@basx.dev>
parents:
diff changeset
263 /* SERIAL_COMMPROP.ProvCapabilities flags */
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sam <sam@basx.dev>
parents:
diff changeset
264 #define SERIAL_PCF_DTRDSR 0x00000001
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sam <sam@basx.dev>
parents:
diff changeset
265 #define SERIAL_PCF_RTSCTS 0x00000002
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sam <sam@basx.dev>
parents:
diff changeset
266 #define SERIAL_PCF_CD 0x00000004
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sam <sam@basx.dev>
parents:
diff changeset
267 #define SERIAL_PCF_PARITY_CHECK 0x00000008
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sam <sam@basx.dev>
parents:
diff changeset
268 #define SERIAL_PCF_XONXOFF 0x00000010
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sam <sam@basx.dev>
parents:
diff changeset
269 #define SERIAL_PCF_SETXCHAR 0x00000020
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sam <sam@basx.dev>
parents:
diff changeset
270 #define SERIAL_PCF_TOTALTIMEOUTS 0x00000040
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sam <sam@basx.dev>
parents:
diff changeset
271 #define SERIAL_PCF_INTTIMEOUTS 0x00000080
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sam <sam@basx.dev>
parents:
diff changeset
272 #define SERIAL_PCF_SPECIALCHARS 0x00000100
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sam <sam@basx.dev>
parents:
diff changeset
273 #define SERIAL_PCF_16BITMODE 0x00000200
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274
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275 /* SERIAL_COMMPROP.SettableData flags */
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276 #define SERIAL_DATABITS_5 0x0001
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277 #define SERIAL_DATABITS_6 0x0002
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278 #define SERIAL_DATABITS_7 0x0004
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279 #define SERIAL_DATABITS_8 0x0008
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280 #define SERIAL_DATABITS_16 0x0010
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281 #define SERIAL_DATABITS_16X 0x0020
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282
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283 /* SERIAL_COMMPROP.SettableStopParity flags */
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284 #define SERIAL_STOPBITS_10 0x0001
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285 #define SERIAL_STOPBITS_15 0x0002
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286 #define SERIAL_STOPBITS_20 0x0004
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287 #define SERIAL_PARITY_NONE 0x0100
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288 #define SERIAL_PARITY_ODD 0x0200
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289 #define SERIAL_PARITY_EVEN 0x0400
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290 #define SERIAL_PARITY_MARK 0x0800
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291 #define SERIAL_PARITY_SPACE 0x1000
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292
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293 typedef struct _SERIALPERF_STATS {
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294 ULONG ReceivedCount;
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295 ULONG TransmittedCount;
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296 ULONG FrameErrorCount;
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297 ULONG SerialOverrunErrorCount;
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298 ULONG BufferOverrunErrorCount;
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299 ULONG ParityErrorCount;
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300 } SERIALPERF_STATS, *PSERIALPERF_STATS;
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301
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302 typedef struct _SERIAL_TIMEOUTS {
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303 ULONG ReadIntervalTimeout;
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304 ULONG ReadTotalTimeoutMultiplier;
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diff changeset
305 ULONG ReadTotalTimeoutConstant;
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306 ULONG WriteTotalTimeoutMultiplier;
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307 ULONG WriteTotalTimeoutConstant;
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308 } SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS;
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309
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310 /* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */
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311 #define SERIAL_EV_RXCHAR 0x0001
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sam <sam@basx.dev>
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312 #define SERIAL_EV_RXFLAG 0x0002
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313 #define SERIAL_EV_TXEMPTY 0x0004
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sam <sam@basx.dev>
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314 #define SERIAL_EV_CTS 0x0008
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315 #define SERIAL_EV_DSR 0x0010
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sam <sam@basx.dev>
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316 #define SERIAL_EV_RLSD 0x0020
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317 #define SERIAL_EV_BREAK 0x0040
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318 #define SERIAL_EV_ERR 0x0080
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319 #define SERIAL_EV_RING 0x0100
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320 #define SERIAL_EV_PERR 0x0200
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sam <sam@basx.dev>
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321 #define SERIAL_EV_RX80FULL 0x0400
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sam <sam@basx.dev>
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diff changeset
322 #define SERIAL_EV_EVENT1 0x0800
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sam <sam@basx.dev>
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323 #define SERIAL_EV_EVENT2 0x1000
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324
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sam <sam@basx.dev>
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diff changeset
325 /* IOCTL_SERIAL_LSRMST_INSERT constants */
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diff changeset
326 #define SERIAL_LSRMST_LSR_DATA 0x01
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327 #define SERIAL_LSRMST_LSR_NODATA 0x02
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328 #define SERIAL_LSRMST_MST 0x03
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329 #define SERIAL_LSRMST_ESCAPE 0x00
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diff changeset
330
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diff changeset
331 /* IOCTL_SERIAL_PURGE constants */
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sam <sam@basx.dev>
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diff changeset
332 #define SERIAL_PURGE_TXABORT 0x00000001
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sam <sam@basx.dev>
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333 #define SERIAL_PURGE_RXABORT 0x00000002
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sam <sam@basx.dev>
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334 #define SERIAL_PURGE_TXCLEAR 0x00000004
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sam <sam@basx.dev>
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diff changeset
335 #define SERIAL_PURGE_RXCLEAR 0x00000008
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diff changeset
336
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diff changeset
337 /* IOCTL_SERIAL_SET_FIFO_CONTROL constants */
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diff changeset
338 #define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001
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339 #define SERIAL_IOC_FCR_RCVR_RESET 0x00000002
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340 #define SERIAL_IOC_FCR_XMIT_RESET 0x00000004
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341 #define SERIAL_IOC_FCR_DMA_MODE 0x00000008
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342 #define SERIAL_IOC_FCR_RES1 0x00000010
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sam <sam@basx.dev>
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diff changeset
343 #define SERIAL_IOC_FCR_RES2 0x00000020
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344 #define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040
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345 #define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080
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346
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347 typedef struct _SERIAL_QUEUE_SIZE {
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348 ULONG InSize;
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349 ULONG OutSize;
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350 } SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE;
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351
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352 typedef struct _SERIAL_XOFF_COUNTER {
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diff changeset
353 ULONG Timeout;
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diff changeset
354 LONG Counter;
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diff changeset
355 UCHAR XoffChar;
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356 } SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER;
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diff changeset
357
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diff changeset
358 typedef struct _SERIAL_BASIC_SETTINGS {
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359 SERIAL_TIMEOUTS Timeouts;
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sam <sam@basx.dev>
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diff changeset
360 SERIAL_HANDFLOW HandFlow;
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sam <sam@basx.dev>
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diff changeset
361 ULONG RxFifo;
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sam <sam@basx.dev>
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diff changeset
362 ULONG TxFifo;
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sam <sam@basx.dev>
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363 } SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS;
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diff changeset
364
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diff changeset
365 typedef struct _SERENUM_PORT_DESC {
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366 ULONG Size;
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367 PVOID PortHandle;
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diff changeset
368 PHYSICAL_ADDRESS PortAddress;
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369 USHORT Reserved[1];
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370 } SERENUM_PORT_DESC, *PSERENUM_PORT_DESC;
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diff changeset
371
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diff changeset
372 typedef UCHAR
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373 (NTAPI*PSERENUM_READPORT)(
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374 PVOID SerPortAddress);
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diff changeset
375
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diff changeset
376 typedef VOID
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377 (NTAPI*PSERENUM_WRITEPORT)(
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diff changeset
378 PVOID SerPortAddress,
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diff changeset
379 UCHAR Value);
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sam <sam@basx.dev>
parents:
diff changeset
380
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sam <sam@basx.dev>
parents:
diff changeset
381 typedef enum _SERENUM_PORTION {
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sam <sam@basx.dev>
parents:
diff changeset
382 SerenumFirstHalf,
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sam <sam@basx.dev>
parents:
diff changeset
383 SerenumSecondHalf,
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sam <sam@basx.dev>
parents:
diff changeset
384 SerenumWhole
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sam <sam@basx.dev>
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385 } SERENUM_PORTION;
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parents:
diff changeset
386
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sam <sam@basx.dev>
parents:
diff changeset
387 typedef struct _SERENUM_PORT_PARAMETERS {
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diff changeset
388 ULONG Size;
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diff changeset
389 PSERENUM_READPORT ReadAccessor;
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sam <sam@basx.dev>
parents:
diff changeset
390 PSERENUM_WRITEPORT WriteAccessor;
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sam <sam@basx.dev>
parents:
diff changeset
391 PVOID SerPortAddress;
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sam <sam@basx.dev>
parents:
diff changeset
392 PVOID HardwareHandle;
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sam <sam@basx.dev>
parents:
diff changeset
393 SERENUM_PORTION Portion;
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sam <sam@basx.dev>
parents:
diff changeset
394 USHORT NumberAxis;
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sam <sam@basx.dev>
parents:
diff changeset
395 USHORT Reserved[3];
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sam <sam@basx.dev>
parents:
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396 } SERENUM_PORT_PARAMETERS, *PSERENUM_PORT_PARAMETERS;
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parents:
diff changeset
397
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sam <sam@basx.dev>
parents:
diff changeset
398 #define SERIAL_ERROR_BREAK 0x00000001
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sam <sam@basx.dev>
parents:
diff changeset
399 #define SERIAL_ERROR_FRAMING 0x00000002
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sam <sam@basx.dev>
parents:
diff changeset
400 #define SERIAL_ERROR_OVERRUN 0x00000004
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sam <sam@basx.dev>
parents:
diff changeset
401 #define SERIAL_ERROR_QUEUEOVERRUN 0x00000008
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sam <sam@basx.dev>
parents:
diff changeset
402 #define SERIAL_ERROR_PARITY 0x00000010
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sam <sam@basx.dev>
parents:
diff changeset
403
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sam <sam@basx.dev>
parents:
diff changeset
404 #define SERIAL_SP_UNSPECIFIED 0x00000000
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sam <sam@basx.dev>
parents:
diff changeset
405 #define SERIAL_SP_RS232 0x00000001
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sam <sam@basx.dev>
parents:
diff changeset
406 #define SERIAL_SP_PARALLEL 0x00000002
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sam <sam@basx.dev>
parents:
diff changeset
407 #define SERIAL_SP_RS422 0x00000003
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sam <sam@basx.dev>
parents:
diff changeset
408 #define SERIAL_SP_RS423 0x00000004
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sam <sam@basx.dev>
parents:
diff changeset
409 #define SERIAL_SP_RS449 0x00000005
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sam <sam@basx.dev>
parents:
diff changeset
410 #define SERIAL_SP_MODEM 0X00000006
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sam <sam@basx.dev>
parents:
diff changeset
411 #define SERIAL_SP_FAX 0x00000021
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sam <sam@basx.dev>
parents:
diff changeset
412 #define SERIAL_SP_SCANNER 0x00000022
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sam <sam@basx.dev>
parents:
diff changeset
413 #define SERIAL_SP_BRIDGE 0x00000100
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sam <sam@basx.dev>
parents:
diff changeset
414 #define SERIAL_SP_LAT 0x00000101
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sam <sam@basx.dev>
parents:
diff changeset
415 #define SERIAL_SP_TELNET 0x00000102
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sam <sam@basx.dev>
parents:
diff changeset
416 #define SERIAL_SP_X25 0x00000103
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sam <sam@basx.dev>
parents:
diff changeset
417 #define SERIAL_SP_SERIALCOMM 0x00000001
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sam <sam@basx.dev>
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418
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419 #define SERIAL_TX_WAITING_FOR_CTS 0x00000001
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420 #define SERIAL_TX_WAITING_FOR_DSR 0x00000002
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421 #define SERIAL_TX_WAITING_FOR_DCD 0x00000004
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422 #define SERIAL_TX_WAITING_FOR_XON 0x00000008
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423 #define SERIAL_TX_WAITING_XOFF_SENT 0x00000010
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424 #define SERIAL_TX_WAITING_ON_BREAK 0x00000020
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425 #define SERIAL_RX_WAITING_FOR_DSR 0x00000040
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426
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427 #define SERIAL_DTR_STATE 0x00000001
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428 #define SERIAL_RTS_STATE 0x00000002
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429 #define SERIAL_CTS_STATE 0x00000010
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430 #define SERIAL_DSR_STATE 0x00000020
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431 #define SERIAL_RI_STATE 0x00000040
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432 #define SERIAL_DCD_STATE 0x00000080
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433
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434 typedef struct _SERIALCONFIG {
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435 ULONG Size;
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436 USHORT Version;
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437 ULONG SubType;
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438 ULONG ProvOffset;
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439 ULONG ProviderSize;
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440 WCHAR ProviderData[1];
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441 } SERIALCONFIG,*PSERIALCONFIG;
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442
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443 #ifdef __cplusplus
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444 }
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445 #endif
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446
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447 #endif /* __NTDDSER_H */