Mercurial > games > semicongine
comparison fuhtark_test/include/ddk/ntddser.h @ 1500:91c8c3b7cbf0
add: futhark tests for generating vulkan api
| author | sam <sam@basx.dev> |
|---|---|
| date | Wed, 26 Nov 2025 21:36:48 +0700 |
| parents | |
| children |
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| 1499:1f58458b7ef7 | 1500:91c8c3b7cbf0 |
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| 1 /* | |
| 2 * ntddser.h | |
| 3 * | |
| 4 * Serial port driver interface | |
| 5 * | |
| 6 * This file is part of the w32api package. | |
| 7 * | |
| 8 * Contributors: | |
| 9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net> | |
| 10 * | |
| 11 * THIS SOFTWARE IS NOT COPYRIGHTED | |
| 12 * | |
| 13 * This source code is offered for use in the public domain. You may | |
| 14 * use, modify or distribute it freely. | |
| 15 * | |
| 16 * This code is distributed in the hope that it will be useful but | |
| 17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY | |
| 18 * DISCLAIMED. This includes but is not limited to warranties of | |
| 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
| 20 * | |
| 21 */ | |
| 22 | |
| 23 #ifndef __NTDDSER_H | |
| 24 #define __NTDDSER_H | |
| 25 | |
| 26 #ifdef __cplusplus | |
| 27 extern "C" { | |
| 28 #endif | |
| 29 | |
| 30 /* GUIDs */ | |
| 31 | |
| 32 DEFINE_GUID(GUID_DEVINTERFACE_COMPORT, | |
| 33 0x86e0d1e0L, 0x8089, 0x11d0, 0x9c, 0xe4, 0x08, 0x00, 0x3e, 0x30, 0x1f, 0x73); | |
| 34 | |
| 35 #define GUID_CLASS_COMPORT GUID_DEVINTERFACE_COMPORT | |
| 36 | |
| 37 DEFINE_GUID(GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR, | |
| 38 0x4D36E978L, 0xE325, 0x11CE, 0xBF, 0xC1, 0x08, 0x00, 0x2B, 0xE1, 0x03, 0x18); | |
| 39 | |
| 40 #define GUID_SERENUM_BUS_ENUMERATOR GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR | |
| 41 | |
| 42 #define IOCTL_SERIAL_CLEAR_STATS \ | |
| 43 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 44 #define IOCTL_SERIAL_CLR_DTR \ | |
| 45 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 46 #define IOCTL_SERIAL_CLR_RTS \ | |
| 47 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 48 #define IOCTL_SERIAL_CONFIG_SIZE \ | |
| 49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 50 #define IOCTL_SERIAL_GET_BAUD_RATE \ | |
| 51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 52 #define IOCTL_SERIAL_GET_CHARS \ | |
| 53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 54 #define IOCTL_SERIAL_GET_COMMSTATUS \ | |
| 55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 56 #define IOCTL_SERIAL_GET_DTRRTS \ | |
| 57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 58 #define IOCTL_SERIAL_GET_HANDFLOW \ | |
| 59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 60 #define IOCTL_SERIAL_GET_LINE_CONTROL \ | |
| 61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 62 #define IOCTL_SERIAL_GET_MODEM_CONTROL \ | |
| 63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 64 #define IOCTL_SERIAL_GET_MODEMSTATUS \ | |
| 65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 66 #define IOCTL_SERIAL_GET_PROPERTIES \ | |
| 67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 68 #define IOCTL_SERIAL_GET_STATS \ | |
| 69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 70 #define IOCTL_SERIAL_GET_TIMEOUTS \ | |
| 71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 72 #define IOCTL_SERIAL_GET_WAIT_MASK \ | |
| 73 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 74 #define IOCTL_SERIAL_IMMEDIATE_CHAR \ | |
| 75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 76 #define IOCTL_SERIAL_LSRMST_INSERT \ | |
| 77 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 78 #define IOCTL_SERIAL_PURGE \ | |
| 79 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 80 #define IOCTL_SERIAL_RESET_DEVICE \ | |
| 81 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 82 #define IOCTL_SERIAL_SET_BAUD_RATE \ | |
| 83 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 84 #define IOCTL_SERIAL_SET_BREAK_ON \ | |
| 85 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 86 #define IOCTL_SERIAL_SET_BREAK_OFF \ | |
| 87 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 88 #define IOCTL_SERIAL_SET_CHARS \ | |
| 89 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 90 #define IOCTL_SERIAL_SET_DTR \ | |
| 91 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 92 #define IOCTL_SERIAL_SET_FIFO_CONTROL \ | |
| 93 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 94 #define IOCTL_SERIAL_SET_HANDFLOW \ | |
| 95 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 96 #define IOCTL_SERIAL_SET_LINE_CONTROL \ | |
| 97 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 98 #define IOCTL_SERIAL_SET_MODEM_CONTROL \ | |
| 99 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 100 #define IOCTL_SERIAL_SET_QUEUE_SIZE \ | |
| 101 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 102 #define IOCTL_SERIAL_SET_RTS \ | |
| 103 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 104 #define IOCTL_SERIAL_SET_TIMEOUTS \ | |
| 105 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 106 #define IOCTL_SERIAL_SET_WAIT_MASK \ | |
| 107 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 108 #define IOCTL_SERIAL_SET_XOFF \ | |
| 109 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 110 #define IOCTL_SERIAL_SET_XON \ | |
| 111 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 112 #define IOCTL_SERIAL_WAIT_ON_MASK \ | |
| 113 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 114 #define IOCTL_SERIAL_XOFF_COUNTER \ | |
| 115 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 116 | |
| 117 #define IOCTL_SERIAL_INTERNAL_BASIC_SETTINGS \ | |
| 118 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 119 #define IOCTL_SERIAL_INTERNAL_CANCEL_WAIT_WAKE \ | |
| 120 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 121 #define IOCTL_SERIAL_INTERNAL_DO_WAIT_WAKE \ | |
| 122 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 123 #define IOCTL_SERIAL_INTERNAL_RESTORE_SETTINGS \ | |
| 124 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 125 | |
| 126 #define IOCTL_SERENUM_PORT_DESC \ | |
| 127 CTL_CODE (FILE_DEVICE_SERENUM, 130, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 128 #define IOCTL_SERENUM_GET_PORT_NAME \ | |
| 129 CTL_CODE (FILE_DEVICE_SERENUM, 131, METHOD_BUFFERED, FILE_ANY_ACCESS) | |
| 130 | |
| 131 #define IOCTL_INTERNAL_SERENUM_REMOVE_SELF \ | |
| 132 CTL_CODE (FILE_DEVICE_SERENUM, 129, METHOD_NEITHER, FILE_ANY_ACCESS) | |
| 133 | |
| 134 | |
| 135 typedef struct _SERIAL_BAUD_RATE { | |
| 136 ULONG BaudRate; | |
| 137 } SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE; | |
| 138 | |
| 139 /* SERIAL_BAUD_RATE.BaudRate constants */ | |
| 140 #define SERIAL_BAUD_075 0x00000001 | |
| 141 #define SERIAL_BAUD_110 0x00000002 | |
| 142 #define SERIAL_BAUD_134_5 0x00000004 | |
| 143 #define SERIAL_BAUD_150 0x00000008 | |
| 144 #define SERIAL_BAUD_300 0x00000010 | |
| 145 #define SERIAL_BAUD_600 0x00000020 | |
| 146 #define SERIAL_BAUD_1200 0x00000040 | |
| 147 #define SERIAL_BAUD_1800 0x00000080 | |
| 148 #define SERIAL_BAUD_2400 0x00000100 | |
| 149 #define SERIAL_BAUD_4800 0x00000200 | |
| 150 #define SERIAL_BAUD_7200 0x00000400 | |
| 151 #define SERIAL_BAUD_9600 0x00000800 | |
| 152 #define SERIAL_BAUD_14400 0x00001000 | |
| 153 #define SERIAL_BAUD_19200 0x00002000 | |
| 154 #define SERIAL_BAUD_38400 0x00004000 | |
| 155 #define SERIAL_BAUD_56K 0x00008000 | |
| 156 #define SERIAL_BAUD_128K 0x00010000 | |
| 157 #define SERIAL_BAUD_115200 0x00020000 | |
| 158 #define SERIAL_BAUD_57600 0x00040000 | |
| 159 #define SERIAL_BAUD_USER 0x10000000 | |
| 160 | |
| 161 typedef struct _SERIAL_CHARS { | |
| 162 UCHAR EofChar; | |
| 163 UCHAR ErrorChar; | |
| 164 UCHAR BreakChar; | |
| 165 UCHAR EventChar; | |
| 166 UCHAR XonChar; | |
| 167 UCHAR XoffChar; | |
| 168 } SERIAL_CHARS, *PSERIAL_CHARS; | |
| 169 | |
| 170 typedef struct _SERIAL_STATUS { | |
| 171 ULONG Errors; | |
| 172 ULONG HoldReasons; | |
| 173 ULONG AmountInInQueue; | |
| 174 ULONG AmountInOutQueue; | |
| 175 BOOLEAN EofReceived; | |
| 176 BOOLEAN WaitForImmediate; | |
| 177 } SERIAL_STATUS, *PSERIAL_STATUS; | |
| 178 | |
| 179 typedef struct _SERIAL_HANDFLOW { | |
| 180 ULONG ControlHandShake; | |
| 181 ULONG FlowReplace; | |
| 182 LONG XonLimit; | |
| 183 LONG XoffLimit; | |
| 184 } SERIAL_HANDFLOW, *PSERIAL_HANDFLOW; | |
| 185 | |
| 186 #define SERIAL_DTR_MASK 0x00000003 | |
| 187 #define SERIAL_DTR_CONTROL 0x00000001 | |
| 188 #define SERIAL_DTR_HANDSHAKE 0x00000002 | |
| 189 #define SERIAL_CTS_HANDSHAKE 0x00000008 | |
| 190 #define SERIAL_DSR_HANDSHAKE 0x00000010 | |
| 191 #define SERIAL_DCD_HANDSHAKE 0x00000020 | |
| 192 #define SERIAL_OUT_HANDSHAKEMASK 0x00000038 | |
| 193 #define SERIAL_DSR_SENSITIVITY 0x00000040 | |
| 194 #define SERIAL_ERROR_ABORT 0x80000000 | |
| 195 #define SERIAL_CONTROL_INVALID 0x7fffff84 | |
| 196 #define SERIAL_AUTO_TRANSMIT 0x00000001 | |
| 197 #define SERIAL_AUTO_RECEIVE 0x00000002 | |
| 198 #define SERIAL_ERROR_CHAR 0x00000004 | |
| 199 #define SERIAL_NULL_STRIPPING 0x00000008 | |
| 200 #define SERIAL_BREAK_CHAR 0x00000010 | |
| 201 #define SERIAL_RTS_MASK 0x000000c0 | |
| 202 #define SERIAL_RTS_CONTROL 0x00000040 | |
| 203 #define SERIAL_RTS_HANDSHAKE 0x00000080 | |
| 204 #define SERIAL_TRANSMIT_TOGGLE 0x000000c0 | |
| 205 #define SERIAL_XOFF_CONTINUE 0x80000000 | |
| 206 #define SERIAL_FLOW_INVALID 0x7fffff20 | |
| 207 | |
| 208 typedef struct _SERIAL_LINE_CONTROL { | |
| 209 UCHAR StopBits; | |
| 210 UCHAR Parity; | |
| 211 UCHAR WordLength; | |
| 212 } SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL; | |
| 213 | |
| 214 /* SERIAL_LINE_CONTROL.StopBits constants */ | |
| 215 #define STOP_BIT_1 0x00 | |
| 216 #define STOP_BITS_1_5 0x01 | |
| 217 #define STOP_BITS_2 0x02 | |
| 218 | |
| 219 /* SERIAL_LINE_CONTROL.Parity constants */ | |
| 220 #define NO_PARITY 0x00 | |
| 221 #define ODD_PARITY 0x01 | |
| 222 #define EVEN_PARITY 0x02 | |
| 223 #define MARK_PARITY 0x03 | |
| 224 #define SPACE_PARITY 0x04 | |
| 225 | |
| 226 /* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */ | |
| 227 #define SERIAL_IOC_MCR_DTR 0x00000001 | |
| 228 #define SERIAL_IOC_MCR_RTS 0x00000002 | |
| 229 #define SERIAL_IOC_MCR_OUT1 0x00000004 | |
| 230 #define SERIAL_IOC_MCR_OUT2 0x00000008 | |
| 231 #define SERIAL_IOC_MCR_LOOP 0x00000010 | |
| 232 | |
| 233 typedef struct _SERIAL_COMMPROP { | |
| 234 USHORT PacketLength; | |
| 235 USHORT PacketVersion; | |
| 236 ULONG ServiceMask; | |
| 237 ULONG Reserved1; | |
| 238 ULONG MaxTxQueue; | |
| 239 ULONG MaxRxQueue; | |
| 240 ULONG MaxBaud; | |
| 241 ULONG ProvSubType; | |
| 242 ULONG ProvCapabilities; | |
| 243 ULONG SettableParams; | |
| 244 ULONG SettableBaud; | |
| 245 USHORT SettableData; | |
| 246 USHORT SettableStopParity; | |
| 247 ULONG CurrentTxQueue; | |
| 248 ULONG CurrentRxQueue; | |
| 249 ULONG ProvSpec1; | |
| 250 ULONG ProvSpec2; | |
| 251 WCHAR ProvChar[1]; | |
| 252 } SERIAL_COMMPROP, *PSERIAL_COMMPROP; | |
| 253 | |
| 254 /* SERIAL_COMMPROP.SettableParams flags */ | |
| 255 #define SERIAL_SP_PARITY 0x0001 | |
| 256 #define SERIAL_SP_BAUD 0x0002 | |
| 257 #define SERIAL_SP_DATABITS 0x0004 | |
| 258 #define SERIAL_SP_STOPBITS 0x0008 | |
| 259 #define SERIAL_SP_HANDSHAKING 0x0010 | |
| 260 #define SERIAL_SP_PARITY_CHECK 0x0020 | |
| 261 #define SERIAL_SP_CARRIER_DETECT 0x0040 | |
| 262 | |
| 263 /* SERIAL_COMMPROP.ProvCapabilities flags */ | |
| 264 #define SERIAL_PCF_DTRDSR 0x00000001 | |
| 265 #define SERIAL_PCF_RTSCTS 0x00000002 | |
| 266 #define SERIAL_PCF_CD 0x00000004 | |
| 267 #define SERIAL_PCF_PARITY_CHECK 0x00000008 | |
| 268 #define SERIAL_PCF_XONXOFF 0x00000010 | |
| 269 #define SERIAL_PCF_SETXCHAR 0x00000020 | |
| 270 #define SERIAL_PCF_TOTALTIMEOUTS 0x00000040 | |
| 271 #define SERIAL_PCF_INTTIMEOUTS 0x00000080 | |
| 272 #define SERIAL_PCF_SPECIALCHARS 0x00000100 | |
| 273 #define SERIAL_PCF_16BITMODE 0x00000200 | |
| 274 | |
| 275 /* SERIAL_COMMPROP.SettableData flags */ | |
| 276 #define SERIAL_DATABITS_5 0x0001 | |
| 277 #define SERIAL_DATABITS_6 0x0002 | |
| 278 #define SERIAL_DATABITS_7 0x0004 | |
| 279 #define SERIAL_DATABITS_8 0x0008 | |
| 280 #define SERIAL_DATABITS_16 0x0010 | |
| 281 #define SERIAL_DATABITS_16X 0x0020 | |
| 282 | |
| 283 /* SERIAL_COMMPROP.SettableStopParity flags */ | |
| 284 #define SERIAL_STOPBITS_10 0x0001 | |
| 285 #define SERIAL_STOPBITS_15 0x0002 | |
| 286 #define SERIAL_STOPBITS_20 0x0004 | |
| 287 #define SERIAL_PARITY_NONE 0x0100 | |
| 288 #define SERIAL_PARITY_ODD 0x0200 | |
| 289 #define SERIAL_PARITY_EVEN 0x0400 | |
| 290 #define SERIAL_PARITY_MARK 0x0800 | |
| 291 #define SERIAL_PARITY_SPACE 0x1000 | |
| 292 | |
| 293 typedef struct _SERIALPERF_STATS { | |
| 294 ULONG ReceivedCount; | |
| 295 ULONG TransmittedCount; | |
| 296 ULONG FrameErrorCount; | |
| 297 ULONG SerialOverrunErrorCount; | |
| 298 ULONG BufferOverrunErrorCount; | |
| 299 ULONG ParityErrorCount; | |
| 300 } SERIALPERF_STATS, *PSERIALPERF_STATS; | |
| 301 | |
| 302 typedef struct _SERIAL_TIMEOUTS { | |
| 303 ULONG ReadIntervalTimeout; | |
| 304 ULONG ReadTotalTimeoutMultiplier; | |
| 305 ULONG ReadTotalTimeoutConstant; | |
| 306 ULONG WriteTotalTimeoutMultiplier; | |
| 307 ULONG WriteTotalTimeoutConstant; | |
| 308 } SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS; | |
| 309 | |
| 310 /* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */ | |
| 311 #define SERIAL_EV_RXCHAR 0x0001 | |
| 312 #define SERIAL_EV_RXFLAG 0x0002 | |
| 313 #define SERIAL_EV_TXEMPTY 0x0004 | |
| 314 #define SERIAL_EV_CTS 0x0008 | |
| 315 #define SERIAL_EV_DSR 0x0010 | |
| 316 #define SERIAL_EV_RLSD 0x0020 | |
| 317 #define SERIAL_EV_BREAK 0x0040 | |
| 318 #define SERIAL_EV_ERR 0x0080 | |
| 319 #define SERIAL_EV_RING 0x0100 | |
| 320 #define SERIAL_EV_PERR 0x0200 | |
| 321 #define SERIAL_EV_RX80FULL 0x0400 | |
| 322 #define SERIAL_EV_EVENT1 0x0800 | |
| 323 #define SERIAL_EV_EVENT2 0x1000 | |
| 324 | |
| 325 /* IOCTL_SERIAL_LSRMST_INSERT constants */ | |
| 326 #define SERIAL_LSRMST_LSR_DATA 0x01 | |
| 327 #define SERIAL_LSRMST_LSR_NODATA 0x02 | |
| 328 #define SERIAL_LSRMST_MST 0x03 | |
| 329 #define SERIAL_LSRMST_ESCAPE 0x00 | |
| 330 | |
| 331 /* IOCTL_SERIAL_PURGE constants */ | |
| 332 #define SERIAL_PURGE_TXABORT 0x00000001 | |
| 333 #define SERIAL_PURGE_RXABORT 0x00000002 | |
| 334 #define SERIAL_PURGE_TXCLEAR 0x00000004 | |
| 335 #define SERIAL_PURGE_RXCLEAR 0x00000008 | |
| 336 | |
| 337 /* IOCTL_SERIAL_SET_FIFO_CONTROL constants */ | |
| 338 #define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001 | |
| 339 #define SERIAL_IOC_FCR_RCVR_RESET 0x00000002 | |
| 340 #define SERIAL_IOC_FCR_XMIT_RESET 0x00000004 | |
| 341 #define SERIAL_IOC_FCR_DMA_MODE 0x00000008 | |
| 342 #define SERIAL_IOC_FCR_RES1 0x00000010 | |
| 343 #define SERIAL_IOC_FCR_RES2 0x00000020 | |
| 344 #define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040 | |
| 345 #define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080 | |
| 346 | |
| 347 typedef struct _SERIAL_QUEUE_SIZE { | |
| 348 ULONG InSize; | |
| 349 ULONG OutSize; | |
| 350 } SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE; | |
| 351 | |
| 352 typedef struct _SERIAL_XOFF_COUNTER { | |
| 353 ULONG Timeout; | |
| 354 LONG Counter; | |
| 355 UCHAR XoffChar; | |
| 356 } SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER; | |
| 357 | |
| 358 typedef struct _SERIAL_BASIC_SETTINGS { | |
| 359 SERIAL_TIMEOUTS Timeouts; | |
| 360 SERIAL_HANDFLOW HandFlow; | |
| 361 ULONG RxFifo; | |
| 362 ULONG TxFifo; | |
| 363 } SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS; | |
| 364 | |
| 365 typedef struct _SERENUM_PORT_DESC { | |
| 366 ULONG Size; | |
| 367 PVOID PortHandle; | |
| 368 PHYSICAL_ADDRESS PortAddress; | |
| 369 USHORT Reserved[1]; | |
| 370 } SERENUM_PORT_DESC, *PSERENUM_PORT_DESC; | |
| 371 | |
| 372 typedef UCHAR | |
| 373 (NTAPI*PSERENUM_READPORT)( | |
| 374 PVOID SerPortAddress); | |
| 375 | |
| 376 typedef VOID | |
| 377 (NTAPI*PSERENUM_WRITEPORT)( | |
| 378 PVOID SerPortAddress, | |
| 379 UCHAR Value); | |
| 380 | |
| 381 typedef enum _SERENUM_PORTION { | |
| 382 SerenumFirstHalf, | |
| 383 SerenumSecondHalf, | |
| 384 SerenumWhole | |
| 385 } SERENUM_PORTION; | |
| 386 | |
| 387 typedef struct _SERENUM_PORT_PARAMETERS { | |
| 388 ULONG Size; | |
| 389 PSERENUM_READPORT ReadAccessor; | |
| 390 PSERENUM_WRITEPORT WriteAccessor; | |
| 391 PVOID SerPortAddress; | |
| 392 PVOID HardwareHandle; | |
| 393 SERENUM_PORTION Portion; | |
| 394 USHORT NumberAxis; | |
| 395 USHORT Reserved[3]; | |
| 396 } SERENUM_PORT_PARAMETERS, *PSERENUM_PORT_PARAMETERS; | |
| 397 | |
| 398 #define SERIAL_ERROR_BREAK 0x00000001 | |
| 399 #define SERIAL_ERROR_FRAMING 0x00000002 | |
| 400 #define SERIAL_ERROR_OVERRUN 0x00000004 | |
| 401 #define SERIAL_ERROR_QUEUEOVERRUN 0x00000008 | |
| 402 #define SERIAL_ERROR_PARITY 0x00000010 | |
| 403 | |
| 404 #define SERIAL_SP_UNSPECIFIED 0x00000000 | |
| 405 #define SERIAL_SP_RS232 0x00000001 | |
| 406 #define SERIAL_SP_PARALLEL 0x00000002 | |
| 407 #define SERIAL_SP_RS422 0x00000003 | |
| 408 #define SERIAL_SP_RS423 0x00000004 | |
| 409 #define SERIAL_SP_RS449 0x00000005 | |
| 410 #define SERIAL_SP_MODEM 0X00000006 | |
| 411 #define SERIAL_SP_FAX 0x00000021 | |
| 412 #define SERIAL_SP_SCANNER 0x00000022 | |
| 413 #define SERIAL_SP_BRIDGE 0x00000100 | |
| 414 #define SERIAL_SP_LAT 0x00000101 | |
| 415 #define SERIAL_SP_TELNET 0x00000102 | |
| 416 #define SERIAL_SP_X25 0x00000103 | |
| 417 #define SERIAL_SP_SERIALCOMM 0x00000001 | |
| 418 | |
| 419 #define SERIAL_TX_WAITING_FOR_CTS 0x00000001 | |
| 420 #define SERIAL_TX_WAITING_FOR_DSR 0x00000002 | |
| 421 #define SERIAL_TX_WAITING_FOR_DCD 0x00000004 | |
| 422 #define SERIAL_TX_WAITING_FOR_XON 0x00000008 | |
| 423 #define SERIAL_TX_WAITING_XOFF_SENT 0x00000010 | |
| 424 #define SERIAL_TX_WAITING_ON_BREAK 0x00000020 | |
| 425 #define SERIAL_RX_WAITING_FOR_DSR 0x00000040 | |
| 426 | |
| 427 #define SERIAL_DTR_STATE 0x00000001 | |
| 428 #define SERIAL_RTS_STATE 0x00000002 | |
| 429 #define SERIAL_CTS_STATE 0x00000010 | |
| 430 #define SERIAL_DSR_STATE 0x00000020 | |
| 431 #define SERIAL_RI_STATE 0x00000040 | |
| 432 #define SERIAL_DCD_STATE 0x00000080 | |
| 433 | |
| 434 typedef struct _SERIALCONFIG { | |
| 435 ULONG Size; | |
| 436 USHORT Version; | |
| 437 ULONG SubType; | |
| 438 ULONG ProvOffset; | |
| 439 ULONG ProviderSize; | |
| 440 WCHAR ProviderData[1]; | |
| 441 } SERIALCONFIG,*PSERIALCONFIG; | |
| 442 | |
| 443 #ifdef __cplusplus | |
| 444 } | |
| 445 #endif | |
| 446 | |
| 447 #endif /* __NTDDSER_H */ |
